© Semiconductor Components Industries, LLC, 2017
January, 2019 Rev. 3
1Publication Order Number:
FCP190N65S3/D
FCP190N65S3
Power MOSFET, N-Channel,
SUPERFET) III, Easy Drive,
650 V, 17 A, 190 mW
Description
SUPERFET III MOSFET is ON Semiconductors brandnew high
voltage superjunction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low onresistance and lower gate
charge performance. This advanced technology is tailored to minimize
conduction loss, provides superior switching performance, and
withstand extreme dv/dt rate.
Consequently, SUPERFET III MOSFET Easy drive series helps
manage EMI issues and allows for easier design implementation.
Features
700 V @ TJ = 150°C
Typ. RDS(on) = 159 mW
Ultra Low Gate Charge (Typ. Qg = 33 nC)
Low Effective Output Capacitance (Typ. Coss(eff.) = 300 pF)
100% Avalanche Tested
These Devices are PbFree and are RoHS Compliant
Applications
Computing / Display Power Supplies
Telecom / Server Power Supplies
Industrial Power Supplies
Lighting / Charger / Adapter
TO220
CASE 340AT
See detailed ordering and shipping information on page 2 of
this data sheet.
ORDERING INFORMATION
www.onsemi.com
$Y = ON Semiconductor Logo
&Z = Assembly Plant Code
&3 = Data Code (Year & Week)
&K = Lot
FCP190N65S3 = Specific Device Code
MARKING DIAGRAM
VDSS RDS(ON) MAX ID MAX
650 V 190 mW @ 10 V 17 A
POWER MOSFET
D
S
G
D
G
S
$Y&Z&3&K
FCP
190N65S3
FCP190N65S3
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2
ABSOLUTE MAXIMUM RATINGS (TC = 25°C, Unless otherwise noted)
Symbol Parameter Value Unit
VDSS Drain to Source Voltage 650 V
VGSS Gate to Source Voltage DC ±30 V
AC (f > 1 Hz) ±30
IDDrain Current Continuous (TC = 25°C) 17 A
Continuous (TC = 100°C) 11
IDM Drain Current Pulsed (Note 1) 42.5 A
EAS Single Pulsed Avalanche Energy (Note 2) 76 mJ
IAS Avalanche Current (Note 2) 2.5 A
EAR Repetitive Avalanche Energy (Note 1) 1.44 mJ
dv/dt MOSFET dv/dt 100 V/ns
Peak Diode Recovery dv/dt (Note 3) 20
PDPower Dissipation (TC = 25°C) 144 W
Derate Above 25°C 1.15 W/°C
TJ, TSTG Operating and Storage Temperature Range 55 to +150 °C
TLMaximum Lead Temperature for Soldering, 1/8 from Case for 5 seconds 300 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulsewidth limited by maximum junction temperature.
2. IAS = 2.5 A, RG = 25 W, starting TJ = 25°C.
3. ISD 8.5 A, di/dt 200 A/ms, VDD 400 V, starting TJ = 25°C.
THERMAL CHARACTERISTICS
Symbol Parameter Value Unit
RqJC Thermal Resistance, Junction to Case, Max. 0.87 _C/W
RqJA Thermal Resistance, Junction to Ambient, Max. 62.5
PACKAGE MARKING AND ORDERING INFORMATION
Part Number Top Marking Package Packing Method Reel Size Tape Width Quantity
FCP190N65S3 FCP190N65S3 TO220 Tube N/A N/A 50 Units
FCP190N65S3
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3
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
OFF CHARACTERISTICS
BVDSS Drain to Source Breakdown Voltage VGS =0V, I
D= 1 mA, TJ=25_C650 V
VGS =0V, I
D= 1 mA, TJ= 150_C700 V
DBVDSS / DTJBreakdown Voltage Temperature
Coefficient
ID= 1 mA, Referenced to 25_C0.6 V/_C
IDSS Zero Gate Voltage Drain Current VDS = 650 V, VGS =0V 1mA
VDS = 520 V, TC= 125_C0.89
IGSS Gate to Body Leakage Current VGS =±30 V, VDS =0V ±100 nA
ON CHARACTERISTICS
VGS(th) Gate Threshold Voltage VGS =V
DS, ID= 1.7 mA 2.5 4.5 V
RDS(on) Static Drain to Source On Resistance VGS =10V, I
D= 8.5 A 159 190 mW
gFS Forward Transconductance VDS =20V, I
D= 8.5 A 10 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 400 V, VGS = 0 V, f = 1 MHz 1350 pF
Coss Output Capacitance 30 pF
Coss(eff.) Effective Output Capacitance VDS = 0 V to 400 V, VGS =0V 300 pF
Coss(er.) Energy Related Output Capacitance VDS = 0 V to 400 V, VGS =0V 43 pF
Qg(tot) Total Gate Charge at 10 V VDS = 400 V, ID= 8.5 A, VGS =10V
(Note 4)
33 nC
Qgs Gate to Source Gate Charge 7.9 nC
Qgd Gate to Drain “Miller” Charge 14 nC
ESR Equivalent Series Resistance f = 1 MHz 7W
SWITCHING CHARACTERISTICS
td(on) Turn-On Delay Time VDD = 400 V, ID= 8.5 A, VGS =10V,
Rg= 4.7 W
(Note 4)
20 ns
trTurn-On Rise Time 22 ns
td(off) Turn-Off Delay Time 57 ns
tfTurn-Off Fall Time 16 ns
SOURCE-DRAIN DIODE CHARACTERISTICS
ISMaximum Continuous Source to Drain Diode Forward Current 17 A
ISM Maximum Pulsed Source to Drain Diode Forward Current 42.5 A
VSD Source to Drain Diode Forward Voltage VGS = 0V, I
SD = 8.5 A 1.2 V
trr Reverse Recovery Time VDD = 400 V, ISD = 8.5 A,
dIF/dt = 100 A/ms
313 ns
Qrr Reverse Recovery Charge 4.9 mC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.
FCP190N65S3
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4
TYPICAL PERFORMANCE CHARACTERISTICS
467
VGS, GateSource Voltage (V)
ID, Drain Current (A)
35
00.0 1.0 1.5
0
0
2
4
6
8
10
ID, Drain Current (A)
RDS(ON), DrainSource
OnResistance (W)
20
VSD, Body Diode Forward Voltage (V)
IS, Reverse Drain Current (A)
VDS, DrainSource Voltage (V)
Capacitances (pF)
Qg, Total Gate Charge (nC)
VGS, GateSource Voltage (V)
5
0.1 1 10
Figure 1. OnRegion Characteristics Figure 2. Transfer Characteristics
20
VDS, DrainSource Voltage (V)
ID, Drain Current (A)
Figure 3. OnResistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
3010
0.1
1
10
100
1000
10000
100000
0.1 1 10 100 1000 10 15 20
0.5
89
40
25 30 35
0.1
1
10
50
1
10
50
0.001
0.01
0.1
1
10
100 VGS = 0 V
250 ms Pulse Test
25°C
150°C
55°C
m
250 ms Pulse Test
TC = 25°C
VGS = 10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
VDS = 20 V
250 ms Pulse Test
25°C
55°C
150°C
0.0
0.2
0.4
0.6 TC = 25°C
VGS = 10 V
VGS = 20 V
50
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Coss
VGS = 0 V
f = 1 MHz
Ciss
Crss
ID = 8.5 A
VDS = 130 V
VDS = 400 V
FCP190N65S3
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5
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
1 10 100 1000
0.01
0.1
10
100
25
VDS, DrainSource Voltage (V)
ID, Drain Current (A)
TC, Case Temperature (5C)
ID, Drain Current (A)
50 75 100 125 150
VDS, Drain to Source Voltage (V)
EOSS, (mJ)
130 260 520 6500
50
0.8
0.9
1.0
1.1
1.2
0.0
0.5
1.0
1.5
2.0
2.5
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. OnResistance Variation
vs. Temperature
TJ, Junction Temperature (5C)
BVDSS, DrainSource
Breakdown Voltage (Normalized)
050 100 150
TJ, Junction Temperature (5C)
RDS(on), DrainSource
OnResistance (Normalized)
50 0 50 100 150
3.0
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 11. EOSS vs. Drain to Source Voltage
390
1
0
2
4
6
8
VGS = 0 V
ID = 10 mA
VGS = 10 V
ID = 8.5 A
TC = 25°C
TJ = 150°C
Single Pulse
Operation in this Area
is Limited by RDS(on)
DC
100 ms
1 ms
30 ms
10 ms
0
5
10
15
20
FCP190N65S3
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
t, Rectangular Pulse Duration (sec)
r(t), Normalized Effective Transient
Thermal Resistance
Figure 12. Transient Thermal Response Curve
0.001
0.01
0.1
1
2
105104103102101100101
ZqJC(t) = r(t) x RqJC
RqJC = 0.87°C/W
Peak TJ = PDM x ZqJC(t) + TC
Duty Cycle, D = t1 / t2
D = 0.5
0.2
0.1
0.05
0.02
0.01
DUTY CYCLE DESCENDING ORDER
SINGLE PULSE
PDM
t1
t2
FCP190N65S3
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Figure 13. Gate Charge Test Circuit & Waveform
Figure 14. Resistive Switching Test Circuit & Waveforms
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
RL
VDS
VGS
VGS
RG
DUT
VDD
VDS
VGS
10%
90%
10%
90% 90%
ton toff
trtf
td(on) td(off)
Qg
Qgd
Qgs
VGS
Charge
VDS
VGS
RL
DUT
IG = Const.
VDD
VDS
RG
DUT
VGS
L
ID
tp
VDD
tp
Time
IAS
BVDSS
ID(t)
VDS(t)
EAS +1
2
@LIAS
2
FCP190N65S3
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8
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
L
VDD
RG
ISD
VDS
+
VGS
Same Type
as DUT
dv/dt controlled by RG
ISD controlled by pulse period
Driver
VGS
(Driver)
ISD
(DUT)
VDS
(DUT) VSD
IRM
10 V
di/dt
VDD
IFM, Body Diode Forward Current
Body Diode Reverse Current
Body Diode Recovery dv/dt
Body Diode
Forward Voltage Drop
D+
Gate Pulse Width
Gate Pulse Period
SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or
other countries.
TO−220−3LD
CASE 340AT
ISSUE A DATE 03 OCT 201
7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
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© Semiconductor Components Industries, LLC, 2002
October, 2002 − Rev. 0 Case Outline Number:
XXX
DOCUMENT NUMBER:
STATUS:
NEW STANDARD:
DESCRIPTION:
98AON13818G
ON SEMICONDUCTOR STANDARD
TO−220−3LD
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
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ISSUE REVISION DATE
ORELEASED FOR PRODUCTION FROM FAIRCHILD TO220B03 TO ON SEMICON-
DUCTOR. REQ. BY B. NG. 30 SEP 2016
ACHANGED NOTE I LABEL TO NOTE H IN BACK VIEW. REQ. BY H. ALLEN. 03 OCT 2017
© Semiconductor Components Industries, LLC, 2017
October, 2017 − Rev. A Case Outline Number
:
340AT
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