REV. A
AD9852
–35–
4. Install shorting jumper on Pins 2 and 3 (top two pins) of 3-
pin header W4.
5. Install shorting jumpers on Pins 2 and 3 (bottom two pins) of
3-pin header W2 and W8.
To Connect the High-Speed Comparator
To connect the high-speed comparator to the DAC output sig-
nals, either the quadrature filtered output configuration (AD9854
only) or the complementary filtered output configuration out-
lined above (both AD9854 and AD9852) can be chosen. Follow
Steps 1 through 4 for either filtered configuration as above. Step
5 below will reroute the filtered signals away from their output
connectors (J6 and J7) and to the 100 Ω configured comparator
inputs. This sets up the comparator for differential input without
control of the comparator output duty cycle. The comparator out-
put duty cycle should be close to 50% in this configuration.
5. Install shorting jumper on Pins 1 and 2 (top two pins) of 3-
pin header W2 and W8.
User may elect to change the R
SET
resistor, R2 from 3.9 kΩ to
1.95 kΩ to receive a more robust signal at the comparator inputs.
This will decrease jitter and extend comparator-operating range.
User can accomplish this by installing a shorting jumper at W6,
which provides a second 3.9 kΩ chip resistor (R20) in parallel
with the provided R2. This boosts the DAC output current from
10 mA to 20 mA and doubles the p-p output voltage developed
across the loads.
Single-Ended Configuration
To connect the high-speed comparator in a single-ended configu-
ration that will allow duty cycle or pulsewidth control requires that
a dc threshold voltage be present at one of the comparator inputs.
You may supply this voltage using the control DAC. A 12-bit,
two’s-complement value is written to the Control DAC register
that will set the IOUT2 output to a static dc level. Allowable
hexadecimal values are 7FF (maximum) to 800 (minimum)
with all zeros being midscale. The IOUT1 channel will continue
to output a filtered sine wave programmed by user. These two
signals are routed to the comparator using W2 and W8 3-pin
header switches. User must be in the configuration described in the
section “Observing the Filtered IOUT1 and the Filtered IOUT2.”
Follow Steps 1 through 4 in that section and then the following:
5. Install shorting jumper on Pins 1 and 2 (top two pins) of 3-
pin header W2 and W8.
The user may elect to change the R
SET
resistor, R2 from 3.9 kΩ
to 1.95 kΩ to receive a more robust signal at the comparator
inputs. This will decrease jitter and extend comparator-operat-
ing range. User can accomplish this by installing a shorting
jumper at W6, which provides a second 3.9 kΩ chip resistor
(R20) in parallel with the provided R2.
USING THE PROVIDED SOFTWARE
The software is provided on a CD. This brief set of instructions
should be used in conjunction with the AD9852 or AD9854 data
sheet and the AD9852/AD9854 Evaluation Board schematic.
Version 1.71 Software has been improved from previous versions
in the following ways:
• Detects old versions of the software installed and gives
option to uninstall them.
• Detects the Windows Platform (Windows 95, Windows 98,
Windows NT).
• Installs the correct version of the software (Windows 95/98
or Windows NT).
• Detects if Windows NT has Service Pack 3 installed, and if it
is not, gives the option to install it.
• Allows access to the data sheets for both products through
hyperlinks. (The hyperlinks bring up the executable that is
currently associated with Acrobat files.)
The CD-ROM contains the following:
• The AD9852/AD9854 Evaluation Software.
• Service Pack 3 for Windows NT. This is required for Visual
Basic 6 applications to run on Windows NT 4.0.
• Acrobat Reader 4.0 for Windows 95/98 and Windows NT.
Several numerical entries, such as frequency and phase informa-
tion, et al, require that the ENTER key be pressed to register
that information. So, for example, if a new frequency is input,
the load button is hit, and nothing new happens, it is probably
because the user neglected to press the enter key after typing
the new frequency information.
1. Normal operation of the AD9852/AD9854 evaluation board
begins with a master reset. Many of the default register values
after reset are depicted in the software “control panel.” The
reset command sets the DDS output amplitude to minimum
and 0 Hz, 0 phase-offset as well as other states that are listed
in the AD9852/AD9854 Register Layout table in the data sheet.
2. The next programming block should be the “Reference Clock
and Multiplier” since this information is used to determine
the proper 48-bit frequency tuning words that will be entered
and calculated later.
3. The output amplitude defaults to the 12-bit straight binary
multiplier values of the “I or Cosine” multiplier register of
000hex and no output (dc) should be seen from the DAC.
Set the multiplier amplitude in the Output Amplitude window
to a substantial value, such as FFFhex. The digital multiplier
may be bypassed by clicking the box “Output Amplitude is
always Full-Scale,” but experience has shown that doing so
does not result in best SFDR. Best SFDR, as much as 11 dB
better, is obtained by routing the signal through the digital
multiplier and “backing off” on the multiplier amplitude. For
instance, FC0 hex produces less spurious signal amplitude
than FFFhex. It is an exploitable and repeatable phenomenon
that should be investigated in your application if SFDR (spuri-
ous-free dynamic range) must be maximized. This phenomenon
is more readily observed at higher output frequencies where
good SFDR becomes more difficult to achieve.
4. Refer to this data sheet and evaluation board schematic to
understand all the functions of the AD9852 available to the
user and to gain an understanding of what the software is
doing in response to programming commands.
Applications assistance is available for the AD9852, the
AD9852/PCB evaluation board, and all other Analog Devices
products. Please call 1/800-ANALOGD.