Nuvoton
Bus Termination Regulator
W83310G-R2
W83310G-R2
Publication Date: Nov., 2008
-I- Revision 1.10
Data Sheet Revision History
NO PAGES DATES VERSION VERSION
ON WEB MAIN CONTENTS
1. All June, 2007 1.0 N.A Remove non Pb-free part no: W83310S-R2
2 All Nov., 2008 1.1 N.A
1. Change to Nuvoton document format
2. Add performance chart with
VIN=1.5V/1.8V/2.5V at VCNTL = 3.0~3.6V
3
4
5
6
Please note that all data and specifications are subject to change without notice. All
the trademarks of products and companies mentioned in this datasheet belong to
their respective owners.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or
systems where malfunction of these products can reasonably be expected to result in
personal injury. Nuvoton customers using or selling these products for use in such
applications do so at their own risk and agree to fully indemnify Nuvoton for any
damages resulting from such improper use or sales.
W83310G-R2
Publication Date: Nov., 2008
-II- Revision 1.10
Table of Content-
1. GENERAL DESCRIPTION .............................................................................................................. 1
2. FEATURES ...................................................................................................................................... 1
3. APPLICATIONS ............................................................................................................................... 1
4. PIN CONFIGURATION AND DESCRIPTION .................................................................................. 2
5. APPLICATION CIRCUIT .................................................................................................................. 3
6. INTERNAL BLOCK DIAGRAM ........................................................................................................ 3
7. ABSOLUTE MAXIMUM RATINGS................................................................................................... 4
8. RECOMMENDED OPERATING CONDITIONS .............................................................................. 4
9. ELECTRICAL CHARACTERISTICS................................................................................................ 5
10. TYPICAL OPERATING WAVEFORMS ............................................................................................ 5
11. PACKAGE DIMENSION................................................................................................................. 10
12. ORDERING INFORMATION...........................................................................................................11
13. TOP MARKING SPECIFICATION...................................................................................................11
W83310G-R2
Publication Date: Nov., 2008
-1- Revision 1.10
1. GENERAL DESCRIPTION
The W83310G-R2 is a linear regulator provides power with the capability of continuous
1.8Amp bi-directional sinking and driving capability for a high speed bus terminator
application. The chip simply implements a stable power supply which tracks dynamically
half of the input power for the bus terminator. The W83310G-R2 is promoted with small
footprint 8-SOP 150mil package. The design of the W83310G-R2 provides a high
integration, high performance, and cost-effective solution.
2. FEATURES
z Support DDRI (1.25VTT), DDRII (0.9VTT) and DDRIII (0.75VTT) Requirements
z Sink and Source 1.8A Continuous Current
z Integrated Power MOSFET
z Adjustable VOUT by External Resistors
z Low External Component Count
z Low Output Voltage Offset
z Short Circuit Protection
z 0℃ to 70℃ Ambient Operating Temperature Range
z SOP-8 Package, Lead (Pb) Free
3. APPLICATIONS
z Desktop PCs, Notebooks, and Workstations
z Graphics Card Memory Termination
z DDRI, DDRII and DDRIII Memory Systems
W83310G-R2
Publication Date: Nov., 2008
-2- Revision 1.10
4. PIN CONFIGURATION AND DESCRIPTION
1
2
3
8
7
6
5
4
VIN VCNTL
VCNTL
GND
VCNTL
VREF
VCNTL
VOUT
W83310G-R2
(Top View)
SYMBOL PIN I/O FUNCTION
VIN 1 I Main power input pin which supplies current to the output pin.
VREF 3 I
Internal reference voltage source.
Reference voltage on the pin will be referred with the pin value.
VOUT 4 O Voltage output pin which is regulated to the VREF voltage.
VCNTL 5, 6, 7, 8 I Power for internal control logic circuitry.
GND 2 Ground.
W83310G-R2
Publication Date: Nov., 2008
-3- Revision 1.10
5. APPLICATION CIRCUIT
C4
1500u
VOUT
R1
10K
Q1
2N7002
3
1
2
C1
1000u
C5
1u
R2
10K
C2
1u
VRAM
U1
W83310G-R2
1
2
3
4
8
7
6
5
VIN
GND
VREF
VOUT
VCNTL
VCNTL
VCNTL
VCNTL
C3
1u
3.3V
Enable#
VRAM
6. INTERNAL BLOCK DIAGRAM
Control
Logic
Circuit
VCNTL VIN
VOUT
VREF
GND
W83310G-R2
Publication Date: Nov., 2008
-4- Revision 1.10
7. ABSOLUTE MAXIMUM RATINGS
ITEM SYMBOL RATING UNIT
Input Voltage VIN -0.3 to 5 V
Control Logic Input Voltage VCNTL -0.3 to 5 V
Human Body Mode ±2 kV
Machine Mode ±200 V
Electrostatic discharge protection
Latch-Up ±100 mA
Package Thermal Resistance θJA 160
℃/W
Storage Temperature Range -65 to 150 ℃
Note: Stress listed as the above “Absolute Maximum Ratings” may cause permanent damage
to the device. Functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum ration conditions for extended periods may remain possibility to affect device
reliability.
8. RECOMMENDED OPERATING CONDITIONS
ITEM SYMBOL MIN MAX UNIT
VIN 1.5 3.6
Input Voltage VCNTL 3 3.6
V
Operating Temperature Range 0 70 ℃
Junction Temperature Range 0 125 ℃
W83310G-R2
Publication Date: Nov., 2008
-5- Revision 1.10
9. ELECTRICAL CHARACTERISTICS
TA = 25℃, VCNTL= 3.3 V, VIN=2.5V/1.8V/1.5V, VREF=1.25V/0.9V/0.75V, COUT=1000uF, all
voltage outputs unloaded (unless otherwise noted)
PARAMETER TEST CONDITION MIN TYP MAX UNITS
Input
VCNTL Operating Current ICNTL IOUT=0A -- 0.5 1 mA
IVIN
(SHDN)
1 10 uA
Shutdown Current (note 1) IVCNTL
(SHDN)
VREF<0.2V, IOUT=0.1A
230 300 uA
Output (DDRI / DDRII / DDRIII)
Output Offset Voltage (note 2) VOS I
OUT=0A -5 0 5 mV
IOUT=0 → +1.8A -40 -- 40
Load Regulation (note 3) ∆VLIOUT=-0 → -1.8A -40 -- 40 mV
Protection
Short Current Limit ILIM V
OUT short to ground -- 4 -- A
VREF Shutdown Mode
VIH Enable 0.4 -- --
Shutdown Threshold
VIL Disable -- -- 0.2 V
Note 1: Shutdown current is the input current of VIN & VCNTL drawn by a regulator when the output
voltage is disabled by a shutdown signal on VREF pin (VIL < 0.2). It is measured with VIN =
1.5V/1.8V/2.5V & VCNTL = 3.3V.
Note 2: VOS offset is the voltage measurement as VOUT subtracted from VREF.
Note 3: Regulation is measured at constant junction temperature by using a 5ms current pulse.
Devices are tested for load regulation in the load range from 0A to 1.8A peak.
W83310G-R2
Publication Date: Nov., 2008
-6- Revision 1.10
10. TYPICAL OPERATING WAVEFORMS
z Transient Response, VCNTL=3.3V, VIN=2.5V, VREF=1.25V, VOUT=1.25V
z Transient Response, VCNTL=3.3V, VIN=1.8V, VREF=0.9V, VOUT=0.9V
1.8A Source 1.8A Sink
1.8A Source 1.8A Sink
z Transient Response, VCNTL=3.3V, VIN=1.5V, VREF=0.75V, VOUT=0.75V
W83310G-R2
Publication Date: Nov., 2008
-7- Revision 1.10
1.8A Source 1.8A Sink
z Maximum Sourcing Current with VCNTL = 3.0V ~ 3.6V
Maximum Sourcing Current vs VCNTL
1.5
1.7
1.9
2.1
2.3
2.5
2.7
3.0 3.1 3.2 3.3 3.4 3.5 3.6
VCNTL (V)
Output Current (A
)
DDR1: VOUT=1.25V
DDR2: VOUT=0.9V
DDR3: VOUT=0.75V
Note:
¾ DDR1: VIN = 2.5V, VOUT = 1.25V with 10ms current pulse.
¾ DDR2: VIN = 1.8V, VOUT = 0.9V with 10ms current pulse.
¾ DDR3: VIN = 1.5V, VOUT = 0.75V with 10ms current pulse.
W83310G-R2
Publication Date: Nov., 2008
-8- Revision 1.10
z Maximum Sinking Current with VCNTL = 3.0V ~ 3.6V
Maximum Sinking Current vs VCNTL
1.8
1.9
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
3.0 3.1 3.2 3.3 3.4 3.5 3.6
VCNTL (V)
Output Current (A
)
DDR1: VOUT=1.25V
DDR2: VOUT=0.9V
DDR3 VOUT=0.75V
Note:
¾ DDR1: VIN = 2.5V, VOUT = 1.25V with 10ms current pulse.
¾ DDR2: VIN = 1.8V, VOUT = 0.9V with 10ms current pulse.
¾ DDR3: VIN = 1.5V, VOUT = 0.75V with 10ms current pulse.
z Output Short Circuit Protection, VCNTL=3.3V, VOUT shorted to ground
VIN=2.5V
VOUT=1.25V
W83310G-R2
Publication Date: Nov., 2008
-9- Revision 1.10
VIN=1.8V
VOUT=0.9V
VIN=1.5V
VOUT=0.75V
W83310G-R2
Publication Date: Nov., 2008
-10- Revision 1.10
11. PACKAGE DIMENSION
L
O
c
D
A1
A
e
b
SEATING PLANE
Y
0.25
GAUGE PLANE
EH
E
1
85
4
4.00
0.25
0.51
0.25
E
c
b
A1
3.80
0.19
0.33
0.10
0.157
0.010
0.020
0.010
0.150
0.008
0.013
0.004
MAX.
DIMENSION IN MM
1.75
A
SYMBOL MIN.
1.35
DIMENSION IN INCH
0.069
MIN.
0.053 MAX.
Control demensions are in milmeters .
1.27
0.10
6.20
L
θ
Y
H
010
0.40
5.80
e1.27 BSC
0.050
0.004
0.244
0
0.016
0.228
10
0.050 BSC
E
D4.80 5.00 0.188 0.196
W83310G-R2
Publication Date: Nov., 2008
-11- Revision 1.10
¾ TAPING SPECIFICATION
8 Pin SOP Package
12. ORDERING INFORMATION 12. ORDERING INFORMATION
PART NUMBER PACKAGE TYPE SUPPLIED AS PRODUCTION FLOW
W83310G-R2 8PIN SOP(Pb-free package) E Shape: 100 units/Tube
T Shape: 2,500 units/T&R
Commercial, 0℃ to +70
℃
13. TOP MARKING SPECIFICATION
W83
310G-R2
706XY
Left line: Winbond logo (Nuvoton)
1st & 2nd line: W83310G-R2 – the part number
3rd line: Tracking code 706 X Y
706: Packages assembled in Year 07’, week 06
X: Assembly house ID Code
Y: The IC version Code
W83310G-R2
Publication Date: Nov., 2008
-12- Revision 1.10
Important Notice
Nuvoton products are not designed, intended, authorized or warranted for use as components
in systems or equipment intended for surgical implantation, atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal
instruments, combustion control instruments, or for other applications intended to support or
sustain life. Further more, Nuvoton products are not intended for applications wherein failure
of Nuvoton products could result or lead to a situation wherein personal injury, death or severe
property or environmental damage could occur.
Nuvoton customers using or selling these products for use in such applications do so at their
own risk and agree to fully indemnify Nuvoton for any damages resulting from such improper
use or sales.
