4-1
File Number
1579.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 |Copyright © Intersil Corporation 1999
IRF720
3.3A, 400V, 1.800 Ohm, N-Channel Power
MOSFET
This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17404.
Features
3.3A, 400V
•r
DS(ON) = 1.800
Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
JEDEC TO-220AB
Ordering Information
PART NUMBER PACKAGE BRAND
IRF720 TO-220AB IRF720
NOTE: When ordering, use the entire part number. G
D
S
GATE
DRAIN (FLANGE)
SOURCE
DRAIN
Data Sheet July 1999
4-2
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
IRF720 UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 400 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 400 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID3.3
2.1 A
A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM 13 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
GS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD50 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.4 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 190 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ= 25oC to 125oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V, (Figure 10) 400 - - V
Gate Threshold Voltage VGS(TH) VDS = VGS, ID = 250µA 2.0 - 4.0 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V (Figure 7) 3.3 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = 1.8A, VGS = 10V, (Figures 8, 9) - 1.5 1.8
Forward Transconductance (Note 2) gfs VDS 10V, ID = 2.0A, (Figure 12) 1.7 2.7 - S
Turn-On Delay Time td(ON) VDD = 200V, ID3.3A, RGS = 18Ω, VGS = 10V,
RL = 59
MOSFETSwitchingTimesareEssentiallyIndependent
of Operating Temperature
-1015ns
Rise Time tr-1421ns
Turn-Off Delay Time td(OFF) -3045ns
Fall Time tf-1320ns
Total Gate Charge
(Gate to Source + Gate to Drain) Qg(TOT) VGS = 10V, ID = 3.3A, VDS = 0.8 x Rated BVDSS
IG(REF) = 1.5mA, (Figure 14)
Gate Charge is Essentially Independent of Operating
Temperature
-1220nC
Gate to Source Charge Qgs - 2.0 - nC
Gate to Drain “Miller” Charge Qgd - 6.0 - nC
Input Capacitance CISS VDS = 25V, VGS = 0V, f = 1MHz, (Figure 10) - 360 - pF
Output Capacitance COSS -55-pF
Reverse Transfer Capacitance CRSS -20-pF
Internal Drain Inductance LDMeasured From the Contact
Screwon Tabto Centerof Die Modified MOSFET
Symbol Showing the
Internal Device
Inductances
- 3.5 - nH
Measured From the Drain
Lead, 6mm (0.25in) From
Package to Center of Die
- 4.5 - nH
Internal Source Inductance LSMeasured From the Source
Lead, 6mm (0.25in) from
Header to Source Bonding
Pad
- 7.5 - nH
Thermal Resistance, Junction to Case RθJC - - 2.5 oC/W
Thermal Resistance, Junction to Ambient RθJA Free Air Operation - - 80 oC/W
LS
LD
G
D
S
IRF720
4-3
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET Symbol
Showing the Integral
Reverse P-N Junction
Rectifier
- - 3.3 A
Pulse Source to Drain Current (Note 3) ISDM - - 13 A
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 3.3A, VGS = 0V, (Figure 13) - - 1.6 V
Reverse Recovery Time trr TJ = 25oC, ISD = 3.3A, dISD/dt = 100A/µs 120 - 600 ns
Reverse Recovery Charge QRR TJ = 25oC, ISD = 3.3A, dISD/dt = 100A/µs 0.64 - 3.0 µC
NOTES:
2. Pulse test: pulse width 300µs, duty cycle 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ= 25oC, L = 31µH, RGS = 25Ω, peak IAS = 3.3A.
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
G
D
S
0 50 100 150
0
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
0.2
0.4
0.6
0.8
1.0
1.2
2
1
025 50 75 100 125 150
4
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
5
3
t1, RECTANGULAR PULSE DURATION (s)
10
ZθJC, TRANSIENT
THERMAL IMPEDANCE (oC/W)
10-3 10-2 0.1 1
10-5 10-4
1.0
0.01
0.1
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
PDM
t1
t2
SINGLE PULSE
0.1
0.02
0.2
0.5
0.01
0.05
3.0
IRF720
4-4
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves
Unless Otherwise Specified (Continued)
VDS, DRAIN TO SOURCE VOLTAGE (V)
10
0.1
10
1
ID, DRAIN CURRENT (A)
100
102
DC
100µs
10µs
1ms
10ms
1
103
LIMITED BY rDS(ON)
AREA MAY BE
OPERATION IN THIS
TJ = MAX RATED
TC = 25oC
SINGLE PULSE 0
1
040 80 120 200
2
3
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
4
160
5
VGS = 5.0V
VGS = 6.0V
VGS = 5.5V
VGS = 4.5V
VGS = 4.0V
VGS = 10V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0
1
0369 15
2
3
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
4
12
5
VGS = 5.0V
VGS = 10V
VGS = 6.0V
VGS = 5.5V
VGS = 4.5V
VGS = 4.0V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
024
0.01
1
10
ID, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
TJ = 150oCTJ = 25oC
0.1
6810
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS 50V
0
2
0369 15
4
6
rDS(ON), DRAIN TO SOURCE
ID, DRAIN CURRENT (A)
8
12
10
ON RESISTANCE
VGS = 20V
VGS = 10V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
3.0
2.4
1.8
1.2
0.6
0-60 -40 -20 0 20 40 60 80 100 120 140 160
rDS(ON), NORMALIZED ON RESISTANCE
TJ, JUNCTION TEMPERATURE (oC)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 10V, ID =1.8A
IRF720
4-5
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves
Unless Otherwise Specified (Continued)
1.25
1.15
1.05
0.95
0.85
0.75
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ, JUNCTION TEMPERATURE (oC)
ID = 250µA
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
1000
800
600
400
200
012 5102 5
102
C, CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
COSS
CRSS
CISS
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGS
ID, DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE (S)
001234
1
2
3
4
5
5
TJ = 150oC
TJ = 25oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
00.4 0.8
0.1
10
102
ISD, SOURCE TO DRAIN CURRENT (A)
VSD, SOURCE TO DRAIN VOLTAGE (V)
TJ = 150oC
1
1.2 1.6 2.0
TJ = 25oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
Qg, GATE CHARGE (nC)
VGS, GATE TO SOURCE VOLTAGE (V)
00481216
4
8
12
20
VDS = 320V
20
16
ID = 3.3A
VDS = 200V
VDS = 80V
IRF720
4-6
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
tP
VGS
0.01
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-VDD
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%
50%
10% PULSE WIDTH
VGS
0
0
0.3µF
12V
BATTERY 50k
VDS
S
DUT
D
G
IG(REF)
0
(ISOLATED
VDS
0.2µF
CURRENT
REGULATOR
ID CURRENT
SAMPLING
IG CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
SAME TYPE
AS DUT Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
IG(REF)
0
IRF720
4-7
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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IRF720