QS74FCT16373ATPA - Integrated Device Technology, Inc.

MDSL-00068-00 QUALITY SEMICONDUCTOR, INC. 21

MARCH 10, 1998

QS74FCT16373T, 162373T ADVANCE INFORMATION

Now an Company

FEATURES/BENEFITS

• Pin and function compatible with T.I.

Widebus™ and IDT Double-Density™ families

• CMOS power levels: <1µW typical standby

• SSOP (PV) and TSSOP (PA) packages

• Low output skew: 0.5ns tSK(O)

• Flow-through pinout for easy layout

• Power off disable allows hot plugging

• Industrial temperature: –40°C to +85°C

• Input hysteresis for noise immunity

• Multiple power and ground pins for low noise

• Std., A, and C speed grades: 4.2ns tPD for C

FCT16373T

• High drive standard FCT-T outputs:

IOL = +64mA, IOH = –32mA

• Incident switching for driving buses and large

loads

FCT162373T

• Balanced output drivers: ±24mA

• Reduced switching noise for point to point

signals

High-Speed CMOS

16-Bit Transparent Latches

QS74FCT16373T

QS74FCT162373T

ADVANCE

INFORMATION

DESCRIPTION

The FCT16373 family of products are 16-bit buffered

latches with three-state outputs that are ideal for

driving address and data buses. The output enable

and latch enable controls are organized to operate

each device as two 8-bit latches, or one 16-bit latch.

Easy board layout is facilitated by the use of flow-

through pinouts and byte enable controls provide

architectural flexibility for systems designers. All

outputs have ground bounce suppression circuitry

(see QSI Application Note AN-01) and many power

and ground pins provide low ground bounce. To

accommodate hot-plug or live insertion applications,

both versions of this product were designed not to

load an active bus when VCC is removed. In applica-

tions where bus signals are point-to-point or driving

light capacitance loads, the balanced drive

FCT162373 is recommended.

UALITY

EMICONDUCTOR,

NC.

To 7 Other Channels

2OE

2LE

2D1 2O1

To 7 Other Channels

1OE

1LE

1D1 1O1

Figure 1. Functional Block Diagram

22 QUALITY SEMICONDUCTOR, INC. MDSL-00068-00

MARCH 10, 1998

QS74FCT16373T, 162373T ADVANCE INFORMATION

Now an Company

Figure 2. Pin Configuration (All Pins Top View)

Pins Typ Max Unit

All 6.0 9.0 pF

Note: Capacitance is characterized but not tested.

Table 3. Capacitance

TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V

Internal

Inputs Q Outputs

xOExOE

xOE xLE xDx Value xOx Function

H X X X Hi-Z Disable Outputs

L L X H H Enable Outputs

LLX L L

L H L L L Pass Inputs

LHH H H

L L X Q Q Hold Prior Data

Table 2. Function Table

Name I/O Description

xDx I Data Inputs

xOx O Data Outputs

xLE I Latch Enable

xOE I Output Enable

Table 1. Pin Description

1OE

1O1

1O2

GND

1O3

1O4

1O5

1O6

GND

1O7

1O8

2O1

2O2

GND

2O3

2O4

2O5

2O6

GND

2O7

2O8

2OE

1LE

1D1

1D2

GND

1D3

1D4

1D5

1D6

GND

1D7

1D8

2D1

2D2

GND

2D3

2D4

2D5

2D6

GND

2D7

2D8

2LE

SSOP, TSSOP

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MARCH 10, 1998

QS74FCT16373T, 162373T ADVANCE INFORMATION

Now an Company

Table 4. Absolute Maximum Ratings

Supply Voltage to Ground...............................................–0.5V to +7.0V

DC Output Voltage VOUT ................................................–0.5V to +7.0V

DC Input Voltage VIN.......................................................–0.5V to +7.0V

AC Input Voltage (for a pulse width ≤ 20ns) ................................. –3.0V

DC Input Diode Current with VIN < 0 ........................................... –20mA

DC Output Diode Current with VOUT < 0 ..................................... –50mA

DC Output Current Max. Sink Current/Pin.................................. 120mA

Maximum Power Dissipation ................................................... 1.0 watts

TSTG Storage Temperature............................................. –65° to +150°C

Note: Stresses greater than

those listed under ABSOLUTE

MAXIMUM RATINGS may

cause permanent damage to

this device resulting in func-

tional or reliability type failures.

Symbol Parameter Min Max Unit

VCC Supply Voltage 4.5 5.5 V

VIN Input Voltage –0.5 5.5 V

VOUT Voltage Applied to Output or I/O 0 VCC V

∆t/∆v Input Transition Slew Rate — 10 ns/V

TAOperating Free Air Tempeature –40 +85 °C

Table 5. Recommended Operating Conditions

Table 6. DC Electrical Characteristics Over Operating Range

Recommended Operating Ranges apply unless otherwise noted.

Notes:

1. For conditions shown as Min. or Max. use appropriate value specified under Recommended Operating Conditions

for the applicable device type.

2. Typical values indicate VCC = 5.0V and TA = 25°C.

3. Not more than one output should be tested at one time. Duration of test should not exceed one second.

4. These parameters are guaranteed by design but not tested.

Symbol Parameter Test Conditions(1) Min Typ(2) Max Unit

VIH Input HIGH Voltage Logic HIGH for All Inputs 2.0 — — V

VIL Input LOW Voltage Logic LOW for All Inputs — — 0.8 V

∆VTInput Hysteresis VTLH – VTHL for All Inputs(4) — 100 — mV

| IIH | Input Current VCC = Max., 0 ≤ VIN < VCC —— 1µA

| IIL | Input HIGH or LOW

| IOZ | Off-State Output VCC = Max., 0 ≤ VOUT ≤ VCC —— 1µA

Current (Hi-Z)

IOS Short Circuit Current VCC = Max., VOUT = GND(3,4) –80 –140 –225 mA

VIK Input Clamp Voltage VCC= Min., IIN = –18mA – –0.7 –1.2 V

24 QUALITY SEMICONDUCTOR, INC. MDSL-00068-00

MARCH 10, 1998

QS74FCT16373T, 162373T ADVANCE INFORMATION

Now an Company

Table 7. Output Drive Characteristics for FCT16373T

Symbol Parameter Test Conditions(1) Min Typ(2) Max Unit

IOOutput Drive Current VCC = Max, VOUT = 2.5V(3) –50 — –180 mA

VOH Output HIGH Voltage VCC = Min. IOH = –3mA 2.5 — — V

VIN = VIH or VIL IOH = –15mA 2.4 — — V

IOH = –32mA(4) 2.0 — — V

VOL Output LOW Voltage VCC = Min. IOL = 64mA — 0.2 0.55 V

VIN = VIH or VIL

IOFF Input/Output Power VCC = 0V, VIN or VOUT ≤ 4.5V — — ±1.0 µA

Off Leakage

Table 8. Output Drive Characteristics for FCT162373T

Symbol Parameter Test Conditions(1) Min Typ(2) Max Unit

IODL Output LOW Current VCC = 5V, VIN = VIH or VIL 60 115 200 mA

VOUT = 1.5V(3)

IODH Output HIGH Current VCC = 5V, VIN = VIH or VIL –60 –115 –200 mA

VOUT = 1.5V(3)

VOH Output HIGH Voltage VCC = Min. IOH = –24mA 2.4 3.3 — V

VIN = VIH or VIL

VOL Output LOW Voltage VCC = Min. IOL = 24mA — 0.3 0.55 V

VIN = VIH or VIL

Notes:

1. For conditions shown as Min. or Max. use appropriate value specified under Electrical Characteristics for the

applicable device type.

2. Typical values indicate VCC = 5.0V and TA = 25°C.

3. Not more than one output should be shorted and the duration is ≤1 second.

4. Duration of the condition should not exceed one second.

MDSL-00068-00 QUALITY SEMICONDUCTOR, INC. 25

MARCH 10, 1998

QS74FCT16373T, 162373T ADVANCE INFORMATION

Now an Company

Symbol Parameter Test Conditions(1) Typ (2) Max Unit

ICCQ Quiescent Power VCC = Max., Freq = 0 5 500 µA

Supply Current VIN = GND or VCC

∆ICC Supply Current per VCC = Max., VIN = 3.4V(3) 0.5 1.5 mA

Input @ TTL HIGH

QCCD Supply Current per VCC = Max., Outputs Open 60 100 µA/

Input per MHz(4) One Bit Toggling @ 50% Duty Cycle MHz

xOE = GND

ICTotal Power VCC = Max., Outputs Open VIN = VCC 0.6 1.5 mA

Supply Current(6) One Bit Toggling VIN = GND

@ 50% Duty Cycle VIN = 3.4V 0.9 2.3 mA

xOE = GND, fI = 10MHz VIN = GND

VCC = Max., Outputs Open VIN = VCC 2.4 4.5(5) mA

Sixteen Bits Toggling VIN = GND

@ 50% Duty Cycle VIN = 3.4V 6.4 16.5(5) mA

xOE = GND, fI = 2.5MHz VIN = GND

Table 9. Power Supply Characteristics

Notes:

1. For conditions shown as Min. or Max., use the appropriate values specified under Recommended Operating Conditions

for applicable device type.

2. Typical values are at VCC = 5.0V, +25°C ambient.

3. Per TTL driven input (VIN = 3.4V). All Other Inputs at VCC or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the ICC formula. These limits are guaranteed by design but not tested.

6. IC = IQUIESCENT + IINPUTS = IDYNAMIC.

IC = ICCQ + ∆ICC DHNT + ICCD (fCPNCP/2 + fINI).

ICCQ = Quiescent Current (ICCL, ICCH, and ICCZ).

∆ICC = Power Supply Current for a TTL-High Input (VIN = 3.4V).

DH = Duty Cycle for TTL High Inputs.

NT = Number of TTL High Inputs.

ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL).

fCP = Clock Frequency for Register devices (Zero for Non-Register Devices).

NCP = Number of Clock Inputs at fCP.

fI = Input Frequency.

NI = Number of Inputs at fI.

26 QUALITY SEMICONDUCTOR, INC. MDSL-00068-00

MARCH 10, 1998

QS74FCT16373T, 162373T ADVANCE INFORMATION

Now an Company

FCT16373T FCT16373AT FCT16373CT

FCT162373T FCT162373AT FCT162373CT

Symbol Description(1) Min Max Min Max Min Max Unit

tPHL Propagation Delay 1.5 8.0 1.5 5.2 1.5 4.2 ns

tPLH xDx to xOx

tPHL Propagation Delay 2.0 13.0 2.0 8.5 2.0 5.5 ns

tPLH xLE to xOx

tPZH Output Enable Time 1.5 12.0 1.5 6.5 1.5 5.5 ns

tPZL xOE to xOx

tPHZ Output Disable Time(2) 1.5 7.5 1.5 5.5 1.5 5.0 ns

tPLZ xOE to xOx

tSData Setup Time 2.0 — 2.0 — 2.0 — ns

xDx to xLE HIGH to LOW

tHData Hold Time 1.5 — 1.5 — 1.5 — ns

xDx to xLE HIGH to LOW

tWLE Pulse Width 6.0 — 5.0 — 5.0 — ns

HIGH

tSK(O) Output Skew(3) — 0.5 — 0.5 — 0.5 ns

Table 10. Switching Characteristics Over Operating Range

Recommended Operating Ranges apply unless otherwise specified.

CLOAD = 50pF, RLOAD = 500Ω unless otherwise noted.

Notes:

1. Minimums guaranteed but not tested on propagation delays. See Test Circuit and Waveforms.

2. Guaranteed by design, but not tested.

3. Skew between any two outputs of the same package switching in the same direction. This parameter is

guaranteed by design but not tested.