Semiconductor
MSC23136D/DL-xxBS10/DS10
1,048, 576- word x 36- bit DY NAMIC RAM MO DULE : FAST PAGE MODE TY P E
This vers ion: Feb. 23. 199
9
DESCRIPTION
The MSC23136D/DL-xxBS10/DS10 is a fully decoded, 1,048,576-word x 36-bit CMOS dynamic random access
memory module composed of eight 4Mb DRAMs in SOJ packages and two 2Mb DRAMs in SOJ packages mounted
with t en dec oupli ng capacitors on a 72-pin glass epox y si ngle-inline package. T his module supports any appli c ation
where high density and large capacity of storage memory are required. The MSC23136DL (the low -power version) is
specially desi gned for lower-power appli c ations.
FEATURES
· 1, 048,576-word x 36- bit or ganizat ion
· 72-pin socket insertable m odule
MSC23136D/ DL- xxBS10 : Gold tab
MSC23136D/ DL- xxDS10 : S older t ab
· Singl e +5V supply ± 10% tol er anc e
· I nput : T TL compatible
· Output : TTL compatible, 3-state
· Refresh : 1024cycles/16ms (1024cycles/128m s: L-version)
· / CA S befor e /RAS refr esh, hidden refresh, /RAS only refresh capability
· F ast page mode capability
· Multi-bit t est mode capability
PRODUCT FAMILY
Access Time (Max.) Power Dissipat i on
Family tRAC tAA tCAC
Cycle
Time
(Min.) Operating(Max.) Standby(Max.)
MSC23136D/DL-60BS10/DS10 60ns 30ns 15ns 110ns 4840mW
MSC23136D/DL-70BS10/DS10 70ns 35ns 20ns 130ns 4290mW 55mW/
9.9mW(L-version)
Semiconductor MSC23136D/DL
MODULE OUTLINE
172
R1.57
6.35 1.04Typ.1.27±0.1
95.25
2.03Typ.
6.35Typ.
Typ.
6.35
Typ.
10.16
(
3.18
25.4±0.2
101.19Typ.
107.95±0.2*1
3.38Typ.
3.7Min.
5.28Max.
+0.1
-0.08
1.27
(Un i t : m m)
MSC23136D/DL-xxBS10/DS10
*1 The common size difference of the board width 12.5mm of its height is specified as ±0.2.
The value above 12.5mm is specified as ±0.5.
Semiconductor MSC23136D/DL
PIN C ONFIGURATI ON
Pin No. Pin Na me Pin No. Pin Na me Pin No. Pin Na me Pin No. Pin Na me
1V
SS 19 NC 37 DQ17 55 DQ12
2 DQ0 20 DQ4 38 DQ35 56 DQ30
3 DQ18 21 DQ22 39 VSS 57 DQ13
4 DQ1 22 DQ5 40 /CAS0 58 DQ31
5 DQ19 23 DQ23 41 /CAS2 59 VCC
6 DQ2 24 DQ6 42 /CAS3 60 DQ32
7 DQ20 25 DQ24 43 /CAS1 61 DQ14
8 DQ3 26 DQ7 44 /RAS0 62 DQ33
9 DQ21 27 DQ25 45 NC 63 DQ15
10 VCC 28 A7 46 NC 64 DQ34
11 NC 29 NC 47 /WE 65 DQ16
12 A0 30 VCC 48 NC 66 NC
13 A1 31 A8 49 DQ9 67 PD1
14 A2 32 A9 50 DQ27 68 PD2
15 A3 33 NC 51 DQ10 69 PD3
16 A4 34 /RAS2 52 DQ28 70 PD4
17 A5 35 DQ26 53 DQ11 71 NC
18 A6 36 DQ8 54 DQ29 72 VSS
Presence Det ect P ins
Pin No. Pin Na me MSC23136D/DL
-60BS10/DS10 MSC23136D/DL
-70BS10/DS10
67 PD1 VSS VSS
68 PD2 VSS VSS
69 PD3 NC VSS
70 PD4 NC NC
Semiconductor MSC23136D/DL
BLOCK DIAGRAM
/WE
/CAS0
/RAS0
A0-A9
/CAS1
DQ0A0-A9 DQ
DQ
DQ
DQ
/OE
VCC
/RAS
/CAS
/WE
VSS
DQ1
DQ2
DQ3
DQ8A0-A9 DQ1
DQ2
/OE
VCC
/RAS
/CAS1
/WE VSS
DQ17
/CAS2
VCC
VSS C1-C10
A0-A9 DQ
DQ
DQ
DQ
/OE
VCC
/RAS
/CAS
/WE
VSS
DQ4
DQ5
DQ6
DQ7
A0-A9 DQ
DQ
DQ
DQ
/OE
VCC
/RAS
/CAS
/WE
VSS
DQ9
DQ10
DQ11
DQ12
A0-A9 DQ
DQ
DQ
DQ
/OE
/RAS
/CAS
/WE
DQ13
DQ14
DQ15
DQ16
DQ18
A0-A9 DQ
DQ
DQ
DQ
/OE
/RAS
/CAS
/WE
DQ19
DQ20
DQ21
VCC VSS
VCC VSS
DQ22A0-A9 DQ
DQ
DQ
DQ
/OE
/RAS
/CAS
/WE
DQ23
DQ24
DQ25
VCC VSS
DQ26A0-A9 DQ1
DQ2
/OE
VCC
/RAS
/CAS1
/WE VSS
DQ35
/CAS2
DQ27
A0-A9 DQ
DQ
DQ
DQ
/OE
/RAS
/CAS
/WE
DQ28
DQ29
DQ30
VCC VSS
DQ31A0-A9 DQ
DQ
DQ
DQ
/OE
/RAS
/CAS
/WE
DQ32
DQ33
DQ34
VCC VSS
/CAS2
/RAS2
/CAS3
Semiconductor MSC23136D/DL
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings ( Ta = 25°C )
Parameter Symbol Rating Unit
Vol t age on Any Pin Relati ve to VSS VIN, VOUT -1.0 to +7.0 V
Vol tage on VCC Supply Relative to VSS VCC -1.0 to +7.0 V
Short Ci r cuit Output Current IOS 50 mA
Power Dissipation PD10 W
Operating Temperature TOPR 0 to +70 °C
Storage Temperature TSTG -40 to +125 °C
Recommen ded O perating Conditions ( Ta = 0°C to +70°C )
Parameter Symbol Min. Typ. Max. Unit
VCC 4.5 5.0 5.5 V
Power Supply Vol tage VSS 000V
Input High Volt age VIH 2.4 - 6.5 V
Input Low Voltage VIL -1.0 - 0.8 V
Capacitance ( VCC = 5V ± 10%, Ta = 25°C, f = 1 MHz )
Parameter Symbol Typ. Max. Unit
Input Capacitance (A0 - A9) CIN1 -70pF
Input Capaci t ance (/WE) CIN2 -80pF
Input Capaci t ance (/RAS0, /RAS2) CIN3 -43pF
Input Capaci t ance (/CAS0- /CAS3) CIN4 -24pF
I/O Capacitance (DQ0 - DQ35) CDQ -13pF
Note: Capaci tance measured with Boonton M eter.
Semiconductor MSC23136D/DL
DC Characteristics (VCC = 5V ± 10%, Ta = 0°C to +70°C )
MSC23136D/DL
-60BS10/DS10 MSC23136D/DL
-70BS10/DS10
Parameter Symbo
lCondition
Min. Max. Min. Max.
Unit Note
Input Leakage Current ILI
0V ≤ VIN ≤ 6.5V:
All ot her pins not
under test = 0V -100 100 -100 100 µA
Out put Leakage Current ILO Dat a out is disabl e
0V ≤ VOUT ≤ 5.5V -10 10 -10 10 µA
Out put Hi gh Voltage VOH IOH = -5.0mA 2.4 VCC 2.4 VCC V
Out put Low Voltage VOL IOL = 4.2mA 0 0.4 0 0.4 V
Average Power Supply Curr ent
(Operating) ICC1
/RAS cy c lin g ,
/CAS cy c lin g ,
tRC = min. - 880 - 780 m A 1, 2
TTL - 20 - 20 mA 1
-10-10mA1
Power supply curr ent
(Standby) ICC2 / RAS = VIH
/CAS = VIH MOS - 1.8 - 1.8 mA 1, 5
Average Power Supply Curr ent
(/RAS only r efresh) ICC3
/RAS cy c lin g ,
/CAS = VIH,
tRC = min. - 880 - 780 m A 1, 2
Average Power Supply Curr ent
(/CAS before /RAS refresh) ICC6 tRC = min. - 880 - 780 mA 1, 2
Average Power Supply Curr ent
(Fast Page Mode) ICC7
/RAS = VIL,
/CAS cy c lin g ,
tPC = m i n. - 680 - 590 m A 1, 3
Average Power Supply Curr ent
(Battery Backup) ICC10
tRC = 125µs,
/CAS before /RAS
cycling - 2.8 - 2.8 mA 1, 4, 5
Notes: 1. ICC is dependent on output loading and cycles rates. Specified values are obtained with the output open.
2. Address can be changed once or less while /RA S = VIL.
3. Address can be changed once or less while /CA S = VIH.
4. VCC - 0. 2V ≤ VIH ≤ 6.5V, - 1. 0V ≤ VIL ≤ 0.2V.
5. L-version.
Semiconductor MSC23136D/DL
AC Characteristics (1/2) (VCC = 5V ± 10% , Ta = 0°C to +70°C ) Not e: 1, 2, 3, 9, 10
MSC23136D/DL
-60BS10/DS10 MSC23136D/DL
-70BS10/DS10
Parameter Symbol
Min. Max. Min. Max.
Unit Note
Random Read or Wr ite Cycle Time tRC 110 - 130 - ns
Fast Page Mode Cycle Ti me tPC 40 - 45 - ns
Access Time from /RAS tRAC - 60 - 70 ns 4, 5, 6
Access Time from /CAS tCAC - 15 - 20 ns 4, 5
Access Time from Column Address tAA - 30 - 35 ns 4, 6
Access Time from /CAS Precharge tCPA - 35 - 40 ns 4
Out put Low Impedance Time from /CAS tCLZ 0-0-ns4
/CAS to Data Output Buffer Turn-off Delay Time tOFF 0 15 0 20 ns 7
Transi t ion Time tT3 50 3 50 ns 3
Refresh Period tREF -16-16ms
Refresh Period (L- version) tREF - 128 - 128 ms
/RAS Pr echarge Time tRP 40 - 50 - ns
/RAS Pulse Wi d th tRAS 60 10K 70 10K ns
/RAS Pulse Widt h ( Fast Page Mode) tRASP 60 100K 70 100K ns
/RAS Hold Time tRSH 15 - 20 - ns
/CAS Precharge Time (Fast Page Mode) tCP 10 - 10 - ns
/CAS Pulse Wi d th tCAS 15 10K 20 10K ns
/CAS Hold Time tCSH 60 - 70 - ns
/CAS t o /RAS Prechar ge Time tCRP 5-5-ns
/RAS Hold Time from /CAS Precharge tRHCP 35 - 40 - ns
/RAS to /CAS Delay Time tRCD 20 45 20 50 ns 5
/RAS to Column Address Delay Tim e tRAD 15 30 15 35 ns 6
Row Address Set-up Tim e tASR 0-0-ns
Row Address Hol d Ti me tRAH 10 - 10 - ns
Column Address Set-up Time tASC 0-0-ns
Col u mn Add ress Hol d Ti me tCAH 15 - 15 - ns
Column Address Hold Tim e from /RAS tAR 50 - 55 - ns
Column Address to /RAS Lead Time tRAL 30 - 35 - ns
Read Command Set-up Tim e tRCS 0-0-ns
Read Command Hol d Time tRCH 0-0-ns8
Read Command Hol d Time referenced to /RAS t RRH 0-0-ns8
Semiconductor MSC23136D/DL
AC Characteristics (2/2) (VCC = 5V ± 10% , Ta = 0°C to +70°C ) Not e: 1, 2, 3, 9, 10
MSC23136D/DL
-60BS10/DS10 MSC23136D/DL
-70BS10/DS10
Parameter Symbol
Min. Max. Min. Max.
Unit Note
W r ite Command Set-up Time tWCS 0-0-ns
W r ite Command Hold Time tWCH 10 - 10 - ns
W r ite Command Hold Time from /RAS tWCR 45 - 50 - ns
W r ite Command Pulse Wi dt h tWP 10 - 10 - ns
W r ite Command to / RAS Lead Tim e tRWL 15 - 20 - ns
W r ite Command to / CAS Lead Tim e tCWL 15 - 20 - ns
Data-i n Set-up Time tDS 0-0-ns
Dat a-i n Ho ld Time tDH 15 - 15 - ns
Data-in Hold Time from /RAS tDHR 50 - 55 - ns
/CAS Active Delay Time from /RAS Precharge tRPC 10 - 10 - ns
/RAS to /CAS Set-up Time
(/ CAS b efore /RAS) tCSR 5-5-ns
/RAS to /CAS Hold Tim e
(/ CAS b efore /RAS) tCHR 10 - 10 - ns
/WE to /RAS Precharge Time
(/ CAS b efore /RAS) tWRP 10 - 10 - ns
/WE Hold Time from /RAS
(/ CAS b efore /RAS) tWRH 10 - 10 - ns
/RAS to /WE Set-up Time
(Test Mode) tWTS 10 - 10 - ns
/RAS to /WE Hold Tim e
(Test Mode) tWTH 10 - 10 - ns
Semiconductor MSC23136D/DL
Notes: 1. A start- up delay of 200µs is required after power-up, fol lowed by a m ini mum of eight initializat ion cycles
(/RA S only refr esh or / CA S befor e /RAS refr esh) before pr oper device operat ion i s achieved.
2. The AC c har ac teri stics assum es tT = 5ns.
3. VIH(Min. ) and VIL(Max .) are ref erence lev el s for measuri ng input t im ing signal s. Transit ion ti me ( tT) are
m easured bet ween VIH and VIL.
4. This parameter i s measured with a load c ircuit equivalent to 2TT L loads and 100pF.
5. Operation within the tRCD(M ax. ) li mit ensures that t RAC(Max . ) can be met.
tRCD(Max.) is s pecified as a reference point only . If tRCD is greater than the s pecified tRCD(Max.) limit, then
the acc ess ti me is controlled by tCAC.
6. Operation within the tRAD(Max.) li mit ensures that tRAC(Max. ) can be met.
tRAD(Max.) is s pecified as a reference point only. If tRAD is greater than the specified tRAD(Max.) limit, then
the acc ess ti me is controlled by tAA.
7. tOFF(Max.) define the time at w hich the output achieves the open circuit condition and are not referenced
to out put voltage levels.
8. tRCH or tRRH must be satisfied for a read cycle.
9. The test mode is initiated by performing a /WE and /CAS before /RAS refresh cycle. This mode is
latched and remains in effect until the exit cycle is generated. The test mode specified in this data sheet
is a 2-bit parall el test function. CA0 is not used. In a read cycle, if al l internal bits are equal , t he DQ pin
will indicate a high lev el. If any internal bits are not equal, the DQ pin will indicate a low lev el.
The test m ode i s cleared and t he mem ory dev i ce r eturned t o i ts norm al operating stat e by a / RAS onl y
refresh or /CAS before /RAS ref resh cycle.
10. In a test mode read cycle, the value of access time parameters is delayed for 5ns for the specified value.
These parameters should be specified in test mode cycle by adding the abov e value to the specified
value in this data sheet.
