Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Single Step-up DC/DC Controller
FeaturesGeneral Description
Applications
The APW7078 is a single PWM, step-up DC-DC control-
ler with low operating voltage application integrating soft-
start and short circuit detection function. The oscillator
switching frequency on chip can be operated by terminat-
ing OSC pin to connect capacitor and resistor for adjust-
able operating frequency. Soft-start is adjusted with the
external capacitor, which sets the input current ramp.
Besides, the external compensation FB pin will apply the
flexibility in the dynamic loop status, which allows using
small and low equivalent series resistance (ESR) ce-
ramic output capacitors.
Pin Configuration
APW7078
1
2
3
4 5
6
7
8INV
VDD
SCP
CTL OUT
GND
OSC
FB
1
2
3
4 5
6
7
8INV
VDD
SCP
CTL OUT
GND
OSC
FB
•2.5 to 5.5V Input Voltage Range
•Adjustable Frequency: Maximum 1MHZ
•Incorporates Soft-Start Function
•Built-in Short-Circuit Detection Circuit (SCP)
•Low Operating Current: Maximum to 1mA
•Low Shutdown Current: Maximum to 1µA
•Package: SOP-8, MSOP-8, TDFN2x2-8 and
TSSOP-8
•Under-Voltage Lockout
•Lead Free and Green Devices Available
(RoHS Compliant)
•LCD Display Power Source
•Camcorders VCRs, MP3, and Digital Still Camera
•Hand-held and Communication Instruments
•PDAs
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw2
Ordering and Marking Information
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Symbol
Parameter Rating Unit
VDD Supply Voltage -0.3 to 7 V
VIO Input / Output Pins -0.3 to 7 V
TA Operating Ambient Temperature Range -40 to 85 °C
TJ Junction Temperature Range -40 to 150 °C
TSTG Storage Temperature Range -65 to +150 °C
TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 °C
Absolute Maximum Ratings
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under
"recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability
Recommended Operating Conditions
Rating
Symbol
Parameter Min. Typ. Max. Unit
VDD Supply Voltage 2.5 - 5.5 V
VINV Error Amplifier Invert Input Voltage -0.2 - 1 V
APW7078 Package Code
K : SOP-8 X : MSOP-8 O : TSSOP-8 QB : TDFN2x2-8
Temperature Range
I : -40 to 85 C
Handling Code
TR : Tape & Reel
Assembly Material
L : Lead Free Device
G : Halogen and Lead Free Device
Handling Code
Temperature Range
Package Code
APW7078 X :W7078
XXX XXXXX - Date Code
APW7078
XXXXX
APW7078 O :XXXXX - Date Code
XX
Assembly Material
APW7078 K :APW7078
XXXXX XXXXX - Date Code
7078
● X
APW7078 QB : X - Date Code
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw3
Electrical Characteristics
(TA = 25°C, VDD = 3.3V, unless otherwise specified)
APW7078
Symbol
Parameter Test Conditions Min. Typ. Max. Unit
ENTIRE DEVICE
VDD Supply Voltage 2.5 - 5.5 V
IDD Supply Current VDD=2.5V to 5.5V - 0.7 1 mA
ISD Shutdown Current CTL pin open or VDD - 0.1 1 µA
DMAX Maximum Duty Cycle RT =3.3K, CT =270pF 80 85 92 %
UNDER-VOLTAGE LOCKOUT PROTECTION
VTH VDD Startup Threshold Voltage 2.0 - 2.4 V
VR Hysteresis voltage - - 150 - mV
SOFT-START
VSS Voltage at Soft-Start Completion - 0.7 0.8 0.9 V
ICS Soft-Start Charge Current VSCP =0V -0.7 -1.0 -1.5 µA
VSS Voltage at Soft-Start Completion - 0.7 0.8 0.9 V
ICS Soft-Start Charge Current VSCP =0V -0.7 -1.0 -1.5 µA
SHORT CIRCUIT PROTECTION (SCP)
VSCP Threshold Voltage 0.7 0.8 0.9 V
ISCP Charge Current VSCP =0V -0.7 -1.0 -1.5 µA
SAWTOOTH WAVEFORM OSCILLATOR (OSC)
FOSC Oscillator Frequency RT =3.3kΩ, CT =270pF 500 600 700 kHz
FDV Frequency Stability for Voltage VDD=2.5V to 5.5V - 2 5 %
FDT Frequency Stability for
Temperature TA=-40°C to 85°C - 5 - %
Recommended Operating Conditions (Cont.)
Rating
Symbol
Parameter Min. Typ. Max. Unit
VCTL Control Pin Input Voltage -0.2 - VDD V
CSCP SCP Pin Capacitor - 0.1 - µF
RT Timing Resistance 1.0 3.3 10 kΩ
CT Timing Capacitor 100 - 270 pF
FSW Oscillator Frequency 200 600 1000 kHz
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw4
Electrical Characteristics (Cont.)
(TA = 25°C, VDD = 3.3V, unless otherwise specified)
APW7078
Symbol
Parameter Test Conditions Min. Typ. Max.
Unit
ERROR AMPLIFIER
VREF Reference Voltage VFB=INV 0.493
0.5 0.508
V
VREF Stability VDD=2.5V to 5.5V -
5 20 mV
VREF Variation with Temperature
TA =-40°C to 85°C -
1 -
%
gm Transconductance 1000
1300
1600
µA/V
IB Input Bias Current INV=0V -
-
1 µA
VOH - 1.6 1.8 -
V
VOL Output Voltage Range - - -
0.01 V
Output Source Current INV=0V,FB=0.5V -150 -180 -210 µA
Output Sink Current INV=1V,FB=0.5V 140 170 200 µA
PWM CONTROLLER DRIVER
ISOURCE Output Source Current Duty<5%, OUT=0V -150 -200 - mA
ISINK Output Sink Current Duty>5%, OUT=5V 150 200 - mA
CONTROL BLOCK
VIL Active mode -
-
0.2VDD
VIH Control Voltage Switch-off mode 0.8VDD
-
-
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw5
Pin Description
PIN NO. SYMBOL I/O FUNCTION
1 INV I Internal 0.5V reference voltage. Use a resistor divider to set the output voltage.
2 SCP - Soft-start and short-circuit detection, connects a capacitor from the pin to ground.
3 VDD - Power supply input pin for IC voltage.
4 CTL I Output control pin. Low = operating mode; High = shutdown mode.
5 OUT O External MOSFET driving pin.
6 GND - Ground pins of the IC.
7 OSC - Setting capacitor and resister to provide oscillation switching frequency adjustment.
8 FB O Error amplifier output pin. Setting circuit for IC compensation.
Exposde
Pad GND - Connect this pad to GND (pin6).
Block Diagram
Output drive
circuit
Soft-start
SCP
Sawtooth wave
oscillator
0.1V
DTC 0.8V
PWM
Comp.
VDD
VDD
0.16V
0.9V
VDD OSC
INV
FB
GND SCP CTL
OUT
Error Amp.
VREF 0.5V +
-
+
-
++
UVLO
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw6
Application Schematic
1
2
3
4
8
7
6
5
INV
SCP
VDD
CTL
FB
OSC
GND
OUT
C3
270pF R4
4.3K C4
0.1µF
R5
2K Q1
APM2300A
150K
R3
R2
9.1K
10µH
L1 D1
SS12
C5
33µF
VOUT
9V
C2
0.1µF
C1
22µF
VIN
2.5V~5.5V
C8
1µF
R6
2R2 100mA
Cp
68pF
C6
0.1µF
Figure 2: APW7078 Step-up Application for Adjustable Voltage
R1
390K
Q2
2N7002
1
2
3
4
8
7
6
5
INV
SCP
VDD
CTL
FB
OSC
GND
OUT
C3
270pF R4
3.3K C4
0.1µF
R5
1K Q1
APM2300A
820K
R3
R2
91K
10µH
L1 D1
SS12
C5
47µF
VOUT
5V
C2
0.1µF
C1
22µF
VIN
2.5V~4.2V
C7
1µF
300mA
Cp
33pF
C6
0.1µF
Figure 1: APW7078 Step-up Application for Adjustable Voltage
R1
390K
Q2
2N7002 *R2≦100kΩ is recommended
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw7
Application Schematic
1
2
3
4
8
7
6
5
INV
SCP
VDD
CTL
FB
OSC
GND
OUT
C3
270pF R4
3.3K C4
0.1µF
R5
1K Q1
APM2300A
1.2M
R3
R2
75K
22µH
L1 D1
SS12
C5
100µFC6
0.1µF
9V
C2
0.1µF
C1
22µF
VIN
3V~3.6V
C7
1µF
R6
2R2
-9V
26V
C8
C9
C10
C11 C12 C13
D2
D3 D4
1µF
1µF
0.1µF
0.1uF
1µF
3.3µF
Figure 3. APW7078 Multiple-output for TFT LCD Panel Power
R10
390K
Q2
2N7002
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw8
Timing Diagram
FB input voltage
Short cirucit detect
comparator
Sawtooth wave output
Soft-start setting voltage
Output pin waveform
SCP pin waveform
Power supply control SW
SCP detect voltage
ON
OFF Output short
circuit
detection
Output
short
circuit Output short circuit
tscp
Soft
start
ts
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw9
Typical Operating Characteristics
(TA = 25°C, VDD = 3.3V, unless otherwise specified)
0
100
200
300
400
500
600
700
800
1 2 3 4 5
Supply Voltage(V)
Supply Current(µA)
Supply Current vs. Supply VoltageSHDN and Release
CH1=VOUT 2V/DIV TIME=20ms/DIV
CH2=VCTL 2V/DIV
CH3=VSS 0.5V/DIV
CH4=IL 1A/DIV
Maximum Duty(%)
TA=25°C
RT=3.3kΩ
CT=270pF
480
484
488
492
496
500
504
508
512
516
520
12345 0.46
0.47
0.48
0.49
0.50
0.51
0.52
0.53
0.54
-40 -20 020 40 60 80
Supply Voltage(V)
Reference Voltage(mV)
Reference Voltage vs. Supply VoltageReference Voltage vs. Temperature
Temperature(°C)
Reference Voltage(V)
TA=25°C
VDD=3.3V
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw10
Typical Operating Characteristics (Cont.)
(TA = 25°C, VDD = 3.3V, unless otherwise specified)
40
50
60
70
80
90
100
10 100 1000
Maximum Duty vs. Oscillator Frequency
Oscillator Frequency(kHz)
Maximum Duty(%)
0
200
400
600
800
1000
0 2 4 6 8 10
Oscillator Frequency vs. Timing Resistor
Oscillator Frequency(kHz)
Timing Resistor(kΩ)
CT=100pF
CT=100pF
CT=270pF
CT=270pF
CT=200pF
IOUT= 5mA, TIME=40ms/DIV
CH1=VOUT 5VDIV
CH2=VOUT=VDD 2V/DIV
CH3=IL 0.5A/DIV
CH4=VSS 1V/DIV
Power on and off under light load
IOUT= 400mA, TIME=40ms/DIV
CH1=VOUT 5VDIV
CH2=VOUT=VDD 2V/DIV
CH3=IL 0.5A/DIV
CH4=VSS 1V/DIV
Power on and off under heavy load
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw11
Typical Operating Characteristics (Cont.)
(TA = 25°C, VDD = 3.3V, unless otherwise specified)
60
65
70
75
80
85
90
95
100
10 100 1000
20
30
40
50
60
70
80
90
100
110 100
Efficiency
Efficiency(%)
Efficiency
Efficiency(%)
Output Current(mA)Output Current(mA)
VOUT=5V
L=10µH
CT=270pF
RT=3.3K
VOUT=9V
L=10µH
CT=270pF
RT=4.3K
VDD=3.3V
VDD=5V
VDD=2.5V VDD=3.3V
VDD=3.6V
-5
-4
-3
-2
-1
0
1
2
3
4
5
-40 -20 020 40 60 80
-10
-8
-6
-4
-2
0
2
4
6
8
10
12345
Frequency Variation Ratio vs. Supply Voltage
Supply Voltage(V)
Frequency Variation RationΔf/f(%)
Frequency Variation RationΔf/f(%)
Frequency Variation Ratio vs. Temperature
Temperature(°C)
TA=25°C
RT=3.3kΩ
CT=270pF
CT=270pF
RT=3.3kΩ
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw12
Function Description
Time
Vosc
t2t1
VH
V(t)
VL
0.9V
0.16V
t
TT
1C370
2mA
0.16V0.9V
Ct
t
V
ci
⋅=
−
=
∆
∆
=
⋅
( )
)R72.1370(CttT
CR72.1V/VlnCRteV)t(V
TT21
TTLHTT2
T
C
T
Rt
H
+=+=
⋅== ⋅=−
Setting Oscillating Frequency
The oscillator circuit generates a triangular sawtooth wave
with a peak of 0.9V and through 0.16V using the timing
capacitor (CT) and the timing resistor (RT) that are con-
nected to OSC pin. This oscillator can provide oscillating
frequency up to 1MHz.
Setting Output Voltage
The output voltage is set using the INV pin and a re-
sistor divider connected to the output is shown in the
Typical Operating Circuit. The internal reference volt-
age is 0.5V with 2% variation, so the ratio of the feedback
resistors sets the output voltage according to the follow-
ing equation:
V5.0
2R3R
1VOUT ×
+=
To avoid the thermal noise from feedback resistor, the
resistance R2 is smaller than 100kΩ and 1% variation is
recommended.
Error Amplifier
The error amplifier detects the output voltage of the switch-
ing regulator and outputs the PWM control signal. The
voltage gain is fixed, and connecting a phase compensa-
tion resistor and capacitor to the FB pin (pin 8) provides
stable phase compensation for the system.
PWM Comparator
The voltage comparator has one inverting and three non-
inverting inputs. The comparator is a voltage/pulse width
converter that controls the ON time of the output pulse
depending on the input voltage. The output level is high
(H) when the sawtooth wave is lower than the error ampli-
fier output voltage, soft-start setting voltage, and idle pe-
riod setting voltage.
Output Circuit
The output circuit is a typical push-pull configuration to
drive an external NMOS transistor directly. It can provide a
200mA source/sink to/from OUT (pin 5).
Soft-Start and Short Circuit Detection
Soft-start operation is set by connecting capacitor CSCP to
the SCP pin (pin 2). Soft-start prevents a current spike on
start-up. On completion of the soft-start operation, the
SCP pin (pin 2) stays low and enters the short circuit
detection wait state.When an output short circuit occurs,
the error amplifier output is fixed at 1.8V and capacitor
CSCP starts charging.
After charging to approximately 0.8 V, the output pin (pin
5) is set low and the SCP pin stays low. Once the protec-
tion circuit operates, the circuit can be restored by reset-
ting the power supply. Short circuit detection time can be
calculate as below:)F(C8.0tSCP
SCP µ×=
Under-Voltage Lock Out (UVLO)
Transients during powering on or instantaneous glitches
in the supply voltage can cause system damage or
failure. The circuit prevents malfunction at low input volt-
age detects a low input voltage by comparing the supply
voltage with the internal reference voltage. On detection,
the circuit fixes the output pin to low. The system recovers
when the supply voltage rises back above the threshold
voltage of the malfunction prevention circuit.
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw13
Function Description (Cont.)
Layout Consideration
Switching Noise Decoupling Capacitor
A 0.1µF ceramic capacitor should be placed close to the
VOUT pin and the GND pin of the chip to filter the switch-
ing spikes in the output voltage monitored by the VOUT
pin.
Feedback Network
In APW7078 application, the feedback networks should
be connected directly to a dedicated analog ground plane
and this ground plane must connect to the GND pin. If no
analog ground plane is available, and then this ground
must tie directly to the GND pin. The feedback network,
resistors R2 and R3, should be kept close to the FB pin,
and away from the inductor.
Input Capacitor
The input capacitor CIN in VIN must be placed close to the
IC. This will reduce copper trace resistance which effects
input voltage ripple of the IC. For additional input voltage
filtering, a 1µF capacitor can be placed in parallel with CIN,
close to the VDD pin, to shunt any high frequency noise to
the ground.
Demo Board Circuit Layout
Inductor
To minimize copper trace connections that can inject noise
into the system, the inductor, switch, and schottky diode
should be placed as close as possible to minimize the
noise coupling into other circuits.
Output Capacitor
The output capacitor, COUT, should be placed close to the
diode and output terminals to obtain better smoothing
effect on the output ripple. Any copper trace connections
for the COUT capacitor can increase the series resistance,
which directly effects output voltage ripple and efficiency.
Ground Plane
One point grounding should be used for the output power
return ground, the input power return to the ground and
the device switches the ground to reduce noise. The in-
put ground and output ground traces must be thick
enough for current to flow through and for reducing the
ground bounce.
Top Layer
Bottom Layer
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw14
Package Information
SOP-8
S
Y
M
B
O
LMIN. MAX.
1.75
0.10
0.17 0.25
0.25
A
A1
c
D
E
E1
e
h
L
MILLIMETERS
b0.31 0.51
SOP-8
0.25 0.50
0.40 1.27
MIN. MAX.
INCHES
0.069
0.004
0.012 0.020
0.007 0.010
0.010 0.020
0.016 0.050
0
0.010
1.27 BSC 0.050 BSC
A2 1.25 0.049
0
°
8
°
0
°
8
°
D
e
E
E1
SEE VIEW A
cb
h X 45
°
A
A1A2
L
VIEW A
0.25
SEATING PLANE
GAUGE PLANE
Note: 1. Follow JEDEC MS-012 AA.
2. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.
3. Dimension “E” does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per side.
3.80
5.80
4.80
4.00
6.20
5.00 0.189 0.197
0.228 0.244
0.150 0.157
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw15
Package Information
MSOP-8
A
0
L
VIEW A
0.25
GAUGE PLANE
SEATING PLANE
A1
D
e
SEE VIEW A
E1
E
A2
bc
S
Y
M
B
O
LMIN. MAX.
1.10
0.00
0.22 0.38
0.08 0.23
0.15
A
A1
b
c
D
E
E1
e
L
MILLIMETERS
A2 0.75 0.95
0.65 BSC
MSOP-8
0.40 0.80 0.026 BSC
MIN. MAX.
INCHES
0.043
0.000
0.030 0.037
0.009 0.015
0.003 0.009
0.016 0.031
0
0.006
0
°
8
°
0
°
8
°
4.70 5.10
2.90 3.10
2.90 3.10 0.114 0.122
0.185 0.201
0.114 0.122
Note: 1. Follow JEDEC MO-187 AA.
2. Dimension“D”does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil
per side.
3. Dimension“E1”does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 5 mil per side.
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw16
Package Information
TSSOP-8
S
Y
M
B
O
LMIN. MAX.
1.20
0.05
0.09 0.20
2.90 3.10
0.15
A
A1
c
D
E1
L
e
MILLIMETERS
b0.19 0.30
0.65 BSC
TSSOP-8
4.30 4.50
0.026 BSC
MIN. MAX.
INCHES
0.047
0.002
0.007 0.012
0.004 0.008
0.114 0.122
0.244 0.260
0.169 0.177
0
0.006
A2 0.80 1.05
6.20 6.60E
0.031 0.041
Note : 1. Follow JEDEC MO-153 AA
2. Dimension "D" does not include mold flash, protrusions
or gate burrs. Mold flash, protrusion or gate burrs shall not
exceed 6 mil per side.
3. Dimension "E1" does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per side.
S
8 0 80
°
°
°
°
D
E1
E
e b
A2
A
A1
VIEW A
SEATING PLANE
GAUGE PLANE
0.25
L
SEE VIEW A
C
0.45 0.75 0.018 0.030
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw17
Package Information
TDFN2x2-8
S
Y
M
B
O
LMIN. MAX.
0.80
0.00
0.18 0.30
1.00 1.60
0.05
0.60
A
A1
b
D
D2
E
E2
e
L
MILLIMETERS
A3 0.20 REF
TDFN2x2-8
0.30 0.45
1.00
0.008 REF
MIN. MAX.
INCHES
0.031
0.000
0.007 0.012
0.039 0.063
0.024
0.012 0.018
0.70
0.039
0.028
0.002
0.50 BSC 0.020 BSC
1.90 2.10 0.075 0.083
1.90 2.10 0.075 0.083
K0.20 0.008
Note : 1. Followed from JEDEC MO-229 WCCD-3.
e
LKE2
Pin 1 Corner
D2
A3
A1
b
A
E
D
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw18
Application
A H T1 C d D W E1 F
330.0±
2.00
50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
12.0±
0.30
1.75±
0.10
5.5±
0.05
P0 P1 P2 D0 D1 T A0 B0 K0
SOP-8
4.0±0.10
8.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
6.40±0.20
5.20±0.20
2.10±0.20
Application
A H T1 C d D W E1 F
330.0±
2.00
50 MIN.
12.4+2.00
-
0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
12.0±
0.30
1.75±
0.10
5.5±
0.05
P0 P1 P2 D0 D1 T A0 B0 K0
MSOP-8
4.00±
0.10
8.00±
0.10
2.00±
0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
5.30±
0.20
3.30±
0.20
1.40±
0.20
Application
A H T1 C d D W E1 F
330.0±
2.00
50 MIN.
12.4+2.00
-
0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
12.0±
0.30
1.75±
0.10
5.5±
0.10
P0 P1 P2 D0 D1 T A0 B0 K0
TSSOP-8
4.00±
0.10
8.00±
0.10
2.00±
0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
6.90±
0.20
3.40±
0.20
1.60±
0.20
Application
A H T1 C d D W E1 F
178.0±
2.00
50 MIN. 8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±
0.20
1.75±
0.10
3.50±
0.05
P0 P1 P2 D0 D1 T A0 B0 K0
TDFN2x2-8
4.0±
0.10
4.0±
0.10
2.0±
0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.4 3.35 MIN
3.35 MIN
1.30±
0.20
(mm)
Carrier Tape & Reel Dimensions
A
E1
A
B
W
F
T
P0
OD0
BA0
P2
K0
B0
SECTION B-B
SECTION A-A
OD1
P1
H
T1
A
d
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw19
Devices Per Unit
Package Type Unit Quantity
SOP-8 Tape & Reel 2500
MSOP- 8 Tape & Reel 3000
TDFN2x2-8 Tape & Reel 3000
TSSOP-8 Tape & Reel 2500
Taping Direction Information
SOP-8
USER DIRECTION OF FEED
MSOP-8
USER DIRECTION OF FEED
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw20
Taping Direction Information
TSSOP-8
USER DIRECTION OF FEED
TDFN2x2-8
USER DIRECTION OF FEED
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw21
Classification Profile
Classification Reflow Profiles
Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
Average ramp-up rate
(Tsmax to TP) 3 °C/second max. 3 °C/second max.
Liquidous temperature (TL)
Time at liquidous (tL) 183 °C
60-150 seconds 217 °C
60-150 seconds
Peak package body Temperature
(Tp)* See Classification Temp in table 1 See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc) 20** seconds 30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max. 6 °C/second max.
Time 25°C to peak temperature 6 minutes max. 8 minutes max.
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Copyright ANPEC Electronics Corp.
Rev. A.7 - Jul., 2011
APW7078
www.anpec.com.tw22
Classification Reflow Profiles (Cont.)
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness Volume mm3
<350 Volume mm3
350-2000 Volume mm3
>2000
<1.6 mm 260 °C 260 °C 260 °C
1.6 mm – 2.5 mm 260 °C 250 °C 245 °C
≥2.5 mm 250 °C 245 °C 245 °C
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness Volume mm3
<350 Volume mm3
≥350
<2.5 mm 235 °C 220 °C
≥2.5 mm 220 °C 220 °C
Test item Method Description
SOLDERABILITY JESD-22, B102 5 Sec, 245°C
HOLT JESD-22, A108 1000 Hrs, Bias @ Tj=125°C
PCT JESD-22, A102 168 Hrs, 100%RH, 2atm, 121°C
TCT JESD-22, A104 500 Cycles, -65°C~150°C
HBM MIL-STD-883-3015.7 VHBM≧2KV
MM JESD-22, A115 VMM≧200V
Latch-Up JESD 78 10ms, 1tr≧100mA
Reliability Test Program
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
