02061-DSH-001-F Mindspeed Technologies®February 2010
Mindspeed Proprietary and Confidential
M02061
3.3 or 5 Volt Laser Driver
Applications
• SFP and SFF Modules
• 1G/2G/4G Fibre Channel modules
• Short reach and Metro SONET/SDH
• CPRI: 614.4, 1228.8, 2457.6, 3072.0, 4915.2 and 6144.0 Mbit/s
The M02061 is a highly integrated, programmable laser driver intended for SFP/SFF modules. Using differential
PECL data inputs, the M02061 supplies the bias and modulation current required to drive an edge-emitting laser.
The modulation output can be DC-coupled to the laser diode.
The M02061 includ es a utom ati c power control to maint ain a con sta nt avera ge lase r outpu t power over temperature
and lif e. In addition, t he modulation curr ent can be tem perature co mpensated to minimiz e v ariation in e xtinction r atio
over temperature.
Features
• High speed operation; suitable for SFP/SFF applications.
Typical rise/fall times of 55 ps.
• Programmable temperature compensation. Modulation output and
bias output can be controlled using a few discrete resistors.
• Supports DDMI (SFF-8472) diagnostics
• DC or AC coupled modulation drive. Up to 100 mA modulation
current available when AC coupled.
• Low overshoot allows high extinction ratio with low jitter
• Automatic Laser Power Control, with “Slow-Start”
• PECL and CML compatible differential data inputs
• Complies with major MSAs (GBIC, SFF, SFF-8472, SFP) including
timing requirements
• Packaged in a QFN24
• 3.3V or 5V operation
• Pulse width adjustment
Typical Applications Diagram
Input
Buffer
V
CC3
-1.3V
Internal
3.3V reg.
Input
Buffer D - FF Output
Buffer
Laser
Driver
Automatic Power Control
(laser bias current)
Safety
Circuitry with
Latched Fault
Modulation
Control
V
CC
V
CC3
FAIL
VCC3
SEL
PWA
SHDWN
OUT
SV
CC
OUT-
OUT+
GND
0
IBIAS
OUT
IPIN
DIS
MOD
SET
TC
SLOPE
MOD
MON
RESE T
BIAS
MON
APC
SET
C
APC
TxP wr
MON
D
IN
-
D
IN
+
Internal Power Bus
V
CC3
V
CC
V
CC
V
CC3
V
CC
V
CC
SCB
DISDLY
(M02061-12
only)
(M02061-21
only)
TX
Disable
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Ordering Information
Part Number Package Pin Confitguration
M02061-12 QFN24 DISDLY function on pin 8
M02061G-12* QFN24 (RoHS Compliant) DISDLY function on pin 8
M02061-21 QFN24 SCB function on pin 8
M02061G-21* QFN24 (RoHS Compliant) SCB function on pin 8
M02061-EVM Combination Optical and Electrical Evaluation board DISDLY function on pin 8
*The G in the part number indicates that this is an RoHS compliant package. Refer to www.mindspeed.com for additional information.
Revision History
Revision Level Date ASIC
Revision Description
F Release February 2010 x Added CPRI data rates to front page.
Added TJ specification and added equation for TA specification in Ta ble 1-1.
E Release February 2006 x Added information for the M02061-21 with pin SCB instead of pin DISDLY.
D Release September 2005 x New format. Remove 32 pin package information.
Changes to Absolute Maximum Specifications - operating temperature, output
voltage.
Changes to Recommended Operating Condition s - VCC, operating temperature.
Changes to DC Characteristics - ICC, VMD, TxPWRmon, logi c in puts and outp uts,
data inputs, safety logic thresholds.
Changes to AC Characteristics - IMOD, Tr, Tf, jitter.
C Preliminary March 2004 x Added eye diagram, ; corrected rise/fall times.
2.5Gbps Electrical Eye Diagram
Conditions: 80 mA modulation current, 2^7-1 PRBS
QFN24 Pin Configuration
V
CC
DIN+
DIN-
VCC3
SEL
MOD
MON
BIAS
MON
C
APC
V
CC3
PWA
TC
SLOPE
FAIL
RESET
SCB/DISDLY
TXPWR
MON
APC
SET
I
PIN
GND
0
OUT+
OUT-
SV
CC
SHDWN
OUT
MOD
SET
IBIAS
OUT
DIS
1
6
712
13
18
19
24
4mm x 4mm
GND, connect to
PCB ground
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1.0 Product Specification
1.1 Absolute Maximum Ratings
These are the absolute maximum ratings at or beyond which the IC can be expected to fail or be damaged.
Reliable operation at these extremes for any length of time is not implied.
Table 1-1. Absolute Maximum Ratings
Symbol Parameter Rating Units
VCC Power supply vol tage -0.4 to +6.0 V
TJJunction temperature -40 to +110 1°C
VCC3 3.3V power supply voltage -0.4 to +4.0 V
TAOperating ambient temperature -40 to +95 2°C
TSTG Storage temperature -65 to +150 °C
IBIASOUT (MAX) Maximum bias output current 150 mA
IMOD (MAX) Maximum modulation current 140 mA
DIN+/- Data inputs 0 to VCC3 + 0.4 V
DIS, SCB, VCC3SEL Mode control inputs -0.4 to VCC + 0.4 V
BIASMON, MODMON Bias and modulation output current mirror
compliance voltage -0.4 to VCC3 + 0. 4 V
IPIN Photodiode anode voltage -0.4 to VCC3 + 0.4 V
IPIN Photo diode current 2 mA
FAIL Status flags -0.4 to VCC + 0.4 V
PWA, APCSET, MODSET Set inputs -0.4 to VCC3 + 0.4 V
TCSTART Temperature compensation start temperature -0.4 to 1.0 V
TCSLOPE Temperature compensation slope -0.4 to VCC3 + 0.4 V
OUT+, OUT- Output -0.4 to VCC + 0.4 V
1. QFN package:
Air Velocity θJA
0 m/s 57 ºC/W
1 m/s 50 ºC/W
2.5 m/s 45 ºC/W
The above thermal resistance is based on a 4-layer JEDEC standard board (76.2 x 114.3 mm).
2. The maximum operating ambient temperature is the lesser of 95 °C or TA ≤ TJ(Max) - (θJA (Max) x Q) where Q is the power dissipated
in the M02061.
Product Specification
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1.2 Recommended Operating Conditions
1.3 DC Characteristics
(VCC = +3.05V to +3.55V or 4.75V to 5.4V, TA = -40 °C to +95 °C, unless otherwise noted)
Typical values are at VCC = 3.3 V, IBIASOUT = 30 mA, IMOD = 30 mA, TA = 25 °C, unless otherwise noted.
Table 1-2. Recommended Operating Co nditions
Parameter Rating Units
Power supply (VCC-GND) 3.3 ± 7.5%
or 5.0 + 8%, -5% V
Operating ambient -40 to + 95 °C
Table 1-3. DC Characteristics (1 of 3)
Symbol Parameter Conditions Minimum Typical Maximum Units
ICC Supply current excluding
IMOD and IBIAS
PWA high (no pulse width adjust)
additional current when PWA used
additional current when operating from a 5V
supply
–
-
-
35
1.5
1.5
61
-
-
mA
IBIAS Bias current adjust range V(IBIASOUT) > 0.7V
For 3.3V operation with an AC coupled laser
For 5.0V operation with a DC coupled laser. 1
1
100
60
mA
IBIAS(OFF) Bias current with optical
output disabled DIS = high
V(IBIASOUT) > VCC - 1V – – 300 µA
Ratio of IBIAS current to
BIASMON current –100 – A/A
VMD Monitor diode reverse bias
voltage VCC =3.3V 1.5 – – V
IMD Monitor diode current
adjustment range Adjusted with RAPCSET 10 – 1500 µA
Ratio of TxPwrMON current
to monitor photodiode
current
0.95 1 1.25 A/A
CMD_MAX Maximum monitor
photodiode capacitance for
APC loop stability. Includes
all associated parasitic
capacitances.
100 pF
TTL/CMOS input high
voltage (DIS) 2.0 – 5.4 V
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TTL/CMOS input low
voltage (DIS) –– 0.8 V
CMOS input high voltage
(VCC3SEL, SCB) 2.4 V
CMOS input low voltage
(VCC3SEL, SCB) 1.2 V
Logic output high voltage
(FAIL) With external 10kΩ pull-up to V CC.V
CC - 0.5 – – V
Logic output low voltage
(FAIL) For 6.8k to 10k Ω resistor when pulled up to
5V.
For 4.7k to 10k Ω resistor when pulled up to
3.3V.
–– 0.4 V
RIN Differential input impedance Data inputs – 6800 – Ω
VSELF Self-biased common-mode
input voltage –V
CC3 - 1.3 – V
VINCM Common-mode input
compliance voltage Data inputs VCC3 - 1.45 – VCC3-[VIN(Diff)]/4 V
VIN(DIFF) Differential input voltage = 2 x (DIN+HIGH - DIN+LOW) 200 – 2400 mVpp
VCC3THL(1) 3.3V supply detection, lower
threshold 2.5 2.8 3.0 V
VCC3THH(1) 3.3V supply detection,
upper threshold 3.65 3.9 4.25 V
VCC5THL 5V supply detection, lower
threshold 3.9 4.25 4.65 V
VCC5THH 5V supply detection, upper
threshold 5.4 5.8 6.1 V
VREF1 Reference voltage for
MODSET
1.18 1.3 1.4 V
VAPCSET Reference voltage for
APCSET
1.3 V
VBL Bias_OK lower voltage
threshold 0.88 1.0 1.05 V
Table 1-3. DC Characteristics (2 of 3)
Symbol Parameter Conditions Minimum Typical Maximum Units
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1.4 AC Characteristics
(VCC = 3.05 V to 3.55V or 4.75V to 5.4V, TA = -40 °C to +95 °C, unless otherwise noted)
Typical values are at VCC = 3.3 V, IBIASOUT = 30 mA, IMOD = 30 mA, 25 ohm loa d and TA = 25 °C , unless ot herwise
noted.
VBH Bias_OK upper voltage
threshold 1.45 1.6 1.7 V
VFAULTL Lower voltage threshold for
fault inputs IBIASOUT, OUT+,
CAPC, AND MODSET
FAIL asserts if any of these signals fall below
this value. 300 400 mV
VOUT_DIS Self bias voltage for
IBIASOUT and OUT+ DIS = high 0.5 1.65 2.2 V
VSHDWNL SHDWNOUT output low
voltage DIS = low, ISHDWNOUT ≤ 100uA VCC - 4 V
VSHDWNH SHDWNOUT output high
voltage DIS = low, ISHDWNOUT ≤ 10uA VCC - 0.3V V
NOTES:
1. When VCC = 5V, VCC3 “supply OK” circuitry monitors the internally regul ated 3.3V su pply. When VCC = 3.3V, VCC3 “supply OK” circuitry monitors
VCC.
Table 1-4. AC Characteristics (1 of 2)
Symbol Parameter Conditions Minimum Typical Maximum Units
IMOD Modulation current range 3.3V operation, AC coupled, OUT+ and OUT-
>1.6V
5V operation, DC c oupled(1) into a 25Ω load to
VCC - 1.2V. OUT+ and OUT - >1.15V
10
10
– 100
80
mA
IMOD(OFF) Modulation current with output
disabled DIS = high – – 300 µA
Ratio of modulation current to
MODMON current –100 – A/A
IMOD-TC Programmable range for modulation
current temperature coefficient Adjustable using TCSLOPE (2) 0–10
4ppm/°C
Table 1-3. DC Characteristics (3 of 3)
Symbol Parameter Conditions Minimum Typical Maximum Units
Product Specification
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1.5 Safety Logic Timing
(SCB pin low, VCC = 3.05 V to 3.55V or 4.7V to 5.4V, TA = -40 °C to +95 °C, unless otherwise noted)
tr Modulation output rise time 20% to 80% into 25 Ω.
Measured using 11110000 pattern at 2.5Gbps –5575 ps
tf Modulation output fall time – 55 75 ps
OS Overshoot of modulation output
current in the off direction. into 25 Ω load -- 1 – %
RJ Random jitter – 0.8 – psrms
DJ Deterministic jitter Measured into 25Ω load, 231 - 1 PRBS at 2.7
Gbps
K28.5 pattern at 4.25 Gbps
(includes pulse width distortion3)
10
10
25
30
pspp
NOTES:
1. Guaranteed by design and characterization.
2. DC coupled operation at 3.3V is not supported. AC coupled operation at 5V is possible provided the outp uts never exceed 6V.
3. Pulse width distortion is measured single-ended.
Table 1-5. Safety Logic Timing (1 of 2)
Symbol Parameter Conditions Minimum Typical Maximum Units
t_off DIS assert time Rising edge of DIS to fall of output signal
below 10% of nominal(1) 10 μs
t_on DIS negate time Falling edge of DIS to rise of output signal
above 90% of nominal(1) 1ms
t_init Time to initialize(2) Includes reset of FAIL; from power on after
Supply_OK or from negation of DIS during
reset of FAIL condi tion
235 ms
Table 1-4. AC Characteristics (2 of 2)
Symbol Parameter Conditions Minimum Typical Maximum Units
(2)
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t_fault Laser fault time - from fault condition
to assertion of FAIL From occurrence of fault condition or when
Supply_OK is beyond specified range 100 μs
t_reset DIS time to start reset DIS pulse width required to initialize safety
circuitry or reset a latched fault 10(3) μs
tVCC_OK Supply_OK delay time Delay between Supply_OK condition and when
outputs are enabled 10 20 μs
t_onBM DIS negate (turn-on) time during
burst-mode operation IMOD > 20mA; outputs DC coupled (5V
operation)(4) 300 500 ns
t_offBM DIS assert (turn-off) time during
burst-mode operation IMOD > 20mA; outputs DC coupled (5V
operation) 200 500 ns
NOTES:
1. With CAPC < 2.2nF
2. User-adjustable. Specifications reflect timing with no external RESET capacitor.
3. With < 1nF capacitor from RESET pin to ground.
4. Imod >12mA
Figure 1-1. Relationship between Data Input s and Modulation Outputs
Table 1-5. Safety Logic Timing (2 of 2)
Symbol Parameter Conditions Minimum Typical Maximum Units
D
IN
+
D
IN
-
100 mV -
1200 mV
V
IN(DIFF)
200 mV -
2400 mV
V
OUT-
> 1.60V when V
CC5_OR
high
> 1.15V when V
CC5_OR
low
GND
V
OUT+
Product Specification
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Figure 1-2. Safety Logic Timing Characteristics, SCB pin low
V
CC3
FAIL
DIS
LASER
OUTPUT
(low)
(low)
3.3V
t_on < 1ms,
(300 μs typ.)
V
CC
5V
V
CC3
and
V
CC5
status
FAIL
DIS
LASER
OUTPUT
(low)
(low)
V
CC3
and V
CC5
“OK”
t_on < 1ms,
(300 μs typ.)
Hot Plug (DIS Low) Slow Rise on Vcc = 5V at Power-up (DIS Low)
V
CC3
FAIL
DIS
LASER
OUTPUT
(low)
(low)
3.3V
t_on < 1ms,
(300 μs typ.)
V
CC
3.3V
FAIL state at power-up will
depend on pull-up voltage
Slow Rise on Vcc=3.3V at Power-up (DIS Low)
V
CC3
and
V
CC5
status
FAIL
DIS
LASER
OUTPUT
(low)
(low)
V
CC3
and V
CC5
“OK”
t_on < 1ms,
(300 μs typ.)
(high)
Transmitter Enable (DIS transition Low)
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VCC3
and
VCC5
status
FAIL
DIS
LASER
OUTPUT
(low)
VCC3 and VCC5
“OK”
t_off < 10 μs,
(1 μs typ.)
(high)
Fault
recovery at:
MOD
SET
.
C
APC
, OUT+,
or IBout
FAIL
DIS
LASER
OUTPUT
Fault
Removed
t_reset,
10 μs,
min.
FAIL remains high
until reset by DIS
going high
t_on < 1ms
Fault at:
MOD
SET
.
C
APC
, OUTP,
or IBout
FAIL
DIS
LASER
OUTPUT
Fault Occurs
t_fault < 100 μs,
(4 μs typ.)
Response to Fault
Fault at:
APC
SET
FAIL
DIS
LASER
OUTPUT
Fault Remains
t_reset,
10 μs,
min.
t_init < 5ms,
(3ms typ.)
Unsuccessful Fault Reset Attempt
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2.0 Pin Definitions
Table 2-1 lists pin type definitions and descriptions for the M02061 device.
Table 2-1. M02061 Pin Definitions and Descriptions (1 of 7)
4x4 mm
QFN24 Pin
Number Pin Name Pin equivalent load Function
1V
CC Power supply
2D
IN+ Positive data input. Self biased. Compatibl e with AC coupled PECL, AC
coupled CML, and DC-coupled PECL (VCC = 3.3V).
When DIN+ is high, OUT+ sinks current.
3D
IN- See DIN+ drawing Negative data input. Self biased Compatible with AC coupled PECL, AC
coupled CML, and DC-coupled PECL (VCC = 3.3V).
4 VCC3SEL 3.3V VCC Select.
Connect to VCC3 for VCC = 3.3V operation.
Connect to GND for VCC = 5V operation.
V
CC3
CLK+, CLK-
D
IN
+, D
IN
-,
or
V
TT
4 kΩ
V
CC
72 kΩ
VCC5_ OR
190 Ω
V
CC
V
CC3
Pin Definitions
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5 DIS Bias and modulation output disable (TTL/CMOS).
6 FAIL Safety circuit control failure output (TTL/CMOS). Goes high when a safety
logic fault is detected. This output will be low when DIS is high.
7 RESET Safety circuit reset. Leave open for normal operation or add a capacitor to
ground to extend the reset time.
Connect to GND to disable window comparators at APCSET
Table 2-1. M02061 Pin Definitions and Descriptions (2 of 7)
4x4 mm
QFN24 Pin
Number Pin Name Pin equivalent load Function
80 kΩ
DIS
7 kΩ
V
CC3
V
CC
FAIL
VCC
RESET
190 Ω
V
CC
V
CC3
Pin Definitions
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8
(M02061-21
only)
SCB Safety Circuit Bypass. Connect to GND or leave open for normal operation.
Connect to VCC to allow the bias and modulation outputs to operate even if
the safety circuitry indicates a fault.
8
(M02061-12
only)
DISDLY Disable delay control . Connect to ground for normal operati on. In burst mode
operation add a capacitor from this pin to groun d to set the maximum disable
time. Disable times greater than this maximum will engage the “slow-start”
circuitry.
9MOD
MON Modulation Current Monitor. Connect directly through a resistor to GND
(MONPOL high) or to VCC3 (MONPOL low). The current through this pin is
approximately 1/100th of the MODULATION current to the laser
This pin may be left open if the feature is not needed and the M02061 current
consumption will be reduced by 0.5mA typically.
Table 2-1. M02061 Pin Definitions and Descriptions (3 of 7)
4x4 mm
QFN24 Pin
Number Pin Name Pin equivalent load Function
48 kΩ
SCB
24 kΩ
VCC VCC3
DISDLY
190 Ω
V
CC
190 Ω
MODMON
V
CC
V
CC3
Pin Definitions
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10 BIASMON See MODMON drawing Bias Current Monitor. Connect directly through a resistor to GND (MONPOL
high) or to VCC3 (MONPOL lo w). The current through this pin is approximately
1/100th of the BIAS current to the laser.
This pin may be left open if the feature is not needed and the M02061 current
consumption will be reduced by 0.5mA typically.
11 TxPwrMON Transmit Power Monitor. Connect directly through a resistor to GND
(MONPOL high) or to VCC3 (MONPOL low). The current through this pin is
approximately the same as the photo diode current into IPIN.
This pin may be left open if the feature is not needed and the M02061 current
consumption will be reduced by the IPIN current.
12 APCSET Average Power Control, laser bias current adjustment. Connect a resistor
between this pin and ground to set the bias current to the laser.
The APC loop will control the lase r b ias current to maintain a voltage of
approximately 1.3V at this pin. The current through this pin is approximately
the same as the current into IPIN.
13 IPIN Current input from monitor photodiode anode.
The APC loop will adjust the laser bias current to maintain a voltage at
APCSET of approximately 1.3V and at this pin of approximately one VGS. The
voltage at this pin will not exceed 1.6V in normal operation
Table 2-1. M02061 Pin Definitions and Descriptions (4 of 7)
4x4 mm
QFN24 Pin
Number Pin Name Pin equivalent load Function
33 Ω
TxPwr
MON
V
CC
V
CC3
APC
SET
V
CC
V
CC3
30 Ω
I
PIN
V
CC
Pin Definitions
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14 IBIASOUT Laser bias current output.
Connect directly to laser cathode or at higher bit rates through a ferrite or a
resistor to isolate the capacitance of this pin from the modulation drive,
(~2pF).
Maintain a voltage > 0.7V at this pin.
15 GNDOGround for output stage. May be connected directly to ground. At high bit
rates (>2Gb/s) an optional inductor or ferrite may be added to reduce
switching transients.
16 OUT+ Positive modulation current output. Sinks current when DIN+ is HIGH.
Maintain a voltage > 1.6V at this pin when VCC3SEL is high.
Maintain a voltage > 1.15V at this pin when VCC3SEL is low.
17 OUT- See OUT+ drawing Negative modulation current output. Sinks current when DIN- is HIGH
Maintain a voltage > 1.6V at this pin when VCC3SEL is high.
Maintain a voltage > 1.15V at this pin when VCC3SEL is low.
Table 2-1. M02061 Pin Definitions and Descriptions (5 of 7)
4x4 mm
QFN24 Pin
Number Pin Name Pin equivalent load Function
IBIAS
OUT
VCC
GND0
V
CC
OUT+
V
CC
GND
0
Pin Definitions
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18 SVCC Switched VCC.
3.3V applications - Connect to laser anode. Safety circuitr y will open the
switch when a fault is detected and no current will flow through the laser.
No capacitance is needed on this node. If capacitance to groun d is added, do
not exceed 100pF.
5V applications - Disabled, leave open.
19 SHDWNOUT External switched VCC control signal. Use in 5V applications to create an
external SVCC.
20 CAPC Automatic power control loop dominant pole capacitor. (Connect a capaci tor
between this pin and VCC3.)
A 2.2nF capacitor wi ll give less than 1ms enable time an d a loop bandwidth <
30kHz
Table 2-1. M02061 Pin Definitions and Descriptions (6 of 7)
4x4 mm
QFN24 Pin
Number Pin Name Pin equivalent load Function
SV
CC
V
CC
V
CC3
SHDWN
OUT
V
CC
12 kΩ
100 Ω
C
APC
VCC
Pin Definitions
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21 VCC3 3.3V applications - Power supply input. Connect to VCC.
5V applica ti o ns - Int e rn a ll y g e ne rated 3.3V. Power supply output. Do not
attach to non-M02061 circuitry.
For 5V applications add 12 ohms in series with 100nF to ground at this pin.
22 PWA Pulse Width Adjust. Connect a resistor to GND to enable, (between 1kΩ and
20kΩ). Connect to VCC3 to disable.
23 MODSET See PWA drawing Modulation current control. Connect a resistor to ground to set the
modulation current.
24 TCSLOPE See PWA drawing Modulation current temperature compensation coefficient adjustment.
Connect a resistor to ground to set the temperature compensation
coefficient. Leave open to disable the temperature compensation.
A 51kΩ resistor will resu lt in a temperature compensation slope of
approximately 0.5%/°C
CENTER
PAD GND C onnect to GND.
Table 2-1. M02061 Pin Definitions and Descriptions (7 of 7)
4x4 mm
QFN24 Pin
Number Pin Name Pin equivalent load Function
V
CC3
V
CC
V
CC
190 Ω
PWA
V
CC
V
CC3
+
-
1.28V
Pin Definitions
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Figure 2-1. QFN24 Pinout Infor mation
V
CC
DIN+
DIN-
VCC3
SEL
MOD
MON
BIAS
MON
C
APC
V
CC3
PWA
TC
SLOPE
FAIL
RESET
SCB/DISDLY
TXPWR
MON
APC
SET
I
PIN
GND
0
OUT+
OUT-
SV
CC
SHDWN
OUT
MOD
SET
IBIAS
OUT
DIS
1
6
712
13
18
19
24
4mm x 4mm
GND, connect to
PCB ground
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3.0 Functional Description
3.1 Overview
The M02061 is a highly integrated, programmable laser driver intended for SFP/SFF module with data rates up to
4.25 Gbps. Using differential PECL data inputs, the M02061 supplies the bias and modulation curren t required to
drive an edge-emitting laser.
Monitor outputs and internal safety logic in the M02061 combined with the M02088 will support designs requiring
DDMI compliance.
The M02061 includes au tomatic pow er control to maint ain a constant a ve rage laser outp ut pow er ov er temper ature
and life. In addition, the modulation current can be temperature compensated to minimize variation in extinction
ratio ov er temperature.
Many features are user-adjustable, including the APC (automatic power control) loop bias control (via a monitor
photo diode), modulation current, temperature compensation control of modulation current, and pulse-width
adjustment. The part may be operated from a 3.3V or 5V supply.
The driver modulation output can be AC, DC, or Differentially coup led to the laser.
Safety circuitry is also included to provide a latched shut-down of laser bias and modulation current if a fault
condition occu rs. An inte rnal VCC switch provid es redundant shutdown when operating the device from a 3.3V
supply. Control is provided to allow for a redundant external switch when operating with a 5V supply, if desired.
Figure 3-1 details t he functional blocks and pin signals for the M02061 device.
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Figure 3-1. M02061 Block Diagram
VCC3 -1.3V
Automatic Power Control
(laser bias current)
TX
Disable
Safety
Circuitry with
Latched Fault
Modulation
Control
V
CC
V
CC3
FAIL
VCC3
SEL
PWA
SHDWN
OUT
SV
CC
OUT-
OUT+
GND
0
IBIASOUT
IPIN
DIS
MOD
SET
TC
SL O P E
MOD
MON
RESET
BIAS
MON
APC
SET
C
APC
TxPwr
MON
D
IN
-
D
IN
+
Internal Power Bus
SCB
DISDLY
(M02061-21 only)
(M02061-12 only)
D - FF Output
Buffer
Laser
Driver
Input
Buffer
Internal
3.3V reg.
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Figure 3-2. 2.5Gbps El ectrical Eye Diagram
Conditions: 80mA modulation current, 27-1 PRBS
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Figure 3-3. 2.5Gbps Filtered Optical Eye Diagram with NEC NX7315UA Laser
Conditions: 10dB extinction ratio, 33% eye margin, 2 7-1 PRBS
Figure 3-4. 4.25Gbps Unfiltered Optical Eye Diagram with Archcom AC3460 Laser
Conditions: 7.5dB extinction ratio, 27-1 PRBS
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3.2 Features
• High speed operation; suitable for SFP/SFF applications from 155Mbps to 4.25 Gbps. Typical rise/fall times of
55 ps.
• Programmable temperature compensation. Modulatio n output and bias output can be controlled using a few
discrete resistors.
• Supports DDMI (SFF-8472) diagnostics when co mbined with the M02088.
• DC or AC coupled modulation drive. Up to 100mA modulation current available when AC coupled.
• Low overshoot allows high extinction ratio with low jitter.
• Automatic Laser Power Control, with “Slow-Start”.
• Differential data inputs to minimize pattern dependent jitter, PECL and CML compatible.
• Packaged in a QFN24
• 3.3V or 5V operation
3.3 General Description
The M02061 is a highly integrated, programmable laser driver intended for SFP/SFF module with data rates up to
4.25 Gbps. Using differential PECL data inputs, the M02061 supplies the bias and modulation curren t required to
drive an edge-emitting laser. Monitor outputs and internal safety logic support the DDMI requirements.
The M02061 laser driver cons ists of the following circuitry: an internal regulator, bias current generator and
automatic power control, data inputs, buffer with pulse width adjust, modulation current control, mo dulator output,
laser fail indication, disable control, and monitor outputs for the bias current, modulation current, a nd transmitted
power.
3.3.1 Internal Regulator
The M02061 cont ains an internal 3.3V regulator so high bit rate performance can be achi eved with 5V or 3.3V
power supply.
When operating from a 5V supp ly (V CC is connected to +5V), an internal regulator provides a voltage of
approximately 3.3V to the majority of the on-chip circuitry. The on-chip regulator is internally compensated,
requiring no e xternal components. Ho we v er, f or 5V oper ation with high modulat ion currents , it ma y be necessary to
add 12 ohms in series with 100nF to g round at VCC3 or the internal power supply may dip and cause a fault
condition. When a 3.3V supply is used (VCC and VCC3 connected to 3.3V) the regulator is switched off and the
internal circuitry is powered directly through the VCC3 supply pin. The decision as to whether or not the internal
regulator is required is made via the VCC3SEL pin, which also determines whether the safety circuitry needs to
monitor for proper +5V supply voltage.
F or 3.3V applicat ions, SVCC is sourced from VCC3 through a s witch ( lea v e SVCC open f or 5 V applications). SV CC is
to be used to power the anode of the laser diode and the cathode of the photo diode, any resistive or ferrite pull-
ups on the OUT+ and OUT- outputs should be connected directly to VCC. When a fault condition is present, FAIL
will assert and the switch sourcing SVCC will open so no current can pass through the laser. SVCC does not need
any external capacitance, if capacitance to ground is added at SV CC it should be <100pF.
For 5V operation, an analog switch controlled by SHTDWNOUT can be used to source 5V to the laser anode. In
the case of a fault condition, SHTDWNOUT will go high and open the analog switch which will result in an open
circuit at the laser. SHTDWNOUT is designed to drive a CMOS logic input. An FET transistor may have excessive
Miller capacitance and a fault may be signalled if it turns on too slow.
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VCC and VCC3 status are internally monitored by the M02061 during power-up and normal operation. During
pow er-up the “slo w-start” circuitry requires that VCC an d VCC3 each reach an acceptab le level before enablin g bias
or modulation current.
3.3.2 Bias Current Generator and Automatic Power Control
To maintain constant average optical power, the M02061 incorporates a control loop to compensate for the
changes in laser threshold current o ver temperature and lifetime. The bias current will be determined by the value
of the external resistor RAPCSET and the transfer efficiency between the laser and monitor photo diode.
The photo cu rr ent fr om th e mo nitor ph ot o di od e mo unte d in th e lase r package is sunk at IPIN. This phot o cur rent is
mirrored and an e quivalent current is sourced from pins TxPwrMON and APCSET. Th e APC loo p ad jus ts th e la se r
bias current (hence the monitor diode photo current) to maintain a voltage at APCSET of 1 band-gap voltage or
~1.3V.
RAPCSET * IPIN = 1.3 V
The APC loop has a time constant determined by CAPC, RAPCSET and t he transfer efficiency between t he laser and
monitor pho to diode . The lar ger the CAPC capacito r the low er the bandwidt h of the loop and the larger RAPCSET the
lower the loop BW.
In gener al, it is recommended that at least 2.2 nF of external capacitance be added externally between CAPC and
VCC3. With use of a 2.2 nF capacitor, the bias current can reach 90% of its final value within 1ms, i.e., bias current
rise-time is less than 1ms and the APC loop ba ndwidth is less t ha n 30 kHz, which should b e adeq ua te for bit rates
of 155Mbps. (and all higher bit rates).
The bias gener ator also includes a b ias current monito r mirror (BIAS MON), whose output current is typically 1 /100th
of the bias curren t. T his pin c an be co nn ec te d dir ectly through a resistor to ground. If this function is not needed
this pin can be left open.
3.3.3 Data Inputs
Both CML and PECL inputs signals can be AC coupled to the M02061. These inputs are internally biased to
approximately VCC3 - 1.3V. In most applications the data inputs are AC coupled with controlled impedance pcb
traces which will need to be terminated externally with a 100Ω or 150Ω resistor between the + and - inputs.
PECL and CML signals may be DC coupled to the M02061 data inputs when both the M02061 and the source of
the input signals a re operating from 3.3V supplies. If the M02061 is operating from a 5V supply, PECL and CML
Table 3-1. Pin Connection for 3.3V and 5V VCC
Pin Connection For:
VCC = 3.3V VCC = 5V
Pins Dependent on VCC Voltage
VCC3 Connect to VCC Reference for CAPC and PWA
SVCC Laser Anode OPEN
SHDWNOUT OPEN External safety control switch
CAPC Capacitor b etween CAPC and VCC3 or VCC Capacitor between CAPC and VCC3 (not VCC)
PWA Connect to VCC3 or VCC to disable Connect to VCC3 to disable (not VCC)
VCC3SEL Connect to VCC3 or VCC Connect to GND
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signals may be DC coupled as long as the source of the input signals is operating at a 3.3V supply and the signals
are referenced to VCC3 at the M02061.
3.3.4 Pulse Width Adjust
The data output buffer incorporates pulse-width adjustment control to compensate for laser pulse width distortion.
A potentiometer can be connected bet ween the PWA input and GND for adjustment (prog ramming resistance
should be between 1kΩ and 20kΩ). By adjusting the potentiometer, the pulse-width can be adjusted over a range
of approximately ±40 ps. Pulse width control can be disabled by connecti ng PWA to VCC3, resulting in roughly a
50% crossing point at the output and reducing supply current by approximately 1.5mA.
3.3.5 Modulation Control
There are programmable control lines for controlling the modulation current and its temperature compensation.
These inputs can be programmed simply with a resistor to ground.
The modulation current amplitude is contr olled by the MODSET input pin. The modulation current is temperature
compensated by the TCSLOPE inputs. The temperature compensation is independent of the setting.
If the temperature compensation at TCSLOPE is disabled, the modulation output current is simply:
IOUT = 100 x (1.3V / RMODSET)
Where RMODSET is the resistance from pin MODSET to ground.
Figure 3-5 is the most accura te method f o r selecting RTCslope.
However, you can also select R TCSLOPE using the following relationship:
RTCSLOPE = 19.5*(TC)-1.5, where TC is the desired slope of the modulation current from 25°C to 85°C in%/°C and
RTCSLOPE is in kΩ. If no temperature compensation is desired, leave RTCSLOPE open.
In any case, RTCSLOPE will have negligible effect at M02061 case temperatures below 10°C .
For example:
Given a laser with a desired modulation current at low temperatures of 30mA and a temperature coefficient of -
0.5%/°C at high temperatures (which will require a laser driver temperature coefficient of +0.5%).
Choose RMODSET = 100 x (1.3V / 30mA) = 4.3kΩ
Choose RTCSLOPE =19.5*(0.5)-1.5 kΩ = 56kΩ.
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Figure 3-5.
-30.00
-20.00
-10.00
0.00
10.00
20.00
30.00
40.00
50.00
60.00
-40 -20 0 20 40 60 80 100
Ambient Temperature in degrees C
% change in modulation current
RTCslope:
22k
27k
33k
39k
47k
51k
62k
75k
82k
100k
120k
150k
220k
390k
750k
open
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3.3.6 Modulator Output
The output stage is designed to driv e a 25Ω output load o v er a wide r ange of cur rents and circ uit architectures . The
laser may be AC, DC, or Differentially coupled depending on the supply voltage.
When DC coupled, OUT+ should be connected throug h a series resistor to th e laser such that t he to tal imped ance
seen at the output is 25 ohms. This will result in the optimum pulse response while allowing the maximum
modulation current (see Figure 4-2).
The output can also be AC coupled to the laser. This is the required operating mode when usin g a 3.3V supply
(unless the laser has a small forward voltage and OUT+ will not go below 1.6V). When AC coupled the dynamic
resistance seen by OUT+ should still be 25 ohms. In addition to a resistor in series with the laser, a capacitor is
added in series and a ferrite is used to pull up the collector at OUT+ to VCC.
When the laser is AC coupled, the OUT- pin is usually tied to the laser anode through an AC coupled series
resistor which matches the impedance seen by the OUT+ pad (see Figure 4-1).
The output stage also has a separate current path to GND labelled GND0. This isolates the outp ut switching
currents from the rest of the system.
Table 3-2. Modulation Current Maximums
Max
Modulation Current Max Bias Current
VCC=5V, Laser DC coupled 80 60
VCC=5V, Laser AC coupled 80(1) 60
VCC=3.3V, Laser DC coupled 100(2) 100
VCC=3.3V, Laser AC coupled 100 100
When differentially coupling, the maximum modulation and bias current is determined by either the AC or DC coupling of the OUT+ or OUT- output,
whichever has the minimum rating.
1. When AC coupling the output should never be allowed to swing above the absolute voltage rating of the part, which is 6V.
2. When VCC=3.3V, the OUT+ and OUT- should not be driven below 1.6V. In most 3.3V applications, this will make DC coupling impractical.
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3.3.7 Fail Output
The M02061 has a FAIL alarm output which is compatible with the TX_FAULT signalling requirements of common
pluggable module standards.
The ESD protection on this pin provides a true open collector output that can with sta nd significan t variation in V CC
when signalling between circuit boards. Also, if the M02061 loses power the pull-up will signal a fail condition. In a
simple static protection scheme used by other ICs the protection diodes would clamp the FAIL signal to ground
when the chip loses power.
3.3.8 TX Disable and Disable Delay Control
The DIS pin is used to disable the transmit signal (both the modulation and bias current are disabled when DIS =
high).
The DIS input is compatible with TTL levels regardle ss of whether VCC = 5V or VCC = 3.3V. The external 4.7kΩ
and 10kΩ pull-up resist or requir ed by most interf ace standar ds is not neede d because th is pin has an internal 7kΩ
resistor to VCC.
The DISDLY pin is used in conjunction with the DIS pin to control b ias cur r ent e nable time. I n normal operat ion t he
DISDLY pin should be connected to ground. In this case, each time DIS transitions from hi gh to low the bias
current will be enabled by the “slow-start” circuitry (enable time of less than 1 ms with a CAPC = 2.2 nF).
Figure 3-6. Modulator Output
OUT+
0.4pF
0.75 nH OUT-
GND
A
(optional
external
inductance)
*
* Denotes bond
wire internal to
MLF package
0.75 nH *
For V
CC
=5V, OUT+ and OUT-
should not be driven below 1.15V
For V
CC
= 3.3V, OUT+ and OUT-
should not be driven below 1.6V.
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For burst mode operation a capacitor C is added to the DISDLY pin, the slow-start circuitry is disabled for
approximately T = 3 * 106 (sec/F) * C (F) following the DIS high transition (see figure 8). If the part is enabled (DIS
transitions low) during this time the bias and modulation current will quickly return to within 90% of their final value
(in less than 500ns). If DIS transitions low after the DISDLY time the slow-start circuitry will engage and the bias
current will not return to its final value for approximately 1ms (depending on the CAPC capacitor value).
Figure 3-7. DIS and DISDLY Timing
DIS
DISDLY
OUT+
IBIAS
OUT
DIS
DISDLY
OUT+
IBIAS
OUT
EPON Burst Mode Operation
Normal Operation, (slow-start whenever part enabled)
t_on
BM
< 500ns for I
MOD
> 10mA
t_off
BM
< 500ns
t_off< 10μs
t_on< 1ms, depending on C
APC
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3.3.9 TX Disable Control
The DIS pin is used to disable the transmit signal (both the modulation and bias current are disabled when DIS =
high).
The DIS input is compatible with TTL levels regardle ss of whether VCC = 5V or VCC = 3.3V. The external 4.7kΩ
and 10kΩ pull-up resist or requir ed by most interf ace standar ds is not neede d because th is pin has an internal 7kΩ
resistor to VCC.
3.3.10 Monitor Outputs
To facilitate complying with laser safety and DDMI1 requirements, output monitors are provided for transmit power
(TxPwrMON) bias (BIASMON) and modulation current (MODMON).
These outputs wi ll source current proportional to the emitted op tical pow er (TxPwrMON) the bias current (BIASMON)
and modulation curr ent (MODMON). These pi ns should be terminated with a resistor to groun d that sets the desired
full-scale voltage (not to e xceed VCC3-1V). Using a monitor polarity selection (MONPOL) these monitors can be set
to sink current instead of source current. They will then need to be terminated with a resistor to VCC3 and the
induced voltage should not exceed 2.5V.
If the outputs of these monitors are not needed, MONPOL, TxPwrMON, BIASMON, and MODMON can all be left
floating and the chip current consumption will be reduced by the value of the monitor currents.
3.4 Laser Eye Safety
Using this laser driver in th e manner described herein does not ensure that the resulting laser tr ansmitter complies
with estab lish ed standar ds su ch as IEC 825 . User s m ust take the necessary precautions to ensure that e ye safe ty
and other applicable standards are met. Note that determining and implementing the level of fault tolerance
required by the applications that this part is going into is the responsibility of the transmitter designer and
manufacturer since the application of this device cannot be controlled by Mindspeed.
3.4.1 Safety Circuitry
On the M02061-12 with DISDLY on pin 8, SCB is int ernally bonded to ground so SCB is a lw a ys in a logic low st ate .
When SCB is high the OUTP, BIASout and SVCC outputs wil l not be disab led when FAIL asserts (FAIL goes high).
The outputs are only disabled by making DIS high.
The FAIL output will also ignore much of the safe ty sensing circuitry when SCB is high. However, it will monitor the
state of the window comparator s at pin APCSET. The bias current is controlled to nominally maintain the voltage at
APCSET to 1.3V. The threshold levels at the windo w comparators around APCSET are specified by the parameters
VBH and VBL as shown in the table below. This provides the same level of eye safety protection as our previous
generat ion of lase r drivers . The current sou rced out of pin APCSET is equal to the current into pin IPIN sourced from
the laser monitor photo diode. If the laser is emitting excess power this will be reflected in the IPIN current and the
v oltage at APCSET will go high and the FAIL pin will assert. If IPIN is not conne cted to the laser monitor pho to diode
then the voltage at APCSET will fall and FAIL will assert.
When SCB is low, safety circuitry in the M02061 will disable the modulation and bias current and assert the FAIL
output immediately upo n dete cting a fault condition. In addition , the su pply voltage that sources the laser (SVCC or
an external switch controlled by SHDWNOUT) will immediately go open circuit and prevent any current from
passing through the laser.
Fault conditions checked by the M02061 include shorts to ground or VCC of all pins which can increase the laser
modulation or bias current.
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F or an initialization sequence to be successful, all the fault detection monit ors must signal tha t the chip is “health y”.
When DIS goes low, pins are checked for shorts to ground or VCC and a FAIL condition is latched if there is a fault.
If the state of the pins is OK, a one-shot at the reset pin begins a countdo wn which will latch a FAIL condition if the
bias current has not stabilized to an acceptable lev el during the one-shot time. The one-shot can be extended with
an external capacitor connected from the RESET pin to ground.
The one-shot1 width is approximately:
TONE-SHOT = 3 ms + (0.3 ms/pF) x (external capacitance).
1.The one-shot is actually comprised of an oscillator and 10-bit counter.
Figure 3-8. Safety Circuit Block Diagram, for SCB Pin Low
Vcc Pin
5v Hi/Lo Limits
Vcc3 Pin
3.3v Hi/Lo Limits
5v Mode:
AND
Vcc3 Pin
3.3v Hi/Lo Limits
3.3v Mode:
AND
‘1’
Vcc Pin
5v Hi/Lo Limits
VccOK Detection:
Vcc Pin
5v Hi/Lo Limits
Vcc3 Pin
3.3v Hi/Lo Limits
5v Mode:
AND
Vcc Pin
5v Hi/Lo Limits
Vcc Pin
5v Hi/Lo Limits
Vcc3 Pin
3.3v Hi/Lo Limits
Vcc3 Pin
3.3v Hi/Lo Limits
5v Mode:
ANDAND
Vcc3 Pin
3.3v Hi/Lo Limits
3.3v Mode:
AND
‘1’
Vcc Pin
5v Hi/Lo Limits
Vcc3 Pin
3.3v Hi/Lo Limits
Vcc3 Pin
3.3v Hi/Lo Limits
3.3v Mode:
AND
‘1’
AND
‘1’
Vcc Pin
5v Hi/Lo Limits
Vcc Pin
5v Hi/Lo Limits
VccOK Detection:
CrudeFaults Detection:
OutP
Capc
MODset
IBout
> 300mV
> 300mV
> 300mV
> 300mV
Delay
Set
_
SRlatch
:Q
Reset
ONE-SHOT: StartStartStart
3ms + Tcapt=0 PULSE
NOTE: Pulse stays high
if Reset pin is GNDed.
RESET
optional cap for longer T_init
ANDANDAND
Window Compare:
HI Limit
MPCset
LOW Limit
OROROR
Set
_
SRlatch
:Q
Reset
ANDANDAND
ANDANDAND ANDANDAND
BiasOK Detection:
OUTPUT_ENABLE
VCC_OK
CrudeFaults_OK
BIAS_OK
Latch for
CrudeFaults
Latch for
Bias_OK
If chip is ‘healthy’, then Enable the
outputs and Start 3msec Reset
Pulse(one-shot)
(open-collector)
FAILout
(open-collector)
FAILout
OROR
DIS
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3.5 Fault Conditions when SCB is Low
This section describes the M02061 operating modes during fault conditions. Over voltage, under
voltage, pins shorted to VCC and pins shorted to ground are included in the fault table.
Table 3-3. Circuit Response to Single-point Fault Conditions, when SCB is Low 1 2 (1 of 2)
Pin Name Circuit Response to Over-voltage Condition
or Short to VCC
Circuit Response to Under-Voltage Condition
or Short to Ground
VCC Bias and modulation outputs are disabled once VCC rises
above the supply detection (high voltage) threshold Bias and modulation outputs are disabled on ce VCC drops below
the supply detection (low voltage) threshold
DIN+, DIN- The APC loop will attempt to compensate for the change in
output power. If the APC loop can not maintain the set
average power, a fault state occurs.(1, 2)
The APC loop will attempt to co mp ensate for the change in
output power. If the APC loop can not maintain the set average
power, a fault state occurs.(1, 2)
VCC3SEL Does not affect laser power. Does not affect laser power.
DIS Bias and modulation outputs are disabled.
3.3V operation - SVCC is opened.
5V operation - SHDWNOUT goes high.
Does not affect laser power (normal condition for circuit
operation).
FAIL Does not affect laser power. Does not affect laser power.
RESET Does not affect laser power. Does not affect laser power.
MODMON Does not affect laser power. Does not affect laser power.
BIASMON Does not affect laser power. Does not affect laser power.
TxPWRMON Does not affect laser power. Does not affect laser power.
APCSET A fault state occurs.(1) A fault state occurs.(1)
IPIN A fault state occurs.(1) A fault state occurs.(1)
IBIASOUT The laser will be turned off, then a fault state occurs.(1) A fault state occurs.(1)
OUTPLaser modulation is prevented; the AP C loop will increase the
bias current to compensate for the drop in laser power if it is
DC coupled. If the set output power can not be obtained, a
fault state occurs.(1, 2)
A fault state occurs.(1)
OUTNDoes not affect laser power. Does not affect laser power.
SVCC Does not affect laser power. Laser bias current will be shut off and a fault state occurs.(1)
CAPC Laser bias current will be shut off, then a fault state occurs.(1) A fault state occurs.(1)
VCC3 Bias and modulation outputs are disabled once VCC3 rises
above the supply detection (high voltage) threshold Bias and modulation outputs are disabled once VCC3 drops
below the supply detection (low voltage) threshold
PWA Does not affect laser power. Does not affect laser power
SHDWNOUT Does not affect laser power. if this pin is used to control an
external switch, laser current is disabled and fault state
occurs.(1)
Does not affect laser power.
MODSET The APC loop will attempt to compensate for the change in
output power. If the APC loop can not maintain the set
average power, a fault state occurs.(1, 2)
A fault state occurs.(1)
TCSLOPE Does not affect laser power. May affect laser power. If this is the case, the APC loop will
attempt to compensate for the change in output power. If the
APC loop can not maintain the set average power, a fault state
occurs.(1, 2)
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SCB Does not affect laser power. Does not affect laser power.
DISDLY Does not affect laser power. Does not affect laser power.
NOTES:
1. A fault state will assert the FAIL output, disable bias and modulation outputs and will either open the switch at SVCC (3.3V operation) or
SHDWNOUT will go high (5V operation).
2. Does not affect laser power when the output is AC coupled to the laser.
Table 3-3. Circuit Response to Single-point Fault Conditions, when SCB is Low 1 2 (2 of 2)
Pin Name Circuit Response to Over-voltage Condition
or Short to VCC
Circuit Response to Under-Voltage Condition
or Short to Ground
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4.0 Applications Information
4.1 General
• SFP and SFF Modules
• 1G/2G/4G Fibre Channel modules
• Short reach and Metro SONET/SDH
Figure 4-1 and Figure 4-2 illustrate typical applications for 3.3/AC coupled and 5V/DC coupled laser.
Figure 4-1. Application Diagram, VCC = 3.3V Laser AC Coupled Example
Input
Buffer
V
CC3
-1.3V
Internal
3.3V reg.
Input
Buffer D - FF Output
Buffer
Laser
Driver
Automatic Power Control
(laser bias current)
Safety
Circuitry with
Latched Fault
Modulation
Control
V
CC
V
CC3
FAIL
VCC3
SEL
PWA
SHDWN
OUT
SV
CC
OUT-
OUT+
GND
0
IBIAS
OUT
IPIN
DIS
MOD
SET
TC
SLOPE
MOD
MON
RESE T
BIAS
MON
APC
SET
C
APC
TxP wr
MON
D
IN
-
D
IN
+
Internal Power Bus
V
CC3
V
CC
V
CC
V
CC3
V
CC
V
CC
SCB
DISDLY
(M02061-12
only)
(M02061-21
only)
TX
Disable
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4.2 Video Operation
The M02061 can be used to tr ansmit digi tal video op tica l data even in the presen ce of t he path ological signal. This
is done b y fully DC coupling the signal f rom the input to the laser out put.In most da ta communicat ions applications ,
AC coupling occurs at 3 points in a laser driv er schematic: the data inputs, the APC control, and coupling the
modulation curren t to the laser . In the M02061 DC coupling can be used at all 3 of these poin ts.The data input s can
be DC coupled using PECL or CML levels (see Section 3.3.3, “Data Inputs” ). LVDS signals can be DC coupled
with level shifting.The APC of the bias current is controlled by feedback from the monitor photo diode in the laser
pac kage in mo st comm un ications ap plication s . In video ap p lications this mon itor p hoto diod e shou ld not be used if
the pathological pattern may occur. Instead, the APC should be controlled in an “open loop” configurat ion. (Open
loop simply means a monitor photo diode is not used). In the open loop configuration the APC is controlled by a
resistor or a thermistor network or a look-up table. This removes AC time constants from the bias current. In
Figure 4-3 the BIASm on pin is connected to the APCset pin . In this case the bias current is IBIAS = 100 x (1.3V /
RAPCset). The modulati on current output OUT+ can be DC coup led to the laser as sho wn in Figure 4-3. There are
no AC time const ants in the modulation current amplitude in this configuration.
Figure 4-2. Application Diagram, VCC = 5V Laser DC Coupled Example
Input
Buffer
V
CC3
-1.3V
Internal
3.3V reg.
Input
Buffer D - FF Output
Buffer
Laser
Driver
Automatic Power Control
(laser bias current)
Safety
Circuitry with
Latched Fault
Modulation
Control
V
CC
V
CC3
FAIL
VCC3
SEL
PWA
SHDWN
OU T
SV
CC
OUT-
OUT+
GND
0
IBIAS
OUT
IPIN
DIS
MOD
SET
TC
SLOPE
MO D
MON
RESET
BIAS
MON
APC
SET
C
APC
TxPwr
MON
D
IN
-
D
IN
+
Internal Power Bus
V
CC3
V
CC
=5V
V
CC
V
CC3
V
CC3
V
CC
SCB
DISDLY
(M02061-12
only)
(M02061-21
only)
TX
Disable
SPST switch
Applications Information
02061-DSH-001-F Mindspeed Technologies®36
Mindspeed Proprietary and Confidential
Figure 4-3. Video Application Block Diagram
Input
Buffer
V
CC3
-1.3V
Internal
3.3V reg.
Input
Buffer D - FF Output
Buffer
Automatic Power Control
(laser bias current)
Safety
Circuitry with
Latched Fault
Modulation
Control
V
CC
V
CC3
FAIL
VCC3
SEL
PWA
SHDWN
OU T
SV
CC
OUT-
OUT+
GND
0
IBIAS
OUT
IPIN
DIS
MOD
SET
TC
SLO P E
MO D
MON
RESET
BIAS
MON
APC
SET
C
APC
TxPwr
MON
D
IN
-
D
IN
+
Internal Power Bus
V
CC3
V
CC
=5V
V
CC
V
CC3
V
CC3
V
CC
SCB
DISDLY
(M02061-12
only)
(M02061-21
only)
TX
Disable
SPST switch
Laser
Driver
02061-DSH-001-F Mindspeed Technologies®37
Mindspeed Proprietary and Confidential
5.0 Package Specification
Figure 5-1. QFN24 Package Information
Note: View is for a 20 pin package. All dimensions in the
tables apply for the 24 pin package
www.mindspeed.com
General Information:
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Headquarters - Newport Beach
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