FEATURES
• Highly Integrated 10/100 and 1000
MAC, Switch Fabric, ARM7®
Processor and SDRAM Controller
• 192/264 Byte FIFO for 10/100
and 192/1008 Byte FIFO for Gbit
interfaces TX/RX, respectively
• 96-bit external SDRAM @125MHz
supporting up to 12 Gbps Bus
Interface to sustain packet transfers
of over 13 Mpps
• UNH-certified firmware
• 802.3x flow control
• Up to 4-port trunking suppor ting
800Mbps or 2-Gigabit uplink port
trunking supporting 4 Gbps
• 802.1Q VLAN tagging and untag-
ging support of up to 32 VLANs
• Per port Broadcast throttle
• MAC Address, port and VLAN por t-
mirroring
• Per port RMON statistics
• 802.1d Spanning Tree support
• IGMP and IP Multicast
• Security - port locking
• Support for GMII and TBI
• 54-pin SMII Physical Layer Interface
(24-ports).
• 388 PBGA
BENEFITS
• Support for Managed and
Unmanaged switch in 12 to 48 port
configuration expandable to 48-ports
of 10/100
• Delivers lower component count/cost
for multi-port switch
• Total solution, reference design and
third party firmware, time to revenue.
• Versatile uses: desktop switching,
chassis-based switch, control plane,
Ethernet appliance, etc.
24 + 2 10/100/1000 ETHERNET SWITCH WITH EMBEDDED
MANAGEMENT PROCESSOR
OVERVIEW:
The StreamPack L64324 is a single chip 24-port Fast Ether net (10/100)
switch with two Gigabit uplinks and an embedded ARM7®processor. This
device is based on LSI Logic’s industr y proven E110 MAC, ARM7 and E1000
MAC cores. Each port contains the Layer-2 Front End - 10/100 MAC, Tx and
Rx FIFOs, flow control (IEEE 802.3x), priority queuing (IEEE 802.1p) and VLAN
(IEEE 802.1Q). The L64324 non-blocking wire-speed switch fabric can sustain
packet transfers of over 13 Mpps. The StreamPack L64324 internal MAC
address table holds over 4,000 entries. The embedded ARM7®processor, with
4K unified Instruction and Data cache, may be utilized for network manage-
ment related tasks. A 96-bit SDRAM controller at 125 MHz provides up to 12
Gbps in memor y bandwidth for packet processing. Two Gigabit uplinks provide
connectivity to the backbone or local ser ver farm. This device allows trunking of
up to four of the 10/100 ports, or two of the 2-Gigabit uplink por ts to provide
higher aggregated bandwidth of up to 800 Mbps or 4 Gigabits respectively,
with added data integrity. The StreamPack L64324 priority queuing capability
allows for time sensitive data to have access to the network with minimal delay.
The Serial MII (SMII) enables a lower I/O density package interfacing the phys-
ical layer devices to the StreamPack L64324 in a 388 PBGA package. This
System-On-a-Chip (SOC) solution enables system designers to develop cost-
effective desktop and workgroup fully-managed or partially managed Fast
Ethernet switches. StreamPack L64324 is fabricated using LSI Logic’s 0.25
micron process technology with the core logic operating at 2.5V.
StreamPackTM L64324
Layer 2 Switch
L64324 Functional Block Diagram