Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
1MHz, High-Efficiency, Step-Up Converter for 2 to 8 White LEDs
The APW7136A/B/C also integrates under-voltage
lockout, over-temperature protection, and current-limit
circuits. The APW7136/A/B/C is available in a SOT-23-6
packages.
Features
•Wide Input Voltage from 2.7V to 6V
•0.25V Reference Voltage
•Fixed 1MHz Switching Frequency
•High Efficiency up to 87%
•100Hz to 100kHz PWM Brightness Control
Frequency
•Open-LED Protection
•Under-Voltage Lockout Protection
•Over-Temperature Protection
•<1µA Quiescent Current Dduring Shutdown
•SOT-23-6 Packages
•Lead Free and Green Devices Available
(RoHS Compliant)
Applications
General Description
•White LED Display Backlighting
•Cell Phone and Smart Phone
•PDA, PMP, MP3
•Digital Camera
Simplified Application Circuit
Pin Configuration
The APW7136A/B/C is a current-mode and fixed frequency
boost converter with an integrated N-FET to drive up to 8
white LEDs in series.
The series connection allows the LED current to be iden-
tical for uniform brightness. Its low on-resistance of N-
FET and feedback voltage reduce power loss and achieve
high efficiency. Fast 1MHz current-mode PWM operation
is available for input and output capacitors and a small
inductor while minimizing ripple on the input supply. The
OVP pin monitors the output voltage and stops switching
if exceeds the over-voltage threshold. An internal soft-
start circuit eliminates the inrush current during start-up.
GND
VIN
VOUT
EN
LX
FB
OVP
4
6
5
3
2
1
L1
22µH
C2
1µF
C1
4.7µF
R1
12Ω
VIN
Up to 8
WLEDs
OFF ON
4 EN
6 VIN
GND 2 5 OVP
FB 3
LX 1
SOT-23-6 Top View
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw2
Symbol
Parameter Rating Unit
VIN VIN Supply Voltage (VIN to GND) -0.3 ~ 8 V
FB, EN to GND Voltage -0.3 ~ VIN V
VLX LX to GND Voltage -0.3 ~ 38 V
VOVP OVP to GND Voltage -0.3 ~ 38 V
TJ Maximum Junction Temperature 150 oC
TSTG Storage Temperature Range -65 ~ 150 oC
TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 oC
Absolute Maximum Ratings (Note 1)
Thermal Characteristics
Symbol
Parameter Rating Unit
θJA Junction to Ambient Thermal Resistance (Note 2) SOT-23-6
250 °C/W
Ordering and Marking Information
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Symbol
Parameter Range Unit
VIN VIN Input Voltage 2.7~ 6 V
VOUT Converter Output Voltage Up to 32 V
CIN Input Capacitor 4.7 or higher µF
COUT Output Capacitor 0.68 or higher µF
L1 Inductor 6.8 to 47 µH
Recommended Operating Conditions (Note 3)
Note 1: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. The exposed pad
of package is soldered directly on the PCB.
OVP Voltage Code
A: 20V B: 28V C: 35V
Package Code
C : SOT-23-6
Operating Ambient Temperature Range
I : -40 to 85oC
Handling Code
TR : Tape & Reel
Assembly Material
G : Halogen and Lead Free Device
APW7136
Handling Code
Temperature Range
Package Code
Assembly Material
OVP Voltage Code
APW7136YCI : Y - OVP Voltage Code
X - Date Code
CFYX
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw3
Symbol
Parameter Range Unit
TA Ambient Temperature -40 to 85 °C
TJ Junction Temperature -40 to 125 °C
Note 3: Refer to the application circuit for further information.
Electrical Characteristics
APW7136A/B/C
Symbol
Parameter Test Conditions Min.
Typ. Max.
Unit
SUPPLY VOLTAGE AND CURRENT
VIN Input Voltage Range TA = -40 ~ 85°C, TJ = -40 ~ 125°C 2.7 - 6 V
IDD1 VFB = 1.3V, no switching 70 100 130 µA
IDD2 FB = GND, switching - 1 2 mA
ISD
Input DC Bias Current
EN = GND - - 1 µA
UNDER-VOLTAGE LOCKOUT
UVLO Threshold Voltage VIN Rising 2.0 2.2 2.4 V
UVLO Hysteresis Voltage 50 100 150 mV
REFERENCE AND OUTPUT VOLTAGES
TA = 25°C 237 250 263
VREF Regulated Feedback Voltage TA = -40 ~ 85°C (TJ = -40 ~ 125°C) 230 - 270 mV
IFB FB Input Current -50 - 50 nA
INTERNAL POWER SWITCH
FSW Switching Frequency FB=GND 0.8 1.0 1.2 MHz
RON Power Switch On Resistance - 0.6 - Ω
ILIM Power Switch Current-Limit 0.7 0.9 1.2 A
LX Leakage Current VEN=0V, VLX=0V or 5V, VIN = 5V -1 - 1 µA
DMAX LX Maximum Duty Cycle 92 95 98 %
OUTPUT OVER-VOLTAGE PROTECTION
APW7136A - 20 -
APW7136B - 28 -
VOVP Over-Voltage Threshold
APW7136C - 35 -
V
OVP Hysteresis - 3 - V
OVP Leakage Current VOVP =30V, EN=VIN - - 50 µA
ENABLE AND SHUTDOWN
VTEN EN Voltage Threshold VEN Rising 0.4 0.7 1 V
EN Voltage Hysteresis - 0.1 - V
ILEN EN Leakage Current VEN= 0~5V, VIN = 5V -1 - 1 µA
OVER-TEMPERATURE PROTECTION
TOTP Over-Temperature Protection TJ Rising - 150 - °C
Over-Temperature Protection
Hysteresis - 40 - °C
(Refer to Figure 1 in the “Typical Application Circuits.” These specifications apply over VIN = 3.6V, TA = -40°C to 85°C,
unless otherwise noted. Typical values are at TA = 25°C.)
Recommended Operating Conditions (Note 3) (Cont.)
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw4
Typical Operating Characteristics
Efficiency vs. WLED Current Efficiency vs. WLED Current
Efficiency vs. WLED Current WLED Current vs. PWM Duty Cycle
Switch ON Resistance vs. Supply Voltage
WLED Current vs. Supply Voltage
(Refer to Figure 1 in the section “Typical Application Circuits,” VIN=3.6V, TA=25oC, 8WLEDs unless otherwise specified.)
Efficiency (η)
WLED Current, ILED (mA)
50
55
60
65
70
75
80
85
90
95
0 5 10 15 20 25 30
8 WLEDs 25.6V@20mA
η=POUT/PIN
VIN=3.3V
VIN=4.2V
VIN=3.6V
VIN=5V
≅
Efficiency (η)
WLED Current, ILED (mA)
0 5 10 15 20 25 30
50
55
60
65
70
75
80
85
90
95
VIN=3.3V
VIN=3.6V
VIN=4.2V
VIN=5V
6 WLEDs 19.3V@20mA
η=POUT/PIN
≅
Efficiency (η)
Supply Voltage, VIN (V)
4 WLEDs 13V@20mA
η=POUT/PIN
VIN=3.3V VIN=3.6V
VIN=4.2V
VIN=5V
0 5 10 15 20 25 30
50
55
60
65
70
75
80
85
90
95
≅
WLED Current, ILED (mA)
PWM Duty Cycle (%)
0 20 40 60 80 100
0
2
4
6
8
10
12
14
16
18
20
100Hz
100KHz
1kHz
WLED Current, ILED (mA)
Supply Voltage, VIN (V)
19.0
19.2
19.4
19.6
19.8
20.0
20.2
20.4
20.6
20.8
21.0
2.5 33.5 44.5 55.5 6
Switch ON Resistance, RON (Ω)
Supply Voltage, VIN (V)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
2.5 33.5 44.5 55.5 6
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw5
Typical Operating Characteristics
Switching Frequency vs. Supply Voltage Maximum Duty Cycle vs. Supply Voltage
(Refer to Figure 1 in the section “Typical Application Circuits,” VIN=3.6V, TA=25oC, 8WLEDs unless otherwise specified.)
Switching Frequency, FSW (MHz)
Supply Voltage, VIN (V)
2.5 33.5 44.5 55.5 6
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
Maximum Duty Cycle, DMAX (%)
Supply Voltage, VIN (V)
40
50
60
70
80
90
100
2.5 33.5 44.5 55.5 6
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw6
Operating Waveforms
(Refer to the application circuit in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, 8WLEDs unless other-
wise specified.)
Start-up
CH1: VEN, 2V/Div, DC
CH2: VIN, 2V/Div, DC
CH3: VOUT, 10V/Div, DC
CH4: IL, 0.1A/Div, DC
Time: 1ms/Div
2
1
3
4
VOUT
IIN, 0.1A/Div
VIN
VEN
8WLEDs, L=22µH, VIN=3.6V, ILED=20mA
CH1: VEN, 2V/Div, DC
CH2: VIN, 2V/Div, DC
CH3: VOUT, 10V/Div, DC
CH4: IL, 0.1A/Div, DC
Time: 1ms/Div
Start-up
2
1
3
4
VOUT
IIN, 0.1A/Div
VIN
VEN
6WLEDs, L=22µH, VIN=3.6V, ILED=20mA
CH1: VEN, 2V/Div, DC
CH2: VIN, 2V/Div, DC
CH3: VOUT, 10V/Div, DC
CH4: IL, 0.1A/Div, DC
Time: 1ms/Div
Start-up
2
1
3
4
VOUT
IIN, 0.1A/Div
VIN
VEN
4WLEDs, L=22µH, VIN=3.6V, ILED=20mA
CH1: VOUT, 10V/Div, DC
Time: 20ms/Div
Open-LED Protection
1
VOUT,10V/Div
APW7136C
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw7
Operating Waveforms
(Refer to the application circuit in the section “Typical Application Circuits,” VIN=3.6V, TA=25oC, 8WLEDs unless other-
wise specified.)
CH1: VLX, 20V/Div, DC
CH2: VOUT, 50V/Div, AC
CH3: IL, 0.1A/Div, DC
Time: 1µs/Div
Normal Operating Waveform
3
2
1
VOUT,50mV/Div,AC
VLX, 20V/Div, DC
IL, 0.1A/Div
8WLEDs, L=22µH, VIN=3.6V, ILED=20mA
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw8
Block Diagram
Pin Description
PIN
NO. NAME FUNCTION
1 LX Switch pin. Connect this pin to inductor/diode here.
2 GND Power and signal ground pin.
3 FB Feedback Pin. Reference voltage is 0.25V. Connect this pin to cathode of the lowest LED and
resistor (R1). Calculate resistor value according to R1=0.25V/ILED.
4 EN Enable Control Input. Forcing this pin above 1.0V enables the device, or forcing this pin below 0.4V
to shut it down. In shutdown, all functions are disabled to decrease the supply current below 1µA.
Do not leave this pin floating.
5 OVP Over-Voltage Protection Input Pin. OVP is connected to the output capacitor of the converter.
6 VIN Main Supply Pin. Must be closely decoupled to GND with a 4.7µF or greater ceramic capacitor.
UVLO
Oscillator
Control Logic
Σ
VIN
EN
FB
GND
LX
OVP
Over-
Temperature
Protection
VREF
0.25V
EAMP
COMP
ICMP
Slope
Compensation
Gate Driver
Current Sense
Amplifier
Error
Amplifier
Current-
limit
Soft-
start
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw9
Typical Application Circuits
GND
VIN
VOUT
EN
LX
FB
OVP
4
6
5
3
2
1
L1
10µH
C2
10µF
C1
10µF
R1
1.4Ω
0603
VIN
4.5V~6V
9 Strings
total
OFF ON
Figure 4. Circuit for Driving 27 WLEDs
APW7136
GND
VIN
VOUT
EN
LX
FB
OVP
4
6
5
3
2
1
L1
22µH
C2
1µF
C1
4.7µF
R1
12Ω
VIN
Up to 8
WLEDs
OFF ON
Figure 1. Typical 8 WLEDs Application
APW7136 GND
VIN
VOUT
EN
LX
FB
OVP
4
6
5
3
2
1
L1
22µH
C2
1µF
C1
4.7µF
R1
12Ω
VIN
Up to 8
WLEDs
Figure 2. Brightness Control Using a PWM Signal
Applies to EN
100Hz~100kHz
Duty=100%, ILED=20mA
Duty=0%, LED off
APW7136
GND
VIN
VOUT
EN
LX
FB
OVP
4
6
5
3
2
1
L1
22µH
C2
1µF
C1
4.7µF
R1
12Ω
R2
10k
R3
120k
C3
0.1µF
R4
10k
VIN
PWM
brightness
control Duty=100%, LED off
Duty=0%, ILED=20mA
3.3V 0V
Up to 8
WLEDs
Figure 3. Brightness Control Using a Filtered PWM Signal
OFF ON APW7136
MAX,LEDREFMIN,LEDMIN,ADJMIN,LEDREFMAX,LEDMAX,ADJ
MAX,ADJMIN,LEDMIN,ADJMAX,LED
REF IVIVIVIVV3RIV3RI
V2R⋅−⋅−⋅+⋅−⋅−+⋅
⋅=
MAX,LED
MIN,ADJREF
I
V
3R2R
3R2R
1V
1R⋅−
+⋅
=
VADJ
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw10
Function Description
Main Control Loop
The APW7136 is a constant frequency current-mode
switching regulator. During normal operation, the inter-
nal N-channel power MOSFET is turned on each cycle
when the oscillator sets an internal RS latch and turned
off when an internal comparator (ICMP) resets the latch.
The peak inductor current at which ICMP resets the RS
latch is controlled by the voltage on the COMP node, which
is the output of the error amplifier (EAMP). An external
resistive divider connected between VOUT and ground al-
lows the EAMP to receive an output feedback voltage VFB
at FB pin. When the load current increases, it causes a
slightly decrease in VFB relative to the 0.25V reference,
which in turn causes the COMP voltage to increase until
the average inductor current matches the new load
current.
VIN Under-Voltage Lockout (UVLO)
The Under-Voltage Lockout (UVLO) circuit compares the
input voltage at VIN with the UVLO threshold (2.2V, typical)
to ensure the input voltage is high enough for reliable
operation. The 100mV (typical) hysteresis prevents sup-
ply transients from causing a restart. Once the input volt-
age exceeds the UVLO rising threshold, start-up begins.
When the input voltage falls below the UVLO falling
threshold, the controller turns off the converter.
Soft-Start
The APW7136 has a built-in soft-start to control the N-
channel MOSFET current rise during start-up. During soft-
start, an internal ramp, connected to one of the inverting
inputs, raises up to replace the output voltage of error
amplifier until the ramp voltage reaches the VCOMP.
Current-Limit Protection
The APW7136 monitors the inductor current, flowing
through the N-channel MOSFET, and limits the current
peak at current-limit level to prevent loads and the
APW7136 from damaging during overload conditions.
Over-Temperature Protection (OTP)
The over-temperature circuit limits the junction tempera-
ture of the APW7136. When the junction temperature ex-
ceeds 150οC, a thermal sensor turns off the power
MOSFET, allowing the devices to cool. The thermal sen-
sor allows the converters to start a soft-start process and
regulate the output voltage again after the junction tem-
perature cools by 40οC. The OTP is designed with a 40οC
hysteresis to lower the average Junction Temperature
(TJ) during continuous thermal overload conditions, in-
creasing the lifetime of the device.
Enable/Shutdown
Driving EN to the ground places the APW7136 in shut-
down mode. When in shutdown, the internal power
MOSFET turns off, all internal circuitry shuts down and
the quiescnet supply current reduces to 1µA maximum.
Open-LED Protection
In driving LED applications, the feedback voltage on FB
pin falls down if one of the LEDs, in series, is failed.
Meanwhile, the converter unceasingly boosts the output
voltage like a open-loop operation. Therefore, an over-
voltage protection (OVP), monitoring the output voltage
via OVP pin, is integrated into the chip to prevent the LX
and the output voltages from exceeding their maximum
voltage ratings. When the voltage on the OVP pin rises
above the OVP threshold, the converter stops switching
and prevents the output voltage from rising. The converter
can work again when the OVP voltage falls below the
falling of OVP voltage threshold.
This pin also could be used as a digital input allowing
brightness control using a PWM signal from 100Hz to
100kHz. The 0% duty cycle of PWM signal corresponds to
zero LEDs current and 100% corresponds to full one.
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw11
Application Information
Input Capacitor Selection
The input capacitor (CIN) reduces the ripple of the input
current drawn from the input supply and reduces noise
injection into the IC. The reflected ripple voltage will be
smaller when an input capacitor with larger capacitance
is used. For reliable operation, it is recommended to
select the capacitor with maximum voltage rating at least
1.2 times of the maximum input voltage. The capacitors
should be placed close to the VIN and the GND.
Inductor Selection
Selecting an inductor with low DC resistance reduces
conduction losses and achieves high efficiency. The effi-
ciency is moderated whilst using small chip inductor
which operates with higher inductor core losses.
Therefore, it is necessary to take further consideration
while choosing an adequate inductor. Mainly, the induc-
tor value determines the inductor ripple current: larger
inductor value results in smaller inductor ripple current
and lower conduction losses of the converter. However,
larger inductor value generates slower load transient
response. A reasonable design rule is to set the ripple
current, ∆IL, to be 30% to 50% of the maximum average
inductor current, IL(AVG). The inductor value can be ob-
tained as below,
whereVIN = input voltage
VOUT = output voltage
FSW = switching frequency in MHz
IOUT = maximum output current in amp.
η = Efficiency
∆IL /IL(AVG) = inductor ripple current/average current
(0.3 to 0.5, typical)
To avoid the saturation of the inductor, the inductor should
be rated at least for the maximum input current of the
converter plus the inductor ripple current. The maximum
input current is calculated as below:
η⋅⋅
=IN
OUT)MAX(OUT
)MAX(IN VVI
I
The peak inductor current is calculated as the following
equation:
(
)
SWOUT
INOUTIN
)MAX(INPEAK FLVVVV
2
1
II ⋅⋅ −⋅
⋅+=
Output Capacitor Selection
The current-mode control scheme of the APW7136 al-
lows the usage of tiny ceramic capacitors. The higher
capacitor value provides good load transients response.
Ceramic capacitors with low ESR values have the lowest
output voltage ripple and are recommended. If required,
tantalum capacitors may be used as well. The output ripple
is the sum of the voltages across the ESR and the ideal
output capacitor.
where IPEAK is the peak inductor current.
ΔVOUT = ΔVESR + ΔVCOUT
⋅
−
⋅≈∆SWOUT
INOUT
OUT
OUT
COUT FVVV
C
I
V
ESRPEAKESR RIV⋅≈∆
( )
∆
η
×
⋅−
×
≥
AVGL
L
)MAX(OUTSW
INOUT
2
OUT
IN
II
IFVV
V
V
L
VIN VOUT
IL
N-FET
LX IOUT
ISW
CIN
COUT
IIN D1
ESR
ILIM
IL
IPEAK
IIN
IOUT
ISW
ID
∆IL
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw12
Application Information (Cont.)
Output Capacitor Selection (Cont.)
For ceramic capacitor application, the output voltage ripple
is dominated by the ∆VCOUT. When choosing the input and
output ceramic capacitors, the X5R or X7R with their
good temperature and voltage characteristics are
recommended.
Diode Selection
To achieve the high efficiency, a Schottky diode must be
used. The current rating of the diode must meet the peak
current rating of the converter.
Setting the LED Current
In figure 1, the converter regulates the voltage on FB pin,
connected with the cathod of the lowest LED and the cur-
rent-sense resistor R1, at 0.25V (typical). Therefore, the
current (ILED), flowing via the LEDs and the R1, is calcu-
lated by the following equation:
ILED = 0.25V/R1
Recommended
Inductor
Selection
Designator
Manufacturer
Part Number Inductance (µH)
Max DCR (ohm)
Saturation
Current (A) Dimensions
L x W x H (mm3)
L1 GOTREND
GTSD32 22 0.592 0.52 3.85 x 3.85 x 1.8
Recommended Capacitor Selection
Designator
Manufacturer
Part Number Capacitance (µF)
TC Code Rated Voltage (V)
Case Size
C1 Murata GRM188R60J475KE19
4.7 X5R 6.3 0603
C2 Murata GRM21BR71H105KA12
1.0 X7R 50 0805
Recommended Diode Selection
Designator
Manufacturer
Part Number
Maximum Average Forward
Rectified Current (A) Maximum Repetitive Peak
Reverse Voltage (V) Case Size
D1 Zowie MSCD106 1.0 60 0805
D1 Zowie MSCD104 1.0 40 0805
Layout Consideration
For all switching power supplies, the layout is an impor-
tant step in the design; especially at high peak currents
and switching frequencies. If the layout is not carefully
done, the regulator might show noise problems and duty
cycle jitter.
1. The input capacitor should be placed close to the VIN
and the GND. Connecting the capacitor with VIN and
GND pins by short and wide tracks without using any
vias for filtering and minimizing the input voltage ripple.
2. The inductor should be placed as close as possible to
the LX pin to minimize length of the copper tracks as
well as the noise coupling into other circuits.
3. Since the feedback pin and network is a high imped-
ance circuit, the feedback network should be routed
away from the inductor. The feedback pin and feed-
back network should be shielded with a ground plane
or track to minimize noise coupling into this circuit.
4. A star ground connection or ground plane minimizes
ground shifts and noise is recommended.
To Anode of
WLEDs
From Cathod
of WLEDs
R1
R4
R3
R2
C3
Via To OVP
Via To GND
L1
C1
Via To VOUT
D1
VADJ
VEN
VIN
LX
Refer to Figure. 3
C2
Optimized APW7136 Layout
VOUT
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw13
Package Information
SOT-23-6
0
L
VIEW A
0.25
GAUGE PLANE
SEATING PLANE
A
A2A1
e
D
E1
SEE VIEW A
bc
e1
E
0
°
8
°
0
°
8
°
0.020
0.009
0.006
0.024
0.051
0.057
MAX.
0.30L
0
E
e
e1
E1
D
c
b
0.08
0.30
0.012
0.60
0.95 BSC
1.90 BSC
0.50
0.22
0.075 BSC
0.037 BSC
0.012
0.003
MILLIMETERS
MIN.
S
Y
M
B
O
L
A1
A2
A
0.00
0.90
SOT-23-6
MAX.
1.30
0.15
1.45
MIN.
0.000
0.035
INCHES
1.40
2.60 3.00
1.80
2.70 3.10
0.118
0.071
0.122
0.102
0.055
0.106
Note : 1. Follow JEDEC TO-178 AB.
2. Dimension D and E1 do not include mold flash, protrusions or
gate burrs. Mold flash, protrusion or gate burrs shall not exceed
10 mil per side.
SEATING PLANE < 4 mils-T-
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw14
Carrier Tape & Reel Dimensions
H
T1
A
d
A
E1
A
B
W
F
T
P0
OD0
BA0
P2
K0
B0
SECTION B-B
SECTION A-A
OD1
P1
Application
A H T1 C d D W E1 F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0 P1 P2 D0 D1 T A0 B0 K0
SOT-23-6
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
(mm)
Devices Per Unit
Package Type Unit Quantity
SOT-23-6 Tape & Reel 3000
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw15
Taping Direction Information
SOT-23-6
Classification Profile
USER DIRECTION OF FEED
AAAX AAAX AAAX AAAX AAAX AAAX AAAX
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw16
Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
Average ramp-up rate
(Tsmax to TP) 3 °C/second max. 3 °C/second max.
Liquidous temperature (TL)
Time at liquidous (tL) 183 °C
60-150 seconds 217 °C
60-150 seconds
Peak package body Temperature
(Tp)* See Classification Temp in table 1 See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc) 20** seconds 30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max. 6 °C/second max.
Time 25°C to peak temperature 6 minutes max. 8 minutes max.
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Classification Reflow Profiles
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness Volume mm3
<350 Volume mm3
≥350
<2.5 mm 235 °C 220 °C
≥2.5 mm 220 °C 220 °C
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness Volume mm3
<350 Volume mm3
350-2000 Volume mm3
>2000
<1.6 mm 260 °C 260 °C 260 °C
1.6 mm – 2.5 mm 260 °C 250 °C 245 °C
≥2.5 mm 250 °C 245 °C 245 °C
Test item Method Description
SOLDERABILITY JESD-22, B102 5 Sec, 245°C
HOLT JESD-22, A108 1000 Hrs, Bias @ Tj=125°C
PCT JESD-22, A102 168 Hrs, 100%RH, 2atm, 121°C
TCT JESD-22, A104 500 Cycles, -65°C~150°C
HBM MIL-STD-883-3015.7 VHBM≧2KV
MM JESD-22, A115 VMM≧200V
Latch-Up JESD 78 10ms, 1tr≧100mA
Reliability Test Program
Copyright ANPEC Electronics Corp.
Rev. A.4 - Dec., 2010
APW7136A/B/C
www.anpec.com.tw17
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
