ADVANCE INFORMATION GALVANTECH, INC. GVT73128A16 REVOLUTIONARY PINOUT 128K X 16 ASYNCHRONOUS SRAM 128K x 16 SRAM +3.3V SUPPLY, SINGLE CHIP ENABLE REVOLUTIONARY PINOUT FEATURES GENERAL DESCRIPTION * * * * * * * * * * The GVT73128A16 is organized as a 131,072 x 16 SRAM using a four-transistor memory cell with a high performance, silicon gate, low-power CMOS process. Galvantech SRAMs are fabricated using triple-layer polysilicon, double-layer metal technology. This device offers center power and ground pins for improved performance and noise immunity. Static design eliminates the need for external clocks or timing strobes. For increased system flexibility and eliminating bus contention problems, this device offers chip enable (CE#), separate byte enable controls (BLE# and BHE#) and output enable (OE#) with this organization. The device offers a low power standby mode when chip is not selected. This allows system designers to meet low standby power requirements. * Fast access times: 10, 12, 15and 20ns Fast OE# access times: 5, 6, 7 and 8ns Single +3.3V +0.3V power supply Fully static -- no clock or timing strobes necessary All inputs and outputs are TTL-compatible Three state outputs Center power and ground pins for greater noise immunity Easy memory expansion with CE# and OE# options Automatic CE# power down High-performance, low-power consumption, CMOS triple-poly, double-metal process Packaged in 44-pin, 400-mil SOJ and 44-pin, 400-mil TSOP OPTIONS * * * * Timing 10ns access 12ns access 15ns access 20ns access Packages 44-pin SOJ (400 mil) 44-pin TSOP (400 mil) Power consumption Standard Low Temperature Commercial Industrial MARKING -10 -12 -15 -20 PIN ASSIGNMENT 44-Pin SOJ 44-Pin TSOP J TS None L None I (0C to 70C) (-40C to 85C) Galvantech, Inc. 3080 Oakmead Village Drive, Santa Clara, CA 95051 Tel (408) 566-0688 Fax (408) 566-0699 Rev. 12/9 7 A4 A3 A2 A1 A0 CE# DQ1 DQ2 DQ3 DQ4 VCC VSS DQ5 DQ6 DQ7 DQ8 WE# A16 A15 A14 A13 A12 1 44 2 43 3 42 4 41 5 40 6 39 7 38 8 37 9 36 10 35 11 34 12 33 13 32 14 31 15 30 16 29 17 28 18 27 19 26 20 25 21 24 22 23 A5 A6 A7 OE# BHE# BLE# DQ16 DQ15 DQ14 DQ13 VSS VCC DQ12 DQ11 DQ10 DQ9 NC A8 A9 A10 A11 NC Galvantech, Inc. reserves the right to chang e products or specifications without notice. ADVANCE INFORMATION GVT73128A16 REVOLUTIONARY PINOUT 128K X 16 GALVANTECH,INC. FUNCTIONAL BLOCK DIAGRAM VCC BLE# VSS DQ1 MEMORY ARRAY 512 ROWS X 256 X 16 COLUMNS I/O CONTROL ROW DECODER ADDRESS BUFFER A0 DQ8 DQ9 DQ16 A16 December 11, 199 7 Rev. 12/9 7 COLUMN DECODER 2 POWER DOWN CE# BHE# WE# OE# Galvantech, Inc. reserves the right to change products or specifications without notice. ADVANCE INFORMATION GVT73128A16 REVOLUTIONARY PINOUT 128K X 16 GALVANTECH,INC. TRUTH TABLE MODE LOW BYTE READ (DQ1-DQ8) HIGH BYTE READ (DQ9-DQ16) WORD READ (DQ1-DQ16) LOW BYTE WRITE (DQ1-DQ8) HIGH BYTE WRITE (DQ9-DQ16) WORD WRITE (DQ1-DQ16) OUTPUT DISABLE STANDBY CE# WE# OE# BLE# BHE# DQ1DQ8 DQ9DQ16 POWER L L L L L L L L H H H L L L X H L L L X X X X H L H L L H L H X H L L H L L H X Q HIGH-Z Q D HIGH-Z D HIGH-Z HIGH-Z HIGH-Z Q Q HIGH-Z D D HIGH-Z HIGH-Z ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE H X X X X HIGH-Z HIGH-Z STANDBY PIN DESCRIPTIONS SOJ & TSOP Pin Numbers SYMBOL TYPE A0-A16 Input Addresses Inputs: These inputs determine which cell is addressed. 17 WE # Input Write Enable: This input determines if the cycle is a READ or WRITE cycle. WE# is LOW for a WRITE cycle and HIGH for a READ cycle . 6 CE# Input Chip Enable: This active LOW input is used to enable the device. When CE# is LOW, the chip is selected. When CE# is HIGH, the chip is disabled and automatically goes into standby power mode. 39, 40 BLE#, BHE# Input Byte Enable: These active LOW inputs allow individual bytes to be written or read. When BLE# is LOW, the data is written to or read from the lower byte (DQ1-DQ8). When BHE# is LOW, the data is written to or read from the higher byte (DQ9-DQ16). 5, 4, 3, 2, 1, 44, 43, 42, 27, 26, 25, 24, 22, 21, 20, 19, 18 DESCRIPTION Input Output Enable: This active LOW input enables the output drivers. Input/Output SRAM Data I/O: Data inputs and data outputs. Lower byte is DQ1-DQ8 and upper byte is DQ9-DQ16. 41 O E# 7, 8, 9, 10, 13, 14, 15, 16, 29, 30, 31, 32, 35, 36, 37, 38 DQ1-DQ16 11, 33 VCC Supply Power Supply: 3.3V +0.3V 12, 34 VSS Supply Ground December 11, 199 7 Rev. 12/9 7 3 Galvantech, Inc. reserves the right to change products or specifications without notice. ADVANCE INFORMATION GVT73128A16 REVOLUTIONARY PINOUT 128K X 16 GALVANTECH,INC. *Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device.This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ABSOLUTE MAXIMUM RATINGS* Voltage on VCC Supply Relative to VSS........-0.5V to +4.6V VIN ..........................................................-0.5V to VCC+1.0V Storage Temperature (plastic) ..........................-55 oC to +125o Junction Temperature .....................................................+125 o Power Dissipation ...........................................................1.0W Short Circuit Output Current .......................................50mA DC ELECTRICAL CHARACTERISTICS AND RECOMMENDED OPERATING CONDITIONS (All Temperature Ranges; VCC = 3.3V +0.3V unless otherwise noted) DESCRIPTION CONDITIONS SYMBOL MIN MAX UNITS NOTES Input High (Logic 1) voltage V IH 2.2 VCC+0.5 V 1, 2 Input Low (Logic 0) Voltage V Il -0.5 0.8 V 1, 2 Input Leakage Current 0V < V IN < VCC IL I -5 5 uA Output Leakage Current Output(s) disabled, 0V < V OUT < VCC IL O -5 5 uA Output High Voltage IOH = -4.0mA V OH 2.4 Output Low Voltage IOL = 8.0mA V OL Supply Voltage VCC DESCRIPTION CONDITIONS Power Supply Current: Operating TTL Standby CMOS Standby 3.0 V 1 0.4 V 1 3.6 V 1 SYM TYP POWER -10 -12 -15 -20 Device selected; CE# < V IL ; VCC =MAX; f= fMAX ; outputs open Ic c 70 190 160 130 100 180 150 120 90 CE# >V IH; VCC = MAX; f=fMAX ISB1 standard low standard low 35 30 25 20 30 25 20 15 CE1# >VCC -0.2; VCC = MAX; all other inputs < VSS +0.2 or >VCC -0.2; all inputs static; f= 0 10 ISB2 0.02 standard low 3 3 3 3 0.3 0.3 0.3 0.3 UNIT S NOTES mA 3, 14 mA 14 mA 14 CAPACITANCE DESCRIPTION CONDITIONS Input Capacitance TA = 25 o C; f = 1 MHz VCC = 3.3V Input/Output Capacitance (DQ) December 11, 199 7 Rev. 12/9 7 SYMBOL MAX UNITS NOTES CI 6 pF 4 CI/O 8 pF 4 4 Galvantech, Inc. reserves the right to change products or specifications without notice. ADVANCE INFORMATION GVT73128A16 REVOLUTIONARY PINOUT 128K X 16 GALVANTECH,INC. AC ELECTRICAL CHARACTERISTICS (Note 5) (All Temperature Ranges; VCC = 3.3V +0.3V) DESCRIPTION - 10 - 12 MAX MIN - 15 MAX MIN - 20 SY M MIN MAX MIN MAN UNIT S NOTES READ cycle tim e t RC 10 Address access time tA A 10 12 15 20 ns t ACE 10 12 15 20 ns READ Cycle Chip Enable access time 12 15 20 t OH 3 4 4 4 Chip Enable to output in Low- Z tLZC E 3 4 4 4 Chip disable to output in High-Z tHZC E Output hold from address chang e Output Enable access time 5 tAO E 6 5 7 6 7 ns ns ns 4, 7 8 ns 4, 6, 7 8 ns Output Enable to output in Low- Z t LZOE Output Enable to output in High-Z t HZOE 5 6 7 8 ns t ABE 6 7 8 9 ns Byte Enable access tim e Byte Enable to output in Low-Z tLZBE Byte disable to output in High-Z tHZB E Chip Enable to power-up time tPU Chip disable to power-down tim e tPD 0 0 0 0 0 0 5 0 0 6 0 0 7 0 10 12 ns 8 0 15 20 4, 6 ns 4, 7 ns 4, 6, 7 ns 4 ns 4 WRITE Cycle WRITE cycle tim e t WC 10 12 15 20 ns Chip Enable to end of write t CW 8 8 9 10 ns Address valid to end of write, with OE# HIGH tAW 8 8 9 10 ns Address setup time tA S 0 0 0 0 ns Address hold from end of write tAH 0 0 0 0 ns WRITE pulse width tWP2 10 10 11 12 ns WRITE pulse width, with OE# HIGH tWP1 8 8 9 10 ns Data setup tim e tDS 5 6 7 8 ns Data hold tim e t DH 0 0 0 0 ns Write disable to output in Low-Z t LZWE 3 4 5 5 Write Enable to output in High-Z t HZW E Byte Enable to end of write December 11, 199 7 Rev. 12/9 7 tBW 5 8 6 8 7 9 5 8 10 ns 4, 7 ns 4, 6, 7 ns Galvantech, Inc. reserves the right to change products or specifications without notice. ADVANCE INFORMATION GVT73128A16 REVOLUTIONARY PINOUT 128K X 16 GALVANTECH,INC. OUTPUT LOADS AC TEST CONDITIONS DQ Input pulse levels 0V to 3.0V Input rise and fall times 1.5ns Input timing reference levels 1.5V Output reference levels 1.5V Output load Z0 = 50 50 30 pF Vt = 1.5V Fig. 1 OUTPUT LOAD EQUIVALENT See Figures 1 and 2 3.3v 317 DQ 351 5 pF Fig. 2 OUTPUT LOAD EQUIVALENT NOTES 8. WE# is HIGH for READ cycle. 1. All voltages referenced to VSS (GND). 9. 2. Overshoot: Undershoot: Device is continuously selected. Chip enable and output enables are held in their active state. VIH +6.0V for t t RC /2. VIL -2.0V for t t RC /2 3. Ic c is given with no output current. Ic c increases with greater output loading and faster cycle times. 4. This parameter is sampled. 5. Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted. 6. 7. 10. Address valid prior to, or coincident with, latest occurring chip enable. 11. tRC = Read Cycle Time. 12. Chip Enable and Write Enable can initiate and terminate a WRITE cycle. 13. Capacitance derating applies to capacitance different from the load capacitance shown in Fig. 1. Output loading is specified with CL =5pF as in Fig. 2. Transition is measured +500mV from steady state voltage. 14. Typical values are measured at 3.3V, 25o C and 20ns cycle time. At any given temperature and voltage condition, t HZCE is less than t LZCE and t HZWE is less than tLZWE. DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only) DESCRIPTION CONDITIONS SYMBOL MIN VDR ICCDR ICCDR 2 Chip Deselect to Data Retention Time tCDR Operation Recovery Time tR Vcc for Retention Dat a Data Retention Current December 11, 199 7 Rev. 12/9 7 CE# >VCC -0.2; all other inputs < VSS +0.2 or >VCC -0.2; all inputs static; f= 0 Vcc = 2V Vcc = 3V 6 TYP MAX UNITS NOTES 2 100 uA 13 3 150 uA 13 0 ns 4 tR C ns 4, 11 V Galvantech, Inc. reserves the right to change products or specifications without notice. ADVANCE INFORMATION GVT73128A16 REVOLUTIONARY PINOUT 128K X 16 GALVANTECH,INC. LOW VCC DATA RETENTION WAVEFOR M DATA RETENTION MODE VCC CE# VDR tCDR tRC V IH VIL READ CYCLE NO. 1(8, 9 ) tRC ADDR VALID tAA tOH Q PREVIOUS DATA VALID DATA VALID READ CYCLE NO. 2(7, 8, 10, 12 ) tRC CE# t AOE t LZOE OE# tHZCE tACE t HZOE tLZCE Q HIGH Z DATA VALID DON'T CARE UNDEFINED December 11, 199 7 Rev. 12/9 7 7 Galvantech, Inc. reserves the right to change products or specifications without notice. ADVANCE INFORMATION GALVANTECH,INC. GVT73128A16 REVOLUTIONARY PINOUT 128K X 16 WRITE CYCLE NO. 1(7, 12, 13) (Write Enable Controlled with Output Enable OE# active LOW)) tWC ADDR tAW tAH tCW CE# tWP2 tAS WE# tDS D tDH DATA VALID tHZWE tLZWE Q HIGH Z WRITE CYCLE NO. 2(12, 13) (Write Enable Controlled with Output Enable OE# inactive HIGH) tWC ADDR tAW tAH tCW CE# tWP1 tAS WE# tDS D Q tDH DATA VALID HIGH Z DON'T CARE UNDEFINED December 11, 199 7 Rev. 12/9 7 8 Galvantech, Inc. reserves the right to change products or specifications without notice. ADVANCE INFORMATION GVT73128A16 REVOLUTIONARY PINOUT 128K X 16 GALVANTECH,INC. WRITE CYCLE NO. 3(12, 13) (Chip Enable Controlled) tWC ADDR tAW tAH tAS tCW CE# tWP1 WE# tDS D tDH DATA VALID Q HIGH Z DON'T CARE WRITE CYCLE NO. 4(12, 13) (Byte Enable Controlled) tWC ADDR tAW tAH tAS tBW BLE# BHE# tCW CE# tWP1 WE# tDS D Q tDH DATA VALID HIGH Z DON'T CARE December 11, 199 7 Rev. 12/9 7 9 Galvantech, Inc. reserves the right to change products or specifications without notice. ADVANCE INFORMATION GVT73128A16 REVOLUTIONARY PINOUT 128K X 16 GALVANTECH,INC. Package Dimensions 44-pin 400 Mil Plastic SOJ (J) 1.129 (28.68) 1.123 (28.52) .405 (10.29) .395 (10.03) PIN #1 INDEX .445 (11.30) .435 (11.05) .148 (3.76) .138 (3.51) .050 (1.27) TYP .030 (0.76) MIN .095 (2.41) .080 (2.03) SEATING PLANE .020 (0.51) .015 (0.38) MAX Note: All dimensions in inches (millimeters) MIN .380 (9.65) .360 (9.14) or typical, min where noted. 44-pin 400 Mil Plastic TSOP (TS) .741 (18.81) .721 (18.31) .402 (10.21) .398 (10.11) PIN #1 INDEX .467 (11.86) .459 (11.66) .0315 (0.80) TYP .007 (0.18) .005 (0.12) SEATING PLANE .018 (0.45) .010 (0.25) Note: All dimensions in inches (millimeters) December 11, 199 7 Rev. 12/9 7 MAX MIN .032 (0.80) .047 (1.20) MAX .008 (0.20) .002 (0.05) .024 (0.60) .016 (0.40) or typical, max where noted. 10 Galvantech, Inc. reserves the right to change products or specifications without notice. ADVANCE INFORMATION GALVANTECH,INC. GVT73128A16 REVOLUTIONARY PINOUT 128K X 16 Ordering Information GVT 73128A16X XX-XX X X Galvantech Prefix Temperature (Blank = Commercial I = Industrial) Power (Blank= Standard, L= Low Power) Part Number Speed ( 10 = 10ns, 12 = 12ns 15 = 15ns, 20 = 20ns) Package (J = 400 mil SOJ, TS = TSOP TYPE II) Revision Differentiator (Blank for Original Revision) December 11, 199 7 Rev. 12/9 7 11 Galvantech, Inc. reserves the right to change products or specifications without notice.