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Documentation

Hall-Effect Current Transducer

CUR 3105

Edition Oct. 12, 2009

SH000155_001EN

Data Sheet

CUR 3105 DATA SHEET

2Oct. 12, 2009; DSH000155_001EN Micronas

The information and data contained in this document

are believed to be accurate and reliable. The software

and proprietary information contained therein may be

protected by copyright, patent, trademark and/or other

intellectual property rights of Micronas. All rights not

expressly granted remain reserved by Micronas.

Micronas assumes no liability for errors and gives no

warranty representation or guarantee regarding the

suitability of its products for any particular purpose due

to these specifications.

By this publication, Micronas does not assume respon-

sibility for patent infringements or other rights of third

parties which may result from its use. Commercial con-

ditions, product availability and delivery are exclusively

subject to the respective order confirmation.

Any information and data which may be provided in the

document can and do vary in different applications,

and actual performance may vary over time.

All operating parameters must be validated for each

customer application by customers’ technical experts.

Any new issue of this document invalidates previous

issues. Micronas reserves the right to review this doc-

ument and to make changes to the document’s content

at any time without obligation to notify any person or

entity of such revision or changes. For further advice

please contact us directly.

Do not use our products in life-supporting systems,

aviation and aerospace applications! Unless explicitly

agreed to otherwise in writing between the parties,

Micronas’ products are not designed, intended or

authorized for use as components in systems intended

for surgical implants into the body, or other applica-

tions intended to support or sustain life, or for any

other application in which the failure of the product

could create a situation where personal injury or death

could occur.

No part of this publication may be reproduced, photo-

copied, stored on a retrieval system or transmitted

without the express written consent of Micronas.

Micronas Patents

Choppered Offset Compensation protected by

Micronas patents no. US5260614A, US5406202A,

EP0525235B1 and EP0548391B1.

Sensor programming with VDD-Modulation protected

by Micronas Patent No. EP 0 953 848.

Third-Party Trademarks

All brand and product names or company names may

be trademarks of their respective companies.

Contents

Page Section Title

Micronas Oct. 12, 2009; DSH000155_001EN 3

DATA SHEET CUR 3105

4 1. Introduction

4 1.1. Features

5 1.2. Marking Code

5 1.3. Operating Junction Temperature Range (TJ)

5 1.4. IC Package Codes

5 1.5. Solderability and Welding

5 1.6. Pin Connections and Short Descriptions

6 2. Functional Description

6 2.1. General Function

8 2.2. Digital Signal Processing and EEPROM

11 2.3. Calibration Procedure

11 2.3.1. General Procedure

13 3. Specifications

13 3.1. Outline Dimensions

17 3.2. Dimensions of Sensitive Area

17 3.3. Positions of Sensitive Areas

17 3.4. Absolute Maximum Ratings

18 3.4.1. Storage and Shelf Life

18 3.5. Recommended Operating Conditions

19 3.6. Characteristics

20 3.6.1. Definition of Sensitivity Error ES

21 3.7. Open-Circuit Detection

22 3.8. Power-On Operation

22 3.9. Overvoltage and Undervoltage Detection

22 3.10. Magnetic Characteristics

23 4. Application Notes

23 4.1. Application Circuit

23 4.2. Use of two CUR3105 in Parallel

23 4.3. Ambient Temperature

24 4.4. EMC and ESD

25 5. Programming of the Current Transducer

25 5.1. Definition of Programming Pulses

25 5.2. Definition of the Telegram

27 5.3. Telegram Codes

28 5.4. Number Formats

28 5.5. Register Information

31 5.5.1. Programming Information

32 6. Data Sheet History

CUR 3105 DATA SHEET

4Oct. 12, 2009; DSH000155_001EN Micronas

Hall-Effect Current Transducer

1. Introduction

The CUR 3105 is a new current transducer based on

the Hall effect. The IC can be used for very precise

current measurements. The measured current is pro-

portional to the analog output voltage driven by the

sensors output. Major characteristics like magnetic

field range, sensitivity, output quiescent voltage (output

voltage at B = 0 mT), and output voltage range are

programmable in a non-volatile memory. The trans-

ducer has a ratiometric output characteristic, which

means that the output voltage is proportional to the

current and the supply voltage. It is possible to pro-

gram different transducers which are in parallel to the

same supply voltage individually.

The CUR 3105 features a temperature-compensated

Hall plate with choppered offset compensation, an

A/D converter, digital signal processing, a D/A con-

verter with output driver, an EEPROM memory with

redundancy and lock function for the calibration data,

an EEPROM for customer serial number, a serial inter-

face for programming the EEPROM, and protection

devices at all pins. The internal digital signal process-

ing is of great benefit because analog offsets, temper-

ature shifts, and mechanical stress do not degrade the

transducers accuracy.

The CUR 3105 is programmable by modulating the

supply voltage. No additional programming pin is

needed. The easy programmability allows a 2-point

calibration by adjusting the output voltage directly to

the input signal (current). Individual adjustment of each

transducer during the customer’s manufacturing pro-

cess is possible. With this calibration procedure, the

tolerances of the IC and the mechanical positioning

can be compensated in the final assembly. This offers

a low-cost alternative for all applications that presently

need mechanical adjustment or laser trimming for cali-

brating the system.

The calculation of the individual IC characteristics and

the programming of the EEPROM memory can easily

be done with a PC and the application kit from Micro-

nas.

The transducer is designed for industrial, white

goods and automotive applications and operates

with typically 5 V supply voltage in the wide junction

temperature range from −40 °C up to 170 °C. The

CUR 3105 is available in the very small leaded pack-

ages TO92UT-1 and TO92UT-2.

1.1. Features

– high-precision current transducer with ratiometric

output and digital signal processing

– low output voltage drifts over temperature

– 12-bit analog output

– multiple programmable magnetic characteristics in a

non-volatile memory (EEPROM) with redundancy

and lock function

– open-circuit (ground and supply line break detec-

tion) with 5 kΩ pull-up and pull-down resistor, over-

voltage and undervoltage detection

– for programming an individual transducer within

several ICs in parallel to the same supply voltage, a

selection can be done via the output pin

– programmable clamping function

– programming through modulation of the supply volt-

age

– operates from −40 °C up to 170 °C junction temper-

ature

– operates from 4.5 V up to 5.5 V supply voltage in

specification and functions up to 8.5 V

– operates with static magnetic fields and dynamic

magnetic fields up to 1 kHz

– overvoltage and reverse-voltage protection at all

pins

– magnetic characteristics extremely robust against

mechanical stress

– short-circuit protected push-pull output

– EMC and ESD optimized design

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 5

1.2. Marking Code

The CUR 3105 has a marking on the package surface

(branded side). This marking includes the name of the

IC and the temperature range.

1.3. Operating Junction Temperature Range (TJ)

The ICs from Micronas are specified to the chip tem-

perature (junction temperature TJ).

A: TJ = −40 °C to +170 °C

K: TJ = −40 °C to +140 °C

I: TJ = −20 °C to +125 °C

C: TJ = 0 °C to +85°C

The relationship between ambient temperature (TA)

and junction temperature is explained in Section 4.3.

on page 23.

1.4. IC Package Codes

Example: CUR3105UT-K

→Type: 3105

→Package: TO92UT

→Temperature Range: TJ = −40 °C to +140 °C

The ICs are available in a wide variety of packaging

versions and quantities. For more detailed information,

please refer to the brochure: “Hall Sensors: Ordering

Codes, Packaging, Handling”.

1.5. Solderability and Welding

Soldering

During soldering reflow processing and manual

reworking, a component body temperature of 260 °C

should not be exceeded.

Welding

Device terminals should be compatible with laser and

resistance welding. Please note that the success of

the welding process is subject to different welding

parameters which will vary according to the welding

technique used. A very close control of the welding

parameters is absolutely necessary in order to reach

satisfying results. Micronas, therefore, does not give

any implied or express warranty as to the ability to

weld the component.

1.6. Pin Connections and Short Descriptions

Fig. 1–1: Pin configuration

Type Temperature Range

A K I C

CUR 3105 3105A 3105K 3105I 3105C

CURXXXXPA-T

Temperature Range: A, K, I and C

Package: UT for TO92UT-1/-2

Type: 3105

No. Pin Name Type Short Description

DD IN Supply Voltage and

Programming Pin

2 GND Ground

3 OUT OUT Push Pull Output

and Selection Pin

VDD

OUT

GND

CUR 3105 DATA SHEET

6Oct. 12, 2009; DSH000155_001EN Micronas

2. Functional Description

2.1. General Function

The CUR3105 is a monolithic integrated circuit which

provides an output voltage proportional to the mag-

netic flux through the Hall plate and proportional to the

supply voltage (ratiometric behavior).

The external magnetic field component perpendicular

to the branded side of the package generates a Hall

voltage proportional to the magnetic field. This voltage

is converted to a digital value, processed in the Digital

Signal Processing Unit (DSP) according to the settings

of the EEPROM registers, converted to an analog volt-

age with ratiometric behavior, and stabilized by a

push-pull output transistor stage. The function and the

parameters for the DSP are explained in Section 2.2.

on page 8.

The setting of the LOCK register disables the program-

ming of the EEPROM memory for all time. This regis-

ter cannot be reset.

As long as the LOCK register is not set, the output

characteristic can be adjusted by programming the

EEPROM registers. The IC is addressed by modulat-

ing the supply voltage (see Fig. 2–1). In the supply

voltage range from 4.5 V up to 5.5 V, the transducer

generates an analog output voltage. After detecting a

command, the transducer reads or writes the memory

and answers with a digital signal on the output pin. The

analog output is switched off during the communica-

tion. Several ICs in parallel to the same supply and

ground line can be programmed individually. The

selection of each IC is done via its output pin.

The open-circuit detection provides a defined output

voltage if the VDD or GND line is broken. Internal tem-

perature compensation circuitry and the choppered off-

set compensation enables operation over the full tem-

perature range with minimal changes in accuracy and

high offset stability. The circuitry also rejects offset

shifts due to mechanical stress from the package. The

non-volatile memory consists of redundant and non-

redundant EEPROM cells. The non-redundant

EEPROM cells are only used to store production infor-

mation inside the IC. In addition, the IC is equipped

with devices for overvoltage and reverse-voltage pro-

tection at all pins.

Fig. 2–1: Programming with VDD modulation

Fig. 2–2: CUR3105 block diagram

OUT

(V)

CUR

3105

VDD GND

OUT analog

VDD

digital

Internally

Temperature

Oscillator

Switched 50 Ω

Digital D/A Analog

GND

Supply EEPROM Memory

Lock Control

Digital

stabilized

Supply and

Protection

Devices

Dependent

Bias

Protection

Devices

Hall Plate Signal

Processing Converter Output

Level

Detection Output

A/D

Converter

Open-circuit,

Overvoltage,

Undervoltage

Detection

50 Ω

Open-circuit

Detection

OUT

VDD

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 7

Fig. 2–3: Details of EEPROM and digital signal processing

Mode Register

Filter Sensitivity

14 bit

VOQ

11 bit

Min-Out

8 bit 9 bit

Lock

1 bit

Micronas

1 bit

Range

2 bit

Max-Out

EEPROM Memory

A/D

Converter

Digital

Filter

Multiplier Adder Limiter D/A

Converter

Digital Signal Processing

Lock

Control

14 bit

Digital Output

Other: 5 bit

CUR 3105 DATA SHEET

8Oct. 12, 2009; DSH000155_001EN Micronas

2.2. Digital Signal Processing and EEPROM

The DSP is the main part of this transducer and per-

forms the signal conditioning. The parameters for the

DSP are stored in the EEPROM registers. The details

are shown in Fig. 2–3.

Terminology:

SENSITIVITY: name of the register or register value

Sensitivity: name of the parameter

The EEPROM registers consist of four groups:

Group 1 contains the registers for the adaption of the

transducer to the magnetic field generated by the cur-

rent to be measured: MODE for selecting the magnetic

field range and filter frequency to select the bandwidth

of the transducer.

Group 2 contains the registers for defining the output

characteristics: SENSITIVITY, VOQ, CLAMP-LOW,

and CLAMP-HIGH. The output characteristic of the

transducer is defined by these 4 parameters.

– The parameter VOQ (Output Quiescent Voltage) cor-

responds to the output voltage at B = 0 mT.

– The parameter Sensitivity defines the magnetic sen-

sitivity:

– The output voltage can be calculated as:

The output voltage range can be clamped by setting

the registers CLAMP-LOW and CLAMP-HIGH in order

to enable failure detection (such as short-circuits to

VDD or GND and open connections).

Group 3 contains the general purpose register GP. The

GP Register can be used to store customer informa-

tion, like a serial number after manufacturing. Micro-

nas will use this GP REGISTER to store informations

like, Lot number, wafer number, x and y position of the

die on the wafer, etc. This information can be readout

by the customer and stored in it’s on data base or it

can stay in the IC as is.

Group 4 contains the Micronas registers and LOCK for

the locking of all registers. The Micronas registers are

programmed and locked during production. These reg-

isters are used for oscillator frequency trimming, A/D

converter offset compensation, and several other spe-

cial settings.

An external magnetic field generates a Hall voltage

on the Hall plate. The ADC converts the amplified

positive or negative Hall voltage to a digital value.

The digital signal is filtered in the internal low-pass fil-

ter and manipulated according to the settings stored

in the EEPROM. The digital value after signal pro-

cessing is readable in the D/A-READOUT register.

Depending on the programmable magnetic range of

the transducer IC, the operating range of the A/D

converter is from −30 mT...+30 mT up to −

100 mT...+100 mT.

During further processing, the digital signal is multi-

plied with the sensitivity factor, added to the quiescent

output voltage and limited according to the clamping

voltage. The result is converted to an analog signal

and stabilized by a push-pull output transistor stage.

The D/A-READOUT at any given magnetic field

depends on the programmed magnetic field range, the

low-pass filter, TC values and CLAMP-LOW and

CLAMP-HIGH. The D/A-READOUT range is min. 0

and max. 16383.

Note: During application design, it should be taken

into consideration that the maximum and mini-

mum D/A-READOUT should not saturate in the

operational range of the specific application.

Range

The RANGE bits are bit 2 and 3 of the MODE register;

they define the magnetic field range of the A/D con-

verter.

Sensitivity VΔOUT

BΔ

-----------------

VOUT Sensitivity∼BV

+×

Magnetic Field Range RANGE

−30mT...30 mT 0

−60 mT...60 mT 1

−80 mT...80 mT 2

−100 mT...100 mT 3

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 9

Filter

The FILTER bit is bit number 4 of the MODE register; it

defines the −3 dB frequency of the digital low pass fil-

ter.

Bit Time

The BITTIME bit is bit number 5 of the MODE register;

It defines the protocol bit time for the communication

between the IC and the programmer board.

Output Format

The OUTPUTMODE bits are the bits number 6 to 7 of

the MODE register; They define the different output

modes.

In Analog Output mode, the transducer provides an

ratiometric 12-bit analog output voltage between 0 V

and 5 V.

In Multiplex Analog Output mode, the IC transmits the

LSN and MSN of the output value separately. This

enables the IC to transmit a 14-bit signal. In external

trigger mode the ECU can switch the output of the IC

between LSN and MSN by changing current flow

direction through IC output. In case the output is pulled

up by a 10 kΩ resistor the IC sends the MSN. If the

output is pulled down the IC will send the LSN. Maxi-

mum refresh rate is about 500 Hz (2 ms). Three pins

are sufficient.

Note: Please contact Micronas for further information

about Multiplex Analog Output Mode.

In Burn-In Mode, the signal path of the transducer DSP

is stimulated internally without applied magnetic field.

In this mode, the transducer provides a “saw tooth”

shape output signal. Shape and frequency of the saw

tooth signal depends on the programming of the trans-

ducer. This mode can be used for Burn-In test in the

customers production line.

Sensitivity

The SENSITIVITY register contains the parameter for

the multiplier in the DSP. The Sensitivity is program-

mable between −4 and 4. For VDD = 5 V, the register

can be changed in steps of 0.00049.

For all calculations, the digital value from the magnetic

field of the D/A converter is used. This digital informa-

tion is readable from the D/A-READOUT register.

VOQ

The VOQ register contains the parameter for the

adder in the DSP. VOQ is the output voltage without

external magnetic field (B = 0 mT) and programmable

from −VDD up to VDD. For VDD = 5 V, the register can

be changed in steps of 4.9 mV.

Note: If VOQ is programmed to a negative voltage, the

maximum output voltage is limited to:

−3 dB Frequency FILTER

500 Hz 0

1kHz 1

Bit Time BITTIME

1:64 (Typ. 1.75 ms) 0

1:128 (Typ. 3.5 ms) 1

Output Format OUTPUTMODE

Analog Output (12 bit) 0

Internal Burn-In Mode 2

Multiplex Analog Output

(external trigger) −

SENSITIVITY VΔout 16383×

2 DA-ReadoutΔVDD

⋅⋅

---------------------------------------------------------

VOUTmax VOQ VDD

CUR 3105 DATA SHEET

10 Oct. 12, 2009; DSH000155_001EN Micronas

Clamping Voltage

The output voltage range can be clamped in order to

detect failures like shorts to VDD or GND or an open

circuit.

The CLAMP-LOW register contains the parameter for

the lower limit. The lower clamping voltage is program-

mable between 0 V and VDD/2. For VDD = 5 V, the reg-

ister can be changed in steps of 9.77 mV.

The CLAMP-HIGH register contains the parameter for

the upper limit. The upper clamping voltage is pro-

grammable between 0 V and VDD. For VDD = 5 V, in

steps of 9.77 mV.

GP Register

This register can be used to store some information,

like production date or customer serial number. Micro-

nas will store production Lot number, wafer number

and x,y coordinates in three blocks of this registers.

The total register contains of four blocks with a length

of 13 bit each. The customer can read out this informa-

tion and store it in his own production data base for ref-

erence or he can change them and store own produc-

tion information.

Note: To enable programming of the GP register bit 0

of the MODE register has to be set to 1. This

LOCKR

By setting the first bit of this 2-bit register, all registers

will be locked, and the IC will no longer respond to any

supply voltage modulation. This bit is active after the

first power-off and power-on sequence after setting the

LOCK bit.

Warning: This register cannot be reset!

D/A-READOUT

This 14-bit register delivers the actual digital value of

the applied magnetic field after the signal processing.

This register can be read out and is the basis for the

calibration procedure of the IC in the system environ-

ment.

Note: The MSB and LSB are reversed compared with

all the other registers. Please reverse this regis-

ter after readout.

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 11

2.3. Calibration Procedure

2.3.1. General Procedure

For calibration in the system environment, the applica-

tion kit from Micronas is recommended. It contains the

hardware for the generation of the serial telegram for

programming (Programmer Board Version 5.1) and the

corresponding software (PC3105) for the input of the

For the individual calibration of each transducer in the

customer application, a two point adjustment is recom-

mended. The calibration shall be done as follows:

Step 1: Input of the registers which need not be

adjusted individually

The magnetic range (depending on the maximum field

strength generated by the current), the filter frequency,

the output mode and the GP Register value are given

for this application. Therefore, the values of the follow-

ing registers should be identical for all transducers of

the customer application.

–FILTER

(according to the maximum signal frequency)

–RANGE

(according to the maximum magnetic field at the IC

position)

–OUTPUTMODE

–GP

(if the customer wants to store own production infor-

mation. It is not necessary to change this register)

As the clamping voltages are given. They have an

influence on the D/A-Readout value and have to be set

therefore after the adjustment process.

Write the appropriate settings into the CUR3105 regis-

ters.

Step 2: Initialize DSP

As the D/A-READOUT register value depends on

the settings of SENSITIVITY, VOQ and CLAMP-

LOW/HIGH, these registers have to be initialized

with defined values, first:

–VOQ

INITIAL = 2.5 V

– SensitivityINITIAL = 0.5

–Clamp-Low = 0V

– Clamp-High = 4.999 V

Step 3: Define Calibration Points

The calibration points 1 and 2 can be set inside the

specified range. The corresponding values for VOUT1

and VOUT2 result from the application requirements.

For highest accuracy of the transducer, calibration

points near the minimum and maximum input signal

are recommended. The difference of the output volt-

age between calibration point 1 and calibration point 2

should be more than 3.5 V.

Step 4: Calculation of VOQ and Sensitivity

Set the system to calibration point 1 and read the reg-

ister D/A-READOUT. The result is the value D/A-

READOUT1.

Now, set the system to calibration point 2, read the

READOUT2.

With these values and the target values VOUT1 and

VOUT2, for the calibration points 1 and 2, respectively,

the values for Sensitivity and VOQ are calculated as:

This calculation has to be done individually for each

IC.

Next, write the calculated values for Sensitivity and

VOQ into the IC for adjusting the transducer. At that

time it is also possible to store the application specific

values for Clamp-Low and Clamp-High into the ICs

EEPROM.

Lowclampingvoltage VOUT1,2 Highclampingvoltage≤≤

Sensitivity 1

---Vout2Vout1–()

D/A-Readout2 D/A-Readout1–()

---------------------------------------------------------------------------------

×16384

---------------

×=

VOQ

------Vout2 16384×

-------------------------------------

D/A-Readout2 8192–()Sensitivity×2×[]

–×

1024

------------

CUR 3105 DATA SHEET

12 Oct. 12, 2009; DSH000155_001EN Micronas

The transducer is now calibrated for the customer

application. However, the programming can be

changed again and again if necessary.

Note: For a recalibration, the calibration procedure

has to be started at the beginning (step 1). A

new initialization is necessary, as the initial val-

ues from step 1 are overwritten in step 4.

Step 5: Locking the Transducer

The last step is activating the LOCK function by pro-

gramming the LOCK bit. Please note that the LOCK

function becomes effective after power-down and

power-up of the Hall IC. The IC is now locked and

does not respond to any programming or reading com-

mands.

Warning: This register can not be reset!

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 13

3. Specifications

3.1. Outline Dimensions

Fig. 3–1:

TO92UT-2: Plastic Transistor Standard UT package, 3 leads, not spread

Weight approximately 0.12 g

CUR 3105 DATA SHEET

14 Oct. 12, 2009; DSH000155_001EN Micronas

Fig. 3–2:

TO92UT-1: Plastic Transistor Standard UT package, 3 leads, spread

Weight approximately 0.12 g

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 15

Fig. 3–3:

TO92UA/UT-2: Dimensions ammopack inline, not spread

CUR 3105 DATA SHEET

16 Oct. 12, 2009; DSH000155_001EN Micronas

Fig. 3–4:

TO92UA/UT: Dimensions ammopack inline, spread

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 17

3.2. Dimensions of Sensitive Area

0.25 mm x 0.25 mm

3.3. Positions of Sensitive Areas

3.4. Absolute Maximum Ratings

Stresses beyond those listed in the “Absolute Maximum Ratings” may cause permanent damage to the device. This

is a stress rating only. Functional operation of the device at these conditions is not implied. Exposure to absolute

maximum rating conditions for extended periods will affect device reliability.

This device contains circuitry to protect the inputs and outputs against damage due to high static voltages or electric

fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than abso-

lute maximum-rated voltages to this circuit.

All voltages listed are referenced to ground (GND).

TO92UT-1/-2

y 1.5 mm nominal

A4 0.3 mm nominal

Bd 0.3 mm

H1 min. 22.0 mm, max. 24.1 mm

Symbol Parameter Pin No. Min. Max. Unit

VDD Supply Voltage 1 −8.5 8.5 V

VDD Supply Voltage 1 −14.41) 2) 14.41) 2) V

−IDD Reverse Supply Current 1 −501) mA

VOUT Output Voltage 3 −55)

−55) 8.53)

14.43) 2) V

VOUT − VDD Excess of Output Voltage

over Supply Voltage

3,1 −2V

IOUT Continuous Output Current 3 −10 10 mA

tSh Output Short Circuit Duration 3 −10 min

TJJunction Temperature Range −40

−40 1704)

150 °C

°C

NPROG Number of Programming Cycles −100

1) as long as TJmax is not exceeded

2) t < 10 min (VDDmin = −15 V for t < 1 min, VDDmax = 16 V for t < 1 min)

3) as long as TJmax is not exceeded, output is not protected to external 14 V-line (or to −14 V)

4) t < 1000h

5) internal protection resistor = 50 Ω

CUR 3105 DATA SHEET

18 Oct. 12, 2009; DSH000155_001EN Micronas

3.4.1. Storage and Shelf Life

The permissible storage time (shelf life) of the sensors is unlimited, provided the sensors are stored at a maximum of

30 °C and a maximum of 85% relative humidity. At these conditions, no Dry Pack is required.

Solderability is guaranteed for one year from the date code on the package.

3.5. Recommended Operating Conditions

Functional operation of the device beyond those indicated in the “Recommended Operating Conditions/Characteris-

tics” is not implied and may result in unpredictable behavior, reduce reliability and lifetime of the device.

All voltages listed are referenced to ground (GND).

Symbol Parameter Pin No. Min. Typ. Max. Unit

VDD Supply Voltage 1 4.5 5 5.5 V

IOUT Continuous Output Current 3 −1.2 −1.2 mA

RLLoad Resistor 3 5.0 10 −kΩ

CLLoad Capacitance 3 0.33 10 1000 nF

RL: Can be pull-up or pull-down resistor

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 19

3.6. Characteristics

at TJ = −40 °C to +170 °C (for temperature type A), VDD = 4.5 V to 5.5 V, GND = 0 V after programming and locking,

at Recommended Operation Conditions if not otherwise specified in the column “Conditions”.

Typical Characteristics for TJ = 25 °C and VDD = 5 V.

For all other temperature ranges this table is also valid, but only in the junction temperature range defined by the

temperature range (Example: For K-Type this table is limited to TJ = −40 °C to +140 °C).

Symbol Parameter Pin No. Min. Typ. Max. Unit Conditions

IDD Supply Current

over Temperature Range 1−710mA

Resolution 3 −12 −bit ratiometric to VDD 1)

DNL Differential Non-Linearity of D/A Converter 3 −2.0 0 2.0 LSB Only at 25 °C ambient temperature

Production test limit

INL Non-Linearity of Output Voltage over

Temperature 3−0.5 0 0.5 % % of supply voltage2)

For Vout = 0.35 V ... 4.65 V;

VDD = 5 V

ERRatiometric Error of Output

over Temperature

(Error in VOUT / VDD)

3−0.5 0 0.5 % ⎥ VOUT1 - VOUT2⎥ > 2V

during calibration procedure

Voffset Offset Drift over Temperature Range

⎥VOUT(B = 0 mT)25°C− VOUT(B = 0 mT)max⎥3 0 0.15 0.25 % VDD VDD = 5 V; 60 mT range,

3 dB frequency = 500 Hz,

−0.6 < sensitivity < 0.6

TK Temperature Coefficient of Sensitivity 3 −0−ppm/k Variation see parameter ES

ES Error in Magnetic Sensitivity over

Temperature Range 3−20 2 % V

DD = 5 V; 60 mT range, 3 db

frequency = 500 Hz

(see Section 3.6.1. on page 20)

ΔVOUTCL Accuracy of Output Voltage at Clamping

Low Voltage over Temperature Range 3−45 0 45 mV RL = 5 kΩ, VDD = 5 V

ΔVOUTCH Accuracy of Output Voltage at Clamping

High Voltage over Temperature Range 3−45 0 45 mV RL = 5 kΩ, VDD = 5 V

VOUTH Upper Limit of Signal Band3) 34.654.8−V V

DD = 5 V, −1 mA ≤ IOUT ≤ 1mA

VOUTL Lower Limit of Signal Band3) 3−0.2 0.35 V VDD = 5 V, −1 mA ≤ IOUT ≤ 1mA

fADC Internal ADC Frequency over Temperature

Range −−128 −kHz

tr(O) Step Response Time of Output 3 −3

4ms

ms 3 dB Filter frequency = 500 Hz

3 dB Filter frequency = 1 kHz

CL = 10 nF, time from 10% to 90%

of final output voltage for a step

signal Bstep from 0 mT to Bmax

td(O) Delay Time of Output 3 −0.1 0.5 ms CL = 10 nF

tPOD Power-Up Time (Time to Reach Stabilized

Output Voltage) −1.5 1.7 1.9 ms CL = 10 nF, 90% of VOUT

BW Small Signal Bandwidth (−3dB) 3 −1−kHz BAC < 10 mT;

3 dB Filter frequency = 1 kHz

VOUTn RMS Noise on Output Voltage 3 −6 15 mV magnetic range = 60 mT4)

3 dB Filter frequency = 500 Hz

Sensitivity ≤ 0.7; C = 4.7 nF (VDD &

VOUT to GND)

ROUT Output Resistance over Recommended

Operating Range 3−110ΩVOUTLmax ≤ VOUT ≤ VOUTHmin

1) Output DAC full scale = 5 V ratiometric, Output DAC offset = 0 V, Output DAC LSB = VDD/4096

2) if more than 50% of the selected magnetic field range is used and the temperature compensation is suitable

3) Signal Band Area with full accuracy is located between VOUTL and VOUTH. The sensor accuracy is reduced below VOUTL and above VOUTH

4)peak-to-peak value exceeded: 5%

CUR 3105 DATA SHEET

20 Oct. 12, 2009; DSH000155_001EN Micronas

3.6.1. Definition of Sensitivity Error ES

ES is the maximum of the absolute value of 1 minus

the quotient of the normalized measured value1) over

the normalized ideal linear2) value:

In the below example, the maximum error occurs at

−10 °C:

TO92UT Packages

Rthja

Rthjc

Rthjs

Thermal Resistance

Junction to Air

Junction to Case

Junction to Solder Point

−

235

128

K/W

Measured with a 1s0p board

Measured with a 1s1p board

Symbol Parameter Pin No. Min. Typ. Max. Unit Conditions

1) normalized to achieve a least-square-fit straight-line

that has a value of 1 at 25 °C

2) normalized to achieve a value of 1 at 25 °C

ES max abs meas

ideal

------------1–

⎝⎠

⎛⎞

⎝⎠

⎛⎞

Tmin, Tmax[]

ES 1,001

0,992

-------------1–0.9%==

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 21

Fig. 3–5: ES definition example

3.7. Open-Circuit Detection

at TJ = −40 °C to +170 °C (A-Type), Typical Characteristics for TJ = 25 °C, after locking the sensor.

For all other temperature ranges this table is also valid, but only in the junction temperature range defined by the

temperature range (Example: For K-Type this table is limited to TJ = −40 °C to +140 °C).

50 75 100 125 150 175

−25

−50

0.98

0.99

1.00

1.01

1.02

1.03

-10

0.992

1.001

temperature [°C]

relative sensitivity related to 25 °C value

ideal 200 ppm/k

least-square-fit straight-line of

normalized measured data

measurement example of real

sensor, normalized to achieve a

value of 1 of its least-square-fit

straight-line at 25 °C

Symbol Parameter Pin No. Min. Typ. Max. Unit Comment

VOUT Output Voltage at

Open VDD Line

3000.15VV

DD = 5 V

RL = 10 kΩ to 200 kΩ

000.2VV

DD = 5 V

RL = 5 kΩ to 10 kΩ

VOUT Output Voltage at

Open GND Line

3 4.85 4.9 5.0 V VDD = 5 V

10 kΩ ≥RL ≤ 200 kΩ

4.8 4.9 5.0 V VDD = 5 V

5kΩ ≥ RL < 10 kΩ

RL: Can be pull-up or pull-down resistor

CUR 3105 DATA SHEET

22 Oct. 12, 2009; DSH000155_001EN Micronas

3.8. Power-On Operation

at TJ = −40 °C to +170 °C (A-Type), after programming and locking. Typical Characteristics for TJ = 25 °C

For all other temperature ranges this table is also valid, but only in the junction temperature range defined by the

temperature range (Example: For K-Type this table is limited to TJ = −40 °C to +140 °C).

3.9. Overvoltage and Undervoltage Detection

at TJ = −40 °C to +170 °C (A-Type), Typical Characteristics for TJ = 25 °C, after programming and locking

For all other temperature ranges this table is also valid, but only in the junction temperature range defined by the

temperature range (Example: For K-Type this table is limited to TJ = −40 °C to +140 °C).

Note: The over- and undervoltage detection is activated only after locking the sensor!

3.10. Magnetic Characteristics

at TJ = −40 °C to +170 °C (A-Type), VDD = 4.5 V to 5.5 V, GND = 0 V after programming and locking,

at Recommended Operation Conditions if not otherwise specified in the column “Conditions”.

Typical Characteristics for TJ = 25 °C and VDD = 5 V.

For all other temperature ranges this table is also valid, but only in the junction temperature range defined by the

temperature range (Example: For K-Type this table is limited to TJ = −40 °C to +140 °C).

Symbol Parameter Min. Typ. Max. Unit

PORUP Power-On Reset Voltage (UP) −3.4 −V

PORDOWN Power-On Reset Voltage (DOWN) −3.0 −V

Symbol Parameter Pin No. Min. Typ. Max. Unit Test Conditions

VDD,UV Undervoltage Detection Level 1 −4.2 4.3 V 1)

VDD,OV Overvoltage Detection Level 1 8.5 8.9 10.0 V 1)

1) If the supply voltage drops below VDD,UV or rises above VDD,OV, the output voltage is switched to VDD (≥97% of VDD at RL = 10 kΩ to GND).

The CLAMP-LOW register has to be set to a voltage ≥ 200 mV.

Symbol Parameter Pin No. Min. Typ. Max. Unit Test Conditions

BOffset Magnetic Offset 3−0.5 0 0.5 mT B = 0 mT, IOUT = 0 mA, TJ = 25 °C,

unadjusted sensor

ΔBOffset/ΔT Magnetic Offset Change

due to TJ

−10 0 10 μT/K B = 0 mT, IOUT = 0 mA

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 23

4. Application Notes

4.1. Application Circuit

For EMC protection, it is recommended to connect one

ceramic 100 nF capacitor each between ground and

the supply voltage, respectively the output voltage pin.

In addition, the input of the controller unit should be

pulled-down with a 10 kΩ resistor and a ceramic

4.7 nF capacitor.

Please note that during programming, the sensor will

be supplied repeatedly with the programming voltage

of 12.5 V for 100 ms. All components connected to the

VDD line at this time must be able to resist this voltage.

Fig. 4–1: Recommended application circuit

4.2. Use of two CUR3105 in Parallel

Two different CUR3105 current transducers which are

operated in parallel to the same supply and ground line

can be programmed individually. In order to select the

IC which should be programmed, both ICs are inacti-

vated by the “Deactivate” command on the common

supply line. Then, the appropriate IC is activated by an

“Activate” pulse on its output. Only the activated sen-

sor will react to all following read, write, and program

commands. If the second IC has to be programmed,

the “Deactivate” command is sent again, and the sec-

ond IC can be selected.

Note: The multi-programming of two transducers

works only if the outputs of the two IC’s are

pulled to GND with a 10 kΩ pull-down resistor.

Fig. 4–2: Parallel operation of two CUR3105

4.3. Ambient Temperature

Due to the internal power dissipation, the temperature

on the silicon chip (junction temperature TJ) is higher

than the temperature outside the package (ambient

temperature TA).

At static conditions and continuous operation, the fol-

lowing equation applies:

For typical values, use the typical parameters. For

worst case calculation, use the max. parameters for

IDD and Rth, and the max. value for VDD from the appli-

cation.

For VDD = 5.5 V, Rth = 235 K/W, and IDD = 10 mA, the

temperature difference ΔT = 12.93 K.

For all sensors, the junction temperature TJ is speci-

fied. The maximum ambient temperature TAmax can be

calculated as:

OUT

VDD

GND

100 nF CUR3105

10 kΩ

μC

100 nF 4.7 nF

CUR3105

GND

10 nF

CUR3105

4.7 nF 4.7 nF

Sensor A Sensor B

VDD

OUT B & Select B

OUT A & Select A

TJTATΔ+=

TΔIDD VDD

×RthJ

×=

TAmax TJmax TΔ–=

CUR 3105 DATA SHEET

24 Oct. 12, 2009; DSH000155_001EN Micronas

4.4. EMC and ESD

The CUR3105 is designed for a stabilized 5 V supply.

Interferences and disturbances conducted along the

12 V on board system (product standard ISO 7637

part 1) are not relevant for these applications.

For applications with disturbances by capacitive or

inductive coupling on the supply line or radiated distur-

bances, the application circuit shown in Fig. 4–1 is rec-

ommended. Applications with this arrangement should

pass the EMC tests according to the product stan-

dards ISO 7637 part 3 (Electrical transient transmis-

sion by capacitive or inductive coupling).

Please contact Micronas for the detailed investigation

reports with the EMC and ESD results.

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 25

5. Programming of the Current Transducer

5.1. Definition of Programming Pulses

The transducer is addressed by modulating a serial

telegram on the supply voltage. The transducer

answers with a serial telegram on the output pin.

The bits in the serial telegram have a different bit time

for the VDD-line and the output. The bit time for the

VDD-line is defined through the length of the Sync Bit

at the beginning of each telegram. The bit time for the

output is defined through the Acknowledge Bit.

A logical “0” is coded as no voltage change within the

bit time. A logical “1” is coded as a voltage change

between 50% and 80% of the bit time. After each bit, a

voltage change occurs.

5.2. Definition of the Telegram

Each telegram starts with the Sync Bit (logical 0),

3 bits for the Command (COM), the Command

Parity Bit (CP), 4 bits for the Address (ADR), and

the Address Parity Bit (AP).

There are 4 kinds of telegrams:

– Write a register (see Fig. 5–2)

After the AP Bit, follow 14 Data Bits (DAT) and the

Data Parity Bit (DP). If the telegram is valid and the

command has been processed, the transducer

answers with an Acknowledge Bit (logical 0) on the

output.

– Read a register (see Fig. 5–3)

After evaluating this command, the transducer

answers with the Acknowledge Bit, 14 Data Bits,

and the Data Parity Bit on the output.

– Programming the EEPROM cells (see Fig. 5–4)

After evaluating this command, the transducer

answers with the Acknowledge Bit. After the delay

time tw, the supply voltage rises up to the program-

ming voltage.

– Activate a transducer (see Fig. 5–5)

If more than one transducer is connected to the sup-

ply line, selection can be done by first deactivating

all transducers. The output of all transducers will be

pulled to ground by the internal 10 kΩ resistors.

With an Activate pulse on the appropriate output

pin, an individual transducer can be selected. All fol-

lowing commands will only be accepted from the

activated transducer.

Fig. 5–1: Definition of logical 0 and 1 bit

trtf

tp0 tp0

logical 0

VDDH

VDDL

tp0

logical 1

VDDH

VDDL

or tp0

tp1

Table 5–1: Telegram parameters

Symbol Parameter Pin Min. Typ. Max. Unit Remarks

VDDL Supply Voltage for Low Level

during Programming 155.66V

VDDH Supply Voltage for High Level

during Programming 1 6.8 8.0 8.5 V

trRise Time 1 −−0.05 ms

tfFall Time 1 −−0.05 ms

tp0 Bit Time on VDD 1 1.7 1.75 1.8 ms tp0 is defined through the Sync Bit

tpOUT Bit Time on Output Pin 3 2 3 4 ms tpOUT is defined through the

Acknowledge Bit

tp1 Voltage Change for Logical 1 1, 3 50 65 80 % % of tp0 or tpOUT

VDDPROG Supply Voltage for

Programming the EEPROM 1 12.4 12.5 12.6 V

tPROG Programming Time for EEPROM 1 95 100 105 ms

CUR 3105 DATA SHEET

26 Oct. 12, 2009; DSH000155_001EN Micronas

Fig. 5–2: Telegram for coding a Write command

Fig. 5–3: Telegram for coding a Read command

Fig. 5–4: Telegram for coding the EEPROM programming

trp Rise Time of Programming Voltage 1 0.2 0.5 1 ms

tfp Fall Time of Programming Voltage 1 0 −1ms

twDelay Time of Programming Voltage

after Acknowledge 10.50.71ms

Vact Voltage for an Activate Pulse 3 3 4 5 V

tact Duration of an Activate Pulse 3 0.05 0.1 0.2 ms

Vout,deact Output Voltage after Deactivate

Command 300.10.2V

Table 5–1: Telegram parameters, continued

Symbol Parameter Pin Min. Typ. Max. Unit Remarks

Sync COM CP ADR AP DAT DP

Acknowledge

VDD

VOUT

WRITE

Sync COM CP ADR AP

DAT DPAcknowledge

VDD

VOUT

READ

Sync COM CP ADR AP

tPROG

Acknowledge

VDD

VOUT

ERASE and PROM

trp tfp

VDDPROG

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 27

Fig. 5–5: Activate pulse

5.3. Telegram Codes

Sync Bit

Each telegram starts with the Sync Bit. This logical “0”

pulse defines the exact timing for tp0.

Command Bits (COM)

The Command code contains 3 bits and is a binary

number. Table 5–2 shows the available commands

and the corresponding codes for the CUR3105.

Command Parity Bit (CP)

This parity bit is “1” if the number of zeros within the 3

Command Bits is uneven. The parity bit is “0”, if the

number of zeros is even.

Address Bits (ADR)

The Address code contains 4 bits and is a binary num-

ber. Table 5–3 shows the available addresses for the

CUR3105 registers.

Address Parity Bit (AP)

This parity bit is “1” if the number of zeros within the

4 Address bits is uneven. The parity bit is “0” if the

number of zeros is even.

Data Bits (DAT)

The 14 Data Bits contain the register information.

The registers use different number formats for the

Data Bits. These formats are explained in Section 5.4.

In the Write command, the last bits are valid. If, for

example, the TC register (10 bits) is written, only the

last 10 bits are valid.

In the Read command, the first bits are valid. If, for

example, the TC register (10 bits) is read, only the first

10 bits are valid.

Data Parity Bit (DP)

This parity bit is “1” if the number of zeros within the

binary number is even. The parity bit is “0” if the num-

ber of zeros is uneven.

Acknowledge

After each telegram, the output answers with the

Acknowledge signal. This logical “0” pulse defines the

exact timing for tpOUT.

tACT

VOUT

trtf

VACT

Table 5–2: Available commands

Command Code Explanation

READ 2 read a register

WRITE 3 write a register

PROM 4 program all nonvolatile registers (except the lock bits)

ERASE 5 erase all nonvolatile registers (except the lock bits)

CUR 3105 DATA SHEET

28 Oct. 12, 2009; DSH000155_001EN Micronas

5.4. Number Formats

Binary number:

The most significant bit is given as first, the least sig-

nificant bit as last digit.

Example: 101001 represents 41 decimal.

Signed binary number:

The first digit represents the sign of the following

binary number (1 for negative, 0 for positive sign).

Example: 0101001 represents +41 decimal

1101001 represents −41 decimal

Two’s complementary number:

The first digit of positive numbers is “0”, the rest of the

number is a binary number. Negative numbers start

with “1”. In order to calculate the absolute value of the

number, calculate the complement of the remaining

digits and add “1”.

Example: 0101001 represents +41 decimal

1010111 represents −41 decimal

5.5. Register Information

CLAMP-LOW

– The register range is from 0 up to 255.

– The register value is calculated by:

CLAMP-HIGH

– The register range is from 0 up to 511.

– The register value is calculated by:

VOQ

– The register range is from −1024 up to 1023.

– The register value is calculated by:

SENSITIVITY

– The register range is from −8192 up to 8191.

– The register value is calculated by:

MODE

– The register range is from 0 up to 255 and contains

the settings for FILTER and RANGE:

D/A-READOUT

– This register is read only.

– The register range is from 0 up to 16383.

DEACTIVATE

– This register can only be written.

– The register has to be written with 2063 decimal

(80F hexadecimal) for the deactivation.

– The transducer can be reset with an Activate pulse

on the output pin or by switching off and on the sup-

ply voltage.

CLAMP-LOW LowClampingVoltage 2×

VDD

---------------------------------------------------------------255×=

CLAMP-HIGH HighClampingVoltage

VDD

------------------------------------------------------ 511×=

VOQ VOQ

VDD

-----------1024×=

SENSITIVITY Sensitivity 2048×=

MODE OUTPUTMODE 32 BITRATE 16

FILTER 8RANGE 2EnableProgGPRegisters+×+×+×+×=

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 29

Table 5–3: Available register addresses

Bits Format Customer Remark

CLAMP-LOW 1 8 binary read/write/program Low clamping voltage

CLAMP-HIGH 2 9 binary read/write/program High clamping voltage

VOQ 3 11 two compl.

binary

read/write/program

SENSITIVITY 4 14 signed binary read/write/program Range, filter, output mode,

interface bit time settings

MODE 5 8 binary read/write/program Range and filter settings

LOCKR 6 2 binary read/write/program Lock Bit

GP REGISTERS 1..3 8 13 binary read/write/program It is only possible to program

this register if the mode reg-

ister bit zero is set to 1.

D/A-READOUT 9 14 binary read Bit sequence is reversed

during read sequence.

GP REGISTER 0 12 13 binary read/write/program It is only possible to program

this register if the mode reg-

ister bit zero is set to 1.

DEACTIVATE 15 12 binary write Deactivate the transducer

CUR 3105 DATA SHEET

30 Oct. 12, 2009; DSH000155_001EN Micronas

Table 5–4: Data formats

Char DAT3 DAT2 DAT1 DAT0

Bit 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

CLAMP

LOW

Write

Read −

−−

V−

−V

−

CLAMP

HIGH

Write

Read −

−−

V−

−V

−

VOQ Write

Read −

−−

V−

−V

−

SENSITIV-

ITY

Write

Read −

−−

−V

MODE Write

Read −

−−

V−

−V

−

LOCKR Write

Read −

−−

V−

−−

−V

−

GP 1..3

Registers

Write

Read −

−−

−

D/A-

READOUT

Read −−V VVVVVVVVVVVVV

GP 0

Write

Read −

−−

−

DEACTI-

VATE Write −−−−100000001111

V: valid, −: ignore, bit order: MSB first

DATA SHEET CUR 3105

Micronas Oct. 12, 2009; DSH000155_001EN 31

5.5.1. Programming Information

If the content of any register (except the lock registers)

is to be changed, the desired value must first be writ-

ten into the corresponding RAM register. Before read-

ing out the RAM register again, the register value must

be permanently stored in the EEPROM.

Permanently storing a value in the EEPROM is done

by first sending an ERASE command followed by

sending a PROM command. The address within the

ERASE and PROM commands must be zero.

ERASE and PROM act on all registers in parallel.

Note: To store data in the GP register it is necessary

to set bit number 0 of the MODE register to one,

before sending an ERASE and PROM com-

mand. Otherwise the data stored in the GP reg-

ister will not be changed.

If all registers of CUR3105 are to be changed, all writ-

ing commands can be sent one after the other, fol-

lowed by sending one ERASE and PROM command

at the end.

During all communication sequences, the customer

has to check if the communication with the transducer

was successful. This means that the acknowledge and

the parity bits sent by the transducer have to be

checked by the customer. If the Micronas programmer

board is used, the customer has to check the error

flags sent from the programmer board.

Note: For production and qualification tests, it is man-

datory to set the LOCK bit after final adjustment

and programming of CUR3105. The LOCK

function is active after the next power-up of the

transducer. The success of the Lock Process

should be checked by reading at least one

transducer register after locking and/or by an

analog check of the transducers output signal.

Electrostatic Discharges (ESD) may disturb the

programming pulses. Please take precautions

against ESD.

CUR 3105 DATA SHEET

32 Oct. 12, 2009; DSH000155_001EN Micronas

Micronas GmbH

Hans-Bunte-Strasse 19 ⋅ D-79108 Freiburg ⋅ P.O. Box 840 ⋅ D-79008 Freiburg, Germany

Tel. +49-761-517-0 ⋅ Fax +49-761-517-2174 ⋅ E-mail: docservice@micronas.com ⋅ Internet: www.micronas.com

6. Data Sheet History

1. Data Sheet: “CUR 3105 Hall-Effect Current Trans-

ducer”, Oct. 12, 2009, DSH000155_001EN. First

release of the data sheet.