HEXFET® Power MOSFET
07/23/10
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 18
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 13 A
IDM Pulsed Drain Current 72
PD @TC = 25°C Power Dissipation 150 W
Linear Derating Factor 1.0 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy247 mJ
IAR Avalanche Current18 A
EAR Repetitive Avalanche Energy15 mJ
dv/dt Peak Diode Recovery dv/dt 8.1 V/ns
TJOperating Junction and -55 to +175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Mounting torque, 6-32 or M3 srew10 lbf•in (1.1N•m)
Absolute Maximum Ratings
Description
VDSS = 200V
RDS(on) = 0.15Ω
ID = 18A
S
D
G
lAdvanced Process Technology
lDynamic dv/dt Rating
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
lEase of Paralleling
lSimple Drive Requirements
D2Pak
IRF640NSPbF
TO-220AB
IRF640NPbF
TO-262
IRF640NLPbF
IRF640NPbF
IRF640NSPbF
IRF640NLPbF
Fifth Generation HEXFET® Power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast switching
speed and ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer with an
extremely efficient and reliable device for use in a wide
variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation levels
to approximately 50 watts. The low thermal resistance and
low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of its
low internal connection resistance and can dissipate up to
2.0W in a typical surface mount application.
The through-hole version (IRF640NL) is available for low-
profile application.
www.irf.com 1
lLead-Free
PD - 95046A
www.irf.com 2
IRF640N/S/LPbF
S
D
G
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode)––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 11A, VGS = 0V
trr Reverse Recovery Time ––– 167 251 ns TJ = 25°C, IF = 11A
Qrr Reverse Recovery Charge ––– 929 1394 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
18
72
A
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 200 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.25 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.15 ΩVGS = 10V, ID = 11A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 6.8 ––– ––– S VDS = 50V, ID = 11A
––– ––– 25 µA VDS = 200V, VGS = 0V
––– ––– 250 VDS = 160V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 nA VGS = -20V
QgTotal Gate Charge ––– ––– 67 ID = 11A
Qgs Gate-to-Source Charge ––– ––– 11 nC VDS = 160V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 33 VGS = 10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 10 ––– VDD = 100V
trRise Time ––– 19 ––– ID = 11A
td(off) Turn-Off Delay Time ––– 23 ––– RG = 2.5Ω
tfFall Time ––– 5.5 ––– RD = 9.0Ω, See Fig. 10
Between lead,
––– ––– 6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 1160 ––– VGS = 0V
Coss Output Capacitance ––– 185 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 53 ––– pF ƒ = 1.0MHz, See Fig. 5
nH
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LDInternal Drain Inductance
LSInternal Source Inductance ––– –––
S
D
G
IGSS
ns
4.5
7.5
IDSS Drain-to-Source Leakage Current
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.0
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient––– 62
RθJA Junction-to-Ambient (PCB mount)––– 40
IRF640N/S/LPbF
www.irf.com 3
0.01
0.1
1
10
100
0.1 1 10 100
20µs PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
0.1
1
10
100
0.1 1 10 100
20µs PULSE WIDTH
T = 175 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1
1
10
100
4.0 5.0 6.0 7.0 8.0 9.0 10.0
V = 50V
20µs PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 175 C
J°
-60 -40 -20 020 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
18A
Fig 4. Normalized On-Resistance
Vs. Temperature
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IRF640N/S/LPbF
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
0.1
1
10
100
1000
0.1 1 10 100 1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Single Pulse
T
T
= 175 C
= 25 C
°
°
J
C
V , Drain-to-Source Voltage (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
110 100 1000
VDS
, Drain-to-Source Voltage (V)
0
500
1000
1500
2000
2500
C, Capacitance(pF)
Coss
Crss
Ciss
VGS
= 0V, f = 1 MHZ
Ciss = C
gs + C
gd, Cds SHORTED
Crss = C
gd
Coss
= C
ds + C
gd
020 40 60 80
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
I =
D11A
V = 40V
DS
V = 100V
DS
V = 160V
DS
0.1
1
10
100
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 175 C
J°
IRF640N/S/LPbF
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RD
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
VGS
RG
D.U.T.
10V
+
-
25 50 75 100 125 150 175
0
4
8
12
16
20
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
VGS
RG
D.U.T.
10V
VDD
25 50 75 100 125 150 175
0
4
8
12
16
20
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response(Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
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IRF640N/S/LPbF
QG
QGS QGD
VG
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
25 50 75 100 125 150 175
0
100
200
300
400
500
600
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
4.4A
7.6A
11A
IRF640N/S/LPbF
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P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFET® Power MOSFETs
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RG
VDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
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IRF640N/S/LPbF
TO-220AB package is not recommended for Surface Mount Application
TO-220AB Part Marking Information
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
INTERNATIONAL PART NUMBER
RECTIFIER
LOT CODE
ASSEMBLY
LOGO
YEAR 0 = 2000
DAT E CODE
WEEK 19
LINE C
LOT CODE 1789
EXAMPLE: T HIS IS AN IRF1010
Note: "P" in assembly line position
indi cates "L ead - F ree"
IN THE ASSEMBLY LINE "C"
ASS E MBLED ON WW 19, 2000
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRF640N/S/LPbF
www.irf.com 9
D2Pak (TO-263AB) Part Marking Information
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
DAT E CODE
YEAR 0 = 2000
WE E K 02
A = ASSEMBLY SITE CODE
RECTIFIER
INTERNATIONAL PART NUMBER
P = DES IGNAT E S LEAD - FREE
PRODUCT (OPTIONAL)
F 530S
IN THE ASSEMBLY LINE "L"
ASS EMBL ED ON WW 02, 2000
T HIS IS AN IRF 530S WIT H
LOT CODE 8024 INTERNATIONAL
LOGO
RECTIFIER
LOT CODE
AS S E MB L Y YEAR 0 = 2000
PART NUMBER
DATE CODE
LINE L
WE E K 02
OR
F 530S
LOGO
AS S E MB L Y
LOT CODE
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com 10
IRF640N/S/LPbF
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
ASSEMBLY
LOT CODE
RE CT IF IER
INT ER NAT IONAL
AS S E MB L E D ON WW 19 , 199 7
Note: "P" in as s embly line
pos ition indicates "L ead-F r ee"
IN THE ASSEMBLY LINE "C" LOGO
THIS IS AN IRL3103L
LOT CODE 1789
EXAMPLE:
LINE C
DATE CODE
WE E K 19
YEAR 7 = 1997
PART NUMBER
PART NUMBER
LOGO
LOT CODE
ASSEMBLY
INT ER NAT IONAL
RE CT IF IER
PRODUCT (OPTIONAL)
P = DESIGNAT ES L EAD-FREE
A = AS S EMB L Y S IT E CODE
WE E K 19
YEAR 7 = 1997
DATE CODE
OR
IRF640N/S/LPbF
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ISD ≤ 11A, di/dt ≤ 344A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Repetitive rating; pulse width limited by
max. junction temperature.
Notes:
Starting TJ = 25°C, L = 4.2mH
RG = 25Ω, IAS = 11A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
This is only applied to TO-220AB package
This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.07/2010
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CON TRO LLING DIMEN SION: MILL IMET ER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
D2Pak Tape & Reel Infomation
Dimensions are shown in millimeters (inches)
