1
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
±15kV ESD Protected, +3V to +5.5V, 1µA, 250kbps,
RS-232 Transmitters/Receivers
ICL3221E, ICL3222E, ICL3223E,
ICL3232E, ICL3241E, ICL3243E
The Intersil ICL32xxE devices are 3.0V to 5.5V powered
RS-232 transmitters/receivers which meet ElA/TIA-232
and V.28/V.24 specifications, even at VCC = 3.0V.
Additionally, they provide ±15kV ESD protection
(IEC61000-4-2 Air Gap and Human Body Model) on
transmitter outputs and receiver inputs (RS-232 pins).
Targeted applications are PDAs, Palmtops, and notebook
and laptop computers where the low operational, and
even lower standby, power consumption is critical.
Efficient on-chip charge pumps, coupled with manual and
automatic power-down functions (except for the
ICL3232E), reduce the standby supply current to a 1µA
trickle. Small footprint packaging, and the use of small,
low value capacitors ensure board space savings as well.
Data rates greater than 250kbps are guaranteed at worst
case load conditions. This family is fully compatible with
3.3V-only systems, mixed 3.3V and 5.0V systems, and
5.0V-only systems.
The ICL324XE are 3-driver, 5-receiver devices that
provide a complete serial port suitable for laptop or
notebook computers. Both devices also include
noninverting always-active receivers for “wake-up”
capability.
The ICL3221E, ICL3223E and ICL3243E, feature an
automatic power-down function which powers down
the on-chip power-supply and driver circuits. This occurs
when an attached peripheral device is shut off or the
RS-232 cable is removed, conserving system power
automatically without changes to the hardware or
operating system. These devices power up again when a
valid RS-232 voltage is applied to any receiver input.
Table 1 summarizes the features of the devices
represented by this data sheet, while Application Note
AN9863 summarizes the features of each device
comprising the ICL32xxE 3V family.
Features
ESD Protection for RS-232 I/O Pins to ±15kV
(IEC61000)
Drop in Replacements for MAX3221E, MAX3222E,
MAX3223E, MAX3232E, MAX3241E, MAX3243E,
SP3243E
ICL3221E is a Low Power, Pin Compatible Upgrade
for 5V MAX221E
ICL3222E is a Low Power, Pin Compatible Upgrade
for 5V MAX242E, and SP312E
ICL3232E is a Low Power Upgrade for HIN232E,
ICL232 and Pin Compatible Competitor Devices
RS-232 Compatible with VCC = 2.7V
Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
•Latch-Up Free
On-Chip Voltage Converters Require Only Four
External 0.1µF Capacitors
Manual and Automatic Power-Down Features
Guaranteed Mouse Driveability (ICL324xE Only)
Receiver Hysteresis For Improved Noise Immunity
Guaranteed Minimum Data Rate. . . . . . . . 250kbps
Wide Power Supply Range . . . . Single +3V to +5.5V
Low Supply Current in Power-Down State . . . . . 1µA
Pb-Free Available (RoHS Compliant)
Applications
Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable
Equipment
- Laptop Computers, Notebooks, Palmtops
- Modems, Printers and other Peripherals
-Digital Cameras
- Cellular/Mobile Phones
Related Literature
Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2000-2005, 2007-2008, 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
February 22, 2010
FN4910.21
2FN4910.21
February 22, 2010
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER NUMBER
OF Tx NUMBER
OF Rx
NUMBER OF
MONITOR
RECEIVERS
(ROUTB)
DATA
RATE
(kbps)
RECEIVER
ENABLE
FUNCTION? READY
OUTPUT? MANUAL
POWER-DOWN?
AUTOMATIC
POWER-
DOWN
FUNCTION?
ICL3221E 1 1 0 250 Yes No Yes Yes
ICL3222E 2 2 0 250 Yes No Yes No
ICL3223E 2 2 0 250 Yes No Yes Yes
ICL3232E 2 2 0 250 No No No No
ICL3241E 3 5 2 250 Yes No Yes No
ICL3243E 3 5 1 250 No No Yes Yes
Typical Operating Circuits ICL3221E
15
VCC
T1OUT
T1IN
T1
0.1µF
+0.1µF
+
0.1µF
11 13
2
4
3
7
V+
V-
C1+
C1-
C2+
C2-
+
0.1µF
5
6
R1OUT R1IN
R1
89
5k
C1
C2
+C3
C4
EN
1
GND
+3.3V +0.1µF
14
TTL/CMOS
LOGIC LEVELS
RS-232
LEVELS
FORCEON
FORCEOFF
12
16 VCC
10
INVALID TO POWER
CONTROL LOGIC
+
C3 (OPTIONAL CONNECTION, NOTE)
NOTE: THE NEGATIVE TERMINAL OF C3 CAN BE CONNECTED TO EITHER VCC OR GND
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
3FN4910.21
February 22, 2010
ICL3222E
ICL3223E
Typical Operating Circuits (Continued)
17
VCC
T1OUT
T2OUT
T1IN
T2IN
T1
T2
0.1µF
+0.1µF
+
0.1µF
12
11
15
8
2
4
3
7
V+
V-
C1+
C1-
C2+
C2-
+
0.1µF
5
6
R1OUT R1IN
14
5k
R2OUT R2IN
9
10
5k
13
C1
C2
+C3
C4
EN
SHDN
1
GND
18
+3.3V +0.1µF
16
VCC
TTL/CMOS
LOGIC LEVELS
RS-232
LEVELS
R1
R2
+
C3 (OPTIONAL CONNECTION, NOTE)
NOTE: THE NEGATIVE TERMINAL OF C3 CAN BE CONNECTED TO EITHER VCC OR GND
19
VCC
T1OUT
T2OUT
T1IN
T2IN
T1
T2
0.1µF
+0.1µF
+
0.1µF
13
12
17
8
2
4
3
7
V+
V-
C1+
C1-
C2+
C2-
+
0.1µF
5
6
R1OUT R1IN
16
5k
R2OUT R2IN
910
5k
15
C1
C2
+C3
C4
EN
1
GND
+3.3V +0.1µF
18
TTL/CMOS
LOGIC LEVELS
RS-232
LEVELS
R1
R2
FORCEON
FORCEOFF
14
20 VCC
11
INVALID TO POWER
CONTROL LOGIC
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
4FN4910.21
February 22, 2010
ICL3232E
Typical Operating Circuits (Continued)
16
VCC
T1OUT
T2OUT
T1IN
T2IN
T1
T2
0.1µF
+
0.1µF
+
0.1µF
11
10
14
7
1
3
2
6
V+
V-
C1+
C1-
C2+
C2-
+
0.1µF
4
5
R1OUT R1IN
13
5k
R2OUT R2IN
8
9
5k
12
C1
C2
+C3
C4
GND
+3.3V +0.1µF
15
TTL/CMOS
LOGIC LEVELS
RS-232
LEVELS
R1
R2
+
C3 (OPTIONAL CONNECTION, NOTE)
NOTE: THE NEGATIVE TERMINAL OF C3 CAN
BE CONNECTED TO EITHER VCC OR GND
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
5FN4910.21
February 22, 2010
ICL3241E ICL3243E
Typical Operating Circuits (Continued)
26
VCC
T1OUT
T2OUT
T3OUT
T1IN
T2IN
T3IN
T1
T2
T3
0.1µF
+0.1µF
+
0.1µF
14
13
9
10
12 11
28
24
27
3
V+
V-
C1+
C1-
C2+
C2-
+
0.1µF
1
2
R1OUT R1IN
4
5k
R2OUT R2IN
518
5k
R3OUT R3IN
617
5k
R4OUT R4IN
716
5k
R5OUT R5IN
R5
815
5k
19
R2OUTB
C1
C2
+C3
C4
EN
SHDN
23
GND
22
+3.3V +0.1µF
20
25
VCC
TTL/CMOS
LOGIC
RS-232
LEVELS
RS-232
LEVELS
R1OUTB
21
R1
R2
R3
R4
LEVELS
26
VCC
T1OUT
T2OUT
T3OUT
T1IN
T2IN
T3IN
T1
T2
T3
0.1µF
+0.1µF
+
0.1µF
14
13
9
10
12 11
28
24
27
3
V+
V-
C1+
C1-
C2+
C2-
+
0.1µF
1
2
R1OUT R1IN
4
5k
R2OUT R2IN
518
5k
R3OUT R3IN
617
5k
R4OUT R4IN
716
5k
R5OUT R5IN
R5
815
5k
19
R2OUTB
C1
C2
+C3
C4
FORCEON
FORCEOFF
23
GND
22
+3.3V +0.1µF
20
25
VCC
TTL/CMOS
LOGIC
RS-232
LEVELS
RS-232
LEVELS
R1
R2
R3
R4
21
INVALID
TO POWER
CONTROL
LEVELS
LOGIC
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
6FN4910.21
February 22, 2010
Pin Configurations
ICL3221E
(16 LD SSOP, TSSOP)
TOP VIEW
ICL3222E
(18 LD PDIP, SOIC)
TOP VIEW
ICL3222E
(20 LD SSOP, TSSOP)
TOP VIEW
ICL3223E
(20 LD SSOP, TSSOP)
TOP VIEW
ICL3232E
(16 LD SOIC, SSOP, TSSOP-16)
TOP VIEW
ICL3232E
(20 LD TSSOP-20)
TOP VIEW
EN
C1+
V+
C1-
C2+
C2-
V-
R1IN
FORCEOFF
GND
T1OUT
FORCEON
T1IN
R1OUT
VCC
INVALID
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
EN
C1+
V+
C1-
C2+
C2-
V-
T2OUT
R2IN
SHDN
GND
T1OUT
R1IN
R1OUT
T2IN
VCC
T1IN
R2OUT
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
EN
C1+
V+
C1-
C2+
C2-
V-
T2OUT
R2IN
SHDN
GND
T1OUT
R1IN
R1OUT
T1IN
NC
VCC
NC
T2IN
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
R2OUT
EN
C1+
V+
C1-
C2+
C2-
V-
T2OUT
R2IN
FORCEOFF
GND
T1OUT
R1IN
R1OUT
T1IN
INVALID
VCC
FORCEON
T2IN
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
R2OUT
C1+
V+
C1-
C2+
C2-
V-
T2OUT
R2IN
VCC
T1OUT
R1IN
R1OUT
T1IN
R2OUT
GND
T2IN
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
NC
C1+
V+
C1-
C2+
C2-
V-
T2OUT
R2IN
NC
GND
T1OUT
R1IN
R1OUT
T1IN
NC
VCC
T2IN
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
NC
R2OUT
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
7FN4910.21
February 22, 2010
ICL3241E
(28 LD SOIC, SSOP, TSSOP)
TOP VIEW
ICL3243E
(28 LD SOIC, SSOP, TSSOP)
TOP VIEW
Pin Configurations (Continued)
C2+
C2-
V-
R1IN
R2IN
R3IN
R4IN
R5IN
T1OUT
T3OUT
T3IN
T2IN
T1IN
C1+
VCC
GND
C1-
EN
R1OUTB
R1OUT
R2OUT
R3OUT
R4OUT
R5OUT
V+
SHDN
R2OUTB
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
T2OUT
C2+
C2-
V-
R1IN
R2IN
R3IN
R4IN
R5IN
T1OUT
T3OUT
T3IN
T2IN
T1IN
C1+
VCC
GND
C1-
FORCEON
INVALID
R1OUT
R2OUT
R3OUT
R4OUT
R5OUT
V+
FORCEOFF
R2OUTB
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
T2OUT
Pin Descriptions
PIN FUNCTION
VCC System power supply input (3.0V to 5.5V).
V+ Internally generated positive transmitter supply (+5.5V).
V- Internally generated negative transmitter supply (-5.5V).
GND Ground connection.
C1+ External capacitor (voltage doubler) is connected to this lead.
C1- External capacitor (voltage doubler) is connected to this lead.
C2+ External capacitor (voltage inverter) is connected to this lead.
C2- External capacitor (voltage inverter) is connected to this lead.
TIN TTL/CMOS compatible transmitter Inputs.
TOUT ±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.
RIN ±15kV ESD Protected, RS-232 compatible receiver inputs.
ROUT TTL/CMOS level receiver outputs.
ROUTB TTL/CMOS level, noninverting, always enabled receiver outputs.
INVALID Active low output that indicates if no valid RS-232 levels are present on any receiver input.
EN Active low receiver enable control; doesn’t disable ROUTB outputs.
SHDN Active low input to shut down transmitters and on-board power supply, to place device in low power mode.
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and
FORCEON (see Table 2).
FORCEON Active high input to override automatic power-down circuitry thereby keeping transmitters active (FORCEOFF must
be high).
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
8FN4910.21
February 22, 2010
Ordering Information
PART NUMBER
(Note 3) PART
MARKING TEMP RANG E
(°C) PACKAGE PKG.
DWG. #
ICL3221ECA ICL 3221ECA 0 to +70 16 Ld SSOP M16.209
ICL3221ECA-T (Note 1) ICL 3221ECA 0 to +70 16 Ld SSOP M16.209
ICL3221ECAZ (Note 2) ICL32 21ECAZ 0 to +70 16 Ld SSOP (Pb-free) M16.209
ICL3221ECAZ-T (Notes 1, 2) ICL32 21ECAZ 0 to +70 16 Ld SSOP (Pb-free) M16.209
ICL3221ECAZA (Note 2) ICL32 21ECAZ 0 to +70 16 Ld SSOP (Pb-free) M16.209
ICL3221ECAZA-T (Notes 1, 2) ICL32 21ECAZ 0 to +70 16 Ld SSOP (Pb-free) M16.209
ICL3221ECV 3221 ECV 0 to +70 16 Ld TSSOP M16.173
ICL3221ECVZ (Note 2) 3221 ECVZ 0 to +70 16 Ld TSSOP (Pb-free) M16.173
ICL3221ECVZ-T (Notes 1, 2) 3221 ECVZ 0 to +70 16 Ld TSSOP (Pb-free) M16.173
ICL3221EIA ICL 3221EIA -40 to +85 16 Ld SSOP M16.209
ICL3221EIA-T (Note 1) ICL 3221EIA -40 to +85 16 Ld SSOP M16.209
ICL3221EIAZ (Note 2) ICL32 21EIAZ -40 to +85 16 Ld SSOP (Pb-free) M16.209
ICL3221EIAZ-T (Notes 1, 2) ICL32 21EIAZ -40 to +85 16 Ld SSOP (Pb-free) M16.209
ICL3221EIVZ (Note 2) 3221 EIVZ -40 to +85 16 Ld TSSOP (Pb-free) M16.173
ICL3221EIVZ-T (Notes 1, 2) 3221 EIVZ -40 to +85 16 Ld TSSOP (Pb-free) M16.173
ICL3222ECA-T (Note 1) ICL 3222ECA 0 to +70 20 Ld SSOP M20.209
ICL3222ECAZ (Note 2) ICL32 22ECAZ 0 to +70 20 Ld SSOP (Pb-free) M20.209
ICL3222ECAZ-T (Notes 1, 2) ICL32 22ECAZ 0 to +70 20 Ld SSOP (Pb-free) M20.209
ICL3222ECP ICL3222ECP 0 to +70 18 Ld PDIP E18.3
ICL3222ECV-T (Note 1) ICL 3222ECV 0 to +70 20 Ld TSSOP M20.173
ICL3222ECVZ (Note 2) ICL32 22ECVZ 0 to +70 20 Ld TSSOP (Pb-free) M20.173
ICL3222ECVZ-T (Notes 1, 2) ICL32 22ECVZ 0 to +70 20 Ld TSSOP (Pb-free) M20.173
ICL3222EIAZ (Note 2) ICL32 22EIAZ -40 to +85 20 Ld SSOP (Pb-free) M20.209
ICL3222EIAZ-T (Notes 1, 2) ICL32 22EIAZ -40 to +85 20 Ld SSOP (Pb-free) M20.209
ICL3222EIB ICL3222EIB -40 to +85 18 Ld SOIC M18.3
ICL3222EIB-T (Note 1) ICL3222EIB -40 to +85 18 Ld SOIC M18.3
ICL3222EIBZ (Note 2) 3222EIBZ -40 to +85 18 Ld SOIC (Pb-free) M18.3
ICL3222EIBZ-T (Notes 1, 2) 3222EIBZ -40 to +85 18 Ld SOIC (Pb-free) M18.3
ICL3222EIV ICL 3222EIV -40 to +85 20 Ld TSSOP M20.173
ICL3222EIV-T (Note 1) ICL 3222EIV -40 to +85 20 Ld TSSOP M20.173
ICL3222EIVZ (Note 2) ICL32 22EIVZ -40 to +85 20 Ld TSSOP (Pb-free) M20.173
ICL3222EIVZ-T (Notes 1, 2) ICL32 22EIVZ -40 to +85 20 Ld TSSOP (Pb-free) M20.173
ICL3223ECA ICL 3223ECA 0 to +70 20 Ld SSOP M20.209
ICL3223ECA-T (Note 1) ICL 3223ECA 0 to +70 20 Ld SSOP M20.209
ICL3223ECAZ (Note 2) ICL32 23ECAZ 0 to +70 20 Ld SSOP (Pb-free) M20.209
ICL3223ECAZ-T (Notes 1, 2) ICL32 23ECAZ 0 to +70 20 Ld SSOP (Pb-free) M20.209
ICL3223ECV ICL 3223ECV 0 to +70 20 Ld TSSOP M20.173
ICL3223ECVZ (Note 2) ICL32 23ECVZ 0 to +70 20 Ld TSSOP (Pb-free) M20.173
ICL3223ECVZ-T (Notes 1, 2) ICL32 23ECVZ 0 to +70 20 Ld TSSOP (Pb-free) M20.173
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
9FN4910.21
February 22, 2010
ICL3223EIA ICL 3223EIA -40 to +85 20 Ld SSOP M20.209
ICL3223EIA-T (Note 1) ICL 3223EIA -40 to +85 20 Ld SSOP M20.209
ICL3223EIAZ (Note 2) ICL32 23EIAZ -40 to +85 20 Ld SSOP (Pb-free) M20.209
ICL3223EIAZ-T (Notes 1, 2) ICL32 23EIAZ -40 to +85 20 Ld SSOP (Pb-free) M20.209
ICL3223EIV ICL 3223EIV -40 to +85 20 Ld TSSOP M20.173
ICL3223EIVZ (Note 2) ICL32 23EIVZ -40 to +85 20 Ld TSSOP (Pb-free) M20.173
ICL3223EIVZ-T (Notes 1, 2) ICL32 23EIVZ -40 to +85 20 Ld TSSOP (Pb-free) M20.173
ICL3232ECA ICL 3232ECA 0 to +70 16 Ld SSOP M16.209
ICL3232ECA-T (Note 1) ICL 3232ECA 0 to +70 16 Ld SSOP M16.209
ICL3232ECAZ (Note 2) 3232 ECAZ 0 to +70 16 Ld SSOP (Pb-free) M16.209
ICL3232ECAZ-T (Notes 1, 2) 3232 ECAZ 0 to +70 16 Ld SSOP (Pb-free) M16.209
ICL3232ECBZ (Note 2) 3232ECBZ 0 to +70 16 Ld SOIC (Pb-free) M16.3
ICL3232ECBZ-T (Notes 1, 2) 3232ECBZ 0 to +70 16 Ld SOIC (Pb-free) M16.3
ICL3232ECBN 3232ECBN 0 to +70 16 Ld SOIC M16.15
ICL3232ECBN-T (Note 1) 3232ECBN 0 to +70 16 Ld SOIC M16.15
ICL3232ECBNZ (Note 2) 3232ECBNZ 0 to +70 16 Ld SOIC (Pb-free) M16.15
ICL3232ECBNZ-T (Notes 1, 2) 3232ECBNZ 0 to +70 16 Ld SOIC (Pb-free) M16.15
ICL3232ECV-16T (Note 1) 3232E CV-16 0 to +70 16 Ld TSSOP M16.173
ICL3232ECV-16Z (Note 2) 3232E CV-16Z 0 to +70 16 Ld TSSOP (Pb-free) M16.173
ICL3232ECV-16Z-T (Notes 1, 2) 3232E CV-16Z 0 to +70 16 Ld TSSOP (Pb-free) M16.173
ICL3232ECV-20Z (Note 2) ICL3232 ECV-20Z 0 to +70 20 Ld TSSOP (Pb-free) M20.173
ICL3232ECV-20Z-T (Notes 1, 2) ICL3232 ECV-20Z 0 to +70 20 Ld TSSOP (Pb-free) M20.173
ICL3232EFV-16Z (Note 2) 3232E FV-16Z -40 to +125 16 Ld TSSOP (Pb-free) M16.173
ICL3232EFV-16Z-T (Notes 1, 2) 3232E FV-16Z -40 to +125 16 Ld TSSOP (Pb-free) M16.173
ICL3232EIA-T (Note 1) ICL3232 EIA -40 to +85 16 Ld SSOP M16.209
ICL3232EIAZ (Note 2) 3232 EIAZ -40 to +85 16 Ld SSOP (Pb-free) M16.209
ICL3232EIAZ-T (Notes 1, 2) 3232 EIAZ -40 to +85 16 Ld SSOP (Pb-free) M16.209
ICL3232EIB-T (Note 1) ICL3232EIB -40 to +85 16 Ld SOIC M16.3
ICL3232EIBZ (Note 2) 3232EIBZ -40 to +85 16 Ld SOIC (Pb-free) M16.3
ICL3232EIBZ-T (Notes 1, 2) 3232EIBZ -40 to +85 16 Ld SOIC (Pb-free) M16.3
ICL3232EIBNZ (Note 2) 3232EIBNZ -40 to +85 16 Ld SOIC (Pb-free) M16.15
ICL3232EIBNZ-T (Notes 1, 2) 3232EIBNZ -40 to +85 16 Ld SOIC (Pb-free) M16.15
ICL3232EIV-16 3232E IV-16 -40 to +85 16 Ld TSSOP M16.173
ICL3232EIV-16-T (Note 1) 3232E IV-16 -40 to +85 16 Ld TSSOP M16.173
ICL3232EIV-16Z (Note 2) 3232E IV-16Z -40 to +85 16 Ld TSSOP (Pb-free) M16.173
ICL3232EIV-16Z-T (Notes 1, 2) 3232E IV-16Z -40 to +85 16 Ld TSSOP (Pb-free) M16.173
ICL3232EIV-20Z (Note 2) ICL3232 EIV-20Z -40 to +85 20 Ld TSSOP (Pb-free) M20.173
ICL3232EIV-20Z-T (Notes 1, 2) ICL3232 EIV-20Z -40 to +85 20 Ld TSSOP (Pb-free) M20.173
ICL3241ECA ICL 3241ECA 0 to +70 28 Ld SSOP M28.209
Ordering Information (Continued)
PART NUMBER
(Note 3) PART
MARKING TEMP RANG E
(°C) PACKAGE PKG.
DWG. #
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
10 FN4910.21
February 22, 2010
ICL3241ECA-T (Note 1) ICL 3241ECA 0 to +70 28 Ld SSOP M28.209
ICL3241ECAZ (Note 2) ICL3241 ECAZ 0 to +70 28 Ld SSOP (Pb-free) M28.209
ICL3241ECAZ-T (Notes 1, 2) ICL3241 ECAZ 0 to +70 28 Ld SSOP (Pb-free) M28.209
ICL3241ECBZ (Note 2) ICL3241ECBZ 0 to +70 28 Ld SOIC (Pb-free) M28.3
ICL3241ECBZ-T (Notes 1, 2) ICL3241ECBZ 0 to +70 28 Ld SOIC (Pb-free) M28.3
ICL3241ECVZ (Note 2) ICL3241 ECVZ 0 to +70 28 Ld TSSOP (Pb-free) M28.173
ICL3241EIA-T (Note 1) ICL 3241EIA -40 to +85 28 Ld SSOP M28.209
ICL3241EIAZ (Note 2) ICL3241 EIAZ -40 to +85 28 Ld SSOP (Pb-free) M28.209
ICL3241EIAZ-T (Notes 1, 2) ICL3241 EIAZ -40 to +85 28 Ld SSOP (Pb-free) M28.209
ICL3241EIBZ (Note 2) ICL3241EIBZ -40 to +85 28 Ld SOIC (Pb-free) M28.3
ICL3241EIBZ-T (Notes 1, 2) ICL3241EIBZ -40 to +85 28 Ld SOIC (Pb-free) M28.3
ICL3241EIV-T (Note 1) ICL3241 EIV -40 to +85 28 Ld TSSOP M28.173
ICL3241EIVZ (Note 2) ICL3241 EIVZ -40 to +85 28 Ld TSSOP (Pb-free) M28.173
ICL3241EIVZ-T (Notes 1, 2) ICL3241 EIVZ -40 to +85 28 Ld TSSOP (Pb-free) M28.173
ICL3243ECA ICL 3243ECA 0 to +70 28 Ld SSOP M28.209
ICL3243ECA-T (Note 1) ICL 3243ECA 0 to +70 28 Ld SSOP M28.209
ICL3243ECAZ (Note 2) ICL32 43ECAZ 0 to +70 28 Ld SSOP (Pb-free) M28.209
ICL3243ECAZ-T (Notes 1, 2) ICL32 43ECAZ 0 to +70 28 Ld SSOP (Pb-free) M28.209
ICL3243ECBZ (Note 2) ICL3243ECBZ 0 to +70 28 Ld SOIC (Pb-free) M28.3
ICL3243ECBZ-T (Notes 1, 2) ICL3243ECBZ 0 to +70 28 Ld SOIC (Pb-free) M28.3
ICL3243ECV-T (Note 1) ICL3243 ECV 0 to +70 28 Ld TSSOP M28.173
ICL3243ECVZ (Note 2) ICL3243 ECVZ 0 to +70 28 Ld TSSOP (Pb-free) M28.173
ICL3243ECVZ-T (Notes 1, 2) ICL3243 ECVZ 0 to +70 28 Ld TSSOP (Pb-free) M28.173
ICL3243EIA-T (Note 1) ICL 3243EIA -40 to +85 28 Ld SSOP M28.209
ICL3243EIAZ (Note 2) ICL32 43EIAZ -40 to +85 28 Ld SSOP (Pb-free) M28.209
ICL3243EIAZ-T (Notes 1, 2) ICL32 43EIAZ -40 to +85 28 Ld SSOP (Pb-free) M28.209
ICL3243EIV ICL3243 EIV -40 to +85 28 Ld TSSOP M28.173
ICL3243EIVZ (Note 2) ICL3243 EIVZ -40 to +85 28 Ld TSSOP (Pb-free) M28.173
ICL3243EIVZ-T (Notes 1, 2) ICL3243 EIVZ -40 to +85 28 Ld TSSOP (Pb-free) M28.173
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ICL3221E, ICL3222E, ICL3223E, ICL3232E,
ICL3241E, ICL3243E. For more information on MSL please see techbrief TB363.
Ordering Information (Continued)
PART NUMBER
(Note 3) PART
MARKING TEMP RANG E
(°C) PACKAGE PKG.
DWG. #
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
11 FN4910.21
February 22, 2010
Table of Contents
Related Literature ............................................................................................................................... 1
Typical Operating Circuits.................................................................................................................... 2
Pin Configurations................... ............. ............. .................................................................................. 6
Pin Descriptions .................................................................................................................................. 7
Ordering Information .......................................................................................................................... 8
Absolute Maximum Ratings .............................................................................................................. 12
Thermal Information ................................................................................ ........................................ 12
Recommended Operating Conditions................................................................................................ 12
Electrical Specifications.................................................................................................................... 12
Detailed Description .......................................................................................................................... 14
Charge-Pump ................................................................................................................................. 14
Transmitters................................................................................................................................... 14
Receivers ....................................................................................................................................... 14
Low Power Operation ........................................................................................................................ 15
Pin Compatible Replacements for 5V Devices ...................................................................................... 15
Power-Down Functionality (Except ICL3232E).................................................................................. 15
Software Controlled (Manual) Power-Down ......................................................................................... 15
Automatic Power-Down (ICL3221E, ICL3223E, ICL3243E Only) ............................................................. 17
Receiver ENABLE Control (ICL3221E, ICL3222E, ICL3223E, ICL3241E Only)............................................ 18
Capacitor Selection............................................................................................................................ 18
Power Supply Decoupling.................................................................................................................. 18
Operation Down to 2.7V .................................................................................................................... 18
Transmitter Outputs when Exiting Power-Down................................................................................ 18
Mouse Driveability............................................................................................................................. 18
High Data Rates................................................................................................................................. 19
Interconnection with 3V and 5V Logic......................................... ............. ............. ............................ 19
±15kV ESD Protection ....................................................................................................................... 20
Human Body Model (HBM) Testing..................................................................................................... 20
IEC61000-4-2 Testing...................................................................................................................... 20
Typical Performance Curves VCC = 3.3V, TA = +25°C.............................................................................. 20
Die Characteristics ............................................................................................................................ 21
Revision History ................................................................................................................................ 22
Products............................................................................................................................................ 22
Package Outline Drawings....... ............. ................................................................. ............. ............... 23
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
12 FN4910.21
February 22, 2010
Absolute Maximum Ratings Thermal Information
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
TIN, FORCEOFF, FORCEON, EN, SHDN . . . . . . -0.3V to 6V
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
ROUT
, INVALID . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . See Specification Table
Recommended Operating Conditions
Temperature Range
ICL32xxECX . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
ICL32xxEFX . . . . . . . . . . . . . . . . . . . . . -40°C to +125°C
ICL32xxEIX. . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . 3.3V or 5V
Rx Input Voltage . . . . . . . . . . . . . . . . . . . . . -15V to +15V
Thermal Resistance (Typical, Note 4) ΘJA (°C/W)
18 Ld PDIP Package* . . . . . . . . . . . . . . . . . 80
16 Ld Wide SOIC Package . . . . . . . . . . . . . . 100
16 Ld Narrow SOIC Package . . . . . . . . . . . . 115
18 Ld SOIC Package . . . . . . . . . . . . . . . . . . 75
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . 75
16 Ld SSOP Package. . . . . . . . . . . . . . . . . . 135
20 Ld SSOP Package. . . . . . . . . . . . . . . . . . 122
16 Ld TSSOP Package . . . . . . . . . . . . . . . . . 145
20 Ld TSSOP Package . . . . . . . . . . . . . . . . . 140
28 Ld SSOP and TSSOP Packages. . . . . . . . . 100
Maximum Junction Temperature (Plastic Package) . +150°C
Maximum Storage Temperature Range . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warra nty.
NOTE:
4. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief
TB379 for details.
Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = +25°C. Boldface limits apply over the operating temperature
range.
PARAMETER TEST CONDITIONS TEMP
(°C) MIN
(Note 6) TYP MAX
(Note 6) UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Power-Down
All RIN Open, FORCEON = GND, FORCEOFF = VCC
(ICL3221E, ICL3223E, ICL3243E Only)
25 - 1.0 10 µA
Supply Current,
Power-Down
FORCEOFF = SHDN = GND (Except ICL3232E) 25 - 1.0 10 µA
Supply Current,
Automatic Power-Down
Disabled
All Outputs Unloaded,
FORCEON = FORCEOFF
= SHDN = VCC
VCC = 3.0V, ICL3241,
ICL3243
25 - 0.3 1.0 mA
VCC = 3.0V, ICL3223 25 - 0.7 3.0 mA
VCC = 3.15V, ICL3221,
ICL3222, ICL3223,
ICL3232
25 - 0.3 1.0 mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low TIN, FORCEON, FORCEOFF, EN, SHDN Full - - 0.8 V
Input Logic Threshold High TIN, FORCEON,
FORCEOFF
, EN, SHDN
VCC = 3.3V Full 2.0 --V
VCC = 5.0V Full 2.4 --V
Input Leakage Current TIN, FORCEON,
FORCEOFF
, EN, SHDN
All but ICL3232EF Full - ±0.01 ±1.0 µA
ICL3232EF Full - ±0.01 ±10 µA
Output Leakage Current
(Except ICL3232E)
FORCEOFF = GND or EN = VCC Full - ±0.05 ±10 µA
Output Voltage Low IOUT = 1.6mA Full - - 0.4 V
Output Voltage High IOUT = -1.0mA All but ICL3232EF Full VCC - 0.6 VCC - 0.1 - V
ICL3232EF Full VCC - 0.9 VCC - 0.1 - V
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
13 FN4910.21
February 22, 2010
AUTOMATIC POWER-DOWN (ICL3221E, ICL3223E, ICL3243E Only, FORCEON = GND, FORCEOFF = VCC)
Receiver Input Thresholds
to Enable Transmitters
ICL32xxE Powers Up (see Figure 6) Full -2.7 -2.7 V
Receiver Input Thresholds
to Disable Transmitters
ICL32xxE Powers Down (see Figure 6) Full -0.3 -0.3 V
INVALID Output Voltage
Low
IOUT = 1.6mA Full - - 0.4 V
INVALID Output Voltage
High
IOUT = -1.0mA Full VCC - 0.6 --V
Receiver Threshold to
Transmitters Enabled Delay
(tWU)
25 - 100 - µs
Receiver Positive or
Negative Threshold to
INVALID High Delay
(tINVH)
25 - 1 - µs
Receiver Positive or
Negative Threshold to
INVALID Low Delay (tINVL)
25 - 30 - µs
RECEIVER INPUTS
Input Voltage Range 25 -25 - 25 V
Input Threshold Low VCC = 3.3V 25 0.6 1.2 - V
VCC = 5.0V 25 0.8 1.5 - V
Input Threshold High VCC = 3.3V 25 - 1.5 2.4 V
VCC = 5.0V 25 - 1.8 2.4 V
Input Hysteresis 25 - 0.5 - V
Input Resistance 25 3 5 7 kΩ
TRANSMITTER OUTPUTS
Output Voltage Swing All Transmitter Outputs Loaded with 3kΩ to Ground Full ±5.0 ±5.4 - V
Output Resistance VCC = V+ = V- = 0V, Transmitter Output = ±2V Full 300 10M - Ω
Output Short-Circuit
Current
Full - ±35 ±60 mA
Output Leakage Current VOUT = ±12V, VCC = 0V or 3V to 5.5V,
Automatic Power-Down or
FORCEOFF = SHDN = GND
Full - - ±25 µA
MOUSE DRIVEABILITY (ICL324XE Only)
Transmitter Output Voltage
(see Figure 9)
T1IN = T2IN = GND, T3IN = VCC, T3OUT Loaded
with 3kΩ to GND, T1OUT and T2OUT Loaded with
2.5mA Each
Full ±5--V
TIMING CHARA CT E RI STICS
Maximum Data Rate RL = 3kΩ, CL = 1000pF, One Transmitter
Switching
Full 250 500 - kbps
Receiver Propagation Delay Receiver Input to
Receiver Output,
CL= 150pF
tPHL 25 - 0.15 - µs
tPLH 25 - 0.15 - µs
Receiver Output Enable
Time
Normal Operation (Except ICL3232E) 25 - 200 - ns
Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = +25°C. Boldface limits apply over the operating temperature
range. (Continued)
PARAMETER TEST CONDITIONS TEMP
(°C) MIN
(Note 6) TYP MAX
(Note 6) UNITS
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
14 FN4910.21
February 22, 2010
Detailed Description
ICL32xxE interface ICs operate from a single +3V to
+5.5V supply, guarantee a 250kbps minimum data
rate, require only four small external 0.1µF capacitors,
feature low power consumption, and meet all ElA
RS-232C and V.28 specifications. The circuit is divided
into three sections: charge pump, transmitters and
receivers.
Charge-Pump
Intersil’s new ICL32xxE family utilizes regulated on-
chip dual charge pumps as voltage doublers, and
voltage inverters to generate ±5.5V transmitter
supplies from a VCC supply as low as 3.0V. This allows
these devices to maintain RS-232 compliant output
levels over the ±10% tolerance range of 3.3V powered
systems. The efficient on-chip power supplies require
only four small, external 0.1µF capacitors for the
voltage doubler and inverter functions at VCC = 3.3V.
See “Capacitor Selection” on page 18 and Table 3 on
page 18 for capacitor recommendations for other
operating conditions. The charge pumps operate
discontinuously (i.e., they turn off as soon as the V+
and V- supplies are pumped up to the nominal values),
resulting in significant power savings.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V
supplies, these transmitters deliver true RS-232 levels
over a wide range of single supply system voltages.
Except for the ICL3232E, all transmitter outputs
disable and assume a high impedance state when the
device enters the power-down mode (see Table 2).
These outputs may be driven to ±12V when disabled.
All devices guarantee a 250kbps data rate for full load
conditions (3kΩ and 1000pF), VCC 3.0V, with one
transmitter operating at full speed. Under more typical
conditions of VCC 3.3V, RL = 3kΩ, and CL = 250pF,
one transmitter easily operates at 900kbps.
Transmitter inputs float if left unconnected, and may
cause ICC increases. Connect unused inputs to GND for
the best performance.
Receivers
All the ICL32xxE devices contain standard inverting
receivers that three-state (except for the ICL3232E)
via the EN or FORCEOFF control lines. Additionally, the
two ICL324XE products include noninverting
(monitor) receivers (denoted by the ROUTB label)
that are always active, regardless of the state of any
control lines. All the receivers convert RS-232 signals
to CMOS output levels and accept inputs up to ±25V
while presenting the required 3kΩ to 7kΩ input
impedance (see Figure 1) even if the power is off
(VCC = 0V). The receivers’ Schmitt trigger input
stage uses hysteresis to increase noise immunity and
decrease errors due to slow input signal transitions.
The ICL3221E, ICL3222E, ICL3223E, ICL3241E
inverting receivers disable only when EN is driven high.
ICL3243E receivers disable during forced (manual)
power-down, but not during automatic power-down
(see Table 2).
Receiver Output Disable
Time
Normal Operation (Except ICL3232E) 25 - 200 - ns
Trans mit ter Skew tPHL to tPLH (Note 5) 25 - 100 - ns
Receiver Skew tPHL to tPLH 25 - 50 - ns
Transition Region Slew Rate VCC = 3.3V,
RL = 3kΩ to 7kΩ,
Measured from 3V to
-3V or -3V to 3V
CL = 150pF to 2500pF 25 4 - 30 V/µs
CL = 150pF to 1000pF 25 6 - 30 V/µs
ESD PERFORMANCE
RS-232 Pins (TOUT, RIN) Human Body Model 25 - ±15 - kV
IEC61000-4-2 Contact Discharge 25 - ±8-kV
IEC61000-4-2 Air Gap Discharge 25 - ±15 - kV
All Other Pins Human Body Model 25 - ±2-kV
NOTES:
5. Transmitter skew is measured at the transmitter zero crossing points.
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = +25°C. Boldface limits apply over the operating temperature
range. (Continued)
PARAMETER TEST CONDITIONS TEMP
(°C) MIN
(Note 6) TYP MAX
(Note 6) UNITS
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
15 FN4910.21
February 22, 2010
ICL3241E and ICL3243E monitor receivers remain
active even during manual power-down and forced
receiver disable, making them extremely useful for
Ring Indicator monitoring. Standard receivers driving
powered down peripherals must be disabled to
prevent current flow through the peripherals
protection diodes (see Figures 2 and 3). This renders
them useless for wake up functions, but the
corresponding monitor receiver can be dedicated to
this task as shown in Figure 3.
Low Power Operation
These 3V devices require a nominal supply current of
0.3mA, even at VCC = 5.5V, during normal operation
(not in power-down mode). This is considerably less
than the 5mA to 11mA current required by comparable
5V RS-232 devices, allowing users to reduce system
power simply by switching to this new family.
Pin Compatible Replacements for 5V
Devices
The ICL3221E, ICL3222E, ICL3232E are pin compatible
with existing 5V RS-232 transceivers - See the
“Features” section on page 1 for details.
This pin compatibility coupled with the low ICC and
wide operating supply range, make the ICL32xxE
potential lower power, higher performance drop-in
replacements for existing 5V applications. As long as
the ±5V RS-232 output swings are acceptable, and
transmitter input pull-up resistors aren’t required, the
IICL32xxE should work in most 5V applications.
When replacing a device in an existing 5V application,
it is acceptable to terminate C3 to VCC as shown on
the “Typical Operating Circuits” on page 2.
Nevertheless, terminate C3 to GND if possible, as
slightly better performance results from this
configuration.
Power-Down Functionality
(Except ICL3232E)
The already low current requirement drops
significantly when the device enters power-down
mode. In power-down, supply current drops to 1µA,
because the on-chip charge pump turns off (V+
collapses to VCC, V- collapses to GND), and the
transmitter outputs three-state. Inverting receiver
outputs may or may not disable in power-down; refer
to Table 2 for details. This micro-power mode makes
these devices ideal for battery powered and portable
applications.
Software Controlled (Manual) Power-Down
Most devices in the ICL32xxE family provide pins that
allow the user to force the IC into the low power,
standby state.
On the ICL3222E and ICL3241E, the power-down
control is via a simple shutdown (SHDN) pin. Driving
this pin high enables normal operation, while driving it
low forces the IC into its power-down state. Connect
SHDN to VCC if the power-down function isn’t needed.
Note that all the receiver outputs remain enabled
during shutdown (see Table 2). For the lowest power
consumption during power-down, the receivers should
also be disabled by driving the EN input high (see next
section, and Figures 2 and 3).
The ICL3221E, ICL3223E, and ICL3243E utilize a two
pin approach where the FORCEON and FORCEOFF
inputs determine the IC’s mode. For always enabled
operation, FORCEON and FORCEOFF are both strapped
high. To switch between active and power-down
modes, under logic or software control, only the
FORCEOFF input need be driven. The FORCEON state
isn’t critical, as FORCEOFF dominates over FORCEON.
Nevertheless, if strictly manual control over power-
down is desired, the user must strap FORCEON high to
disable the automatic power-down circuitry. ICL3243E
inverting (standard) receiver outputs also disable when
the device is in manual power-down, thereby
eliminating the possible current path through a
shutdown peripheral’s input protection diode (see
Figures 2 and 3).
RXOUT
GND VROUT VCC
5kΩ
RXIN
-25V VRIN +25V
GND
VCC
FIGURE 1. INVERTING RECEIVER CONNECTIONS
TABLE 2. POWER-DOWN AND ENABLE LOGIC TRUTH TABLE
RS-232
SIGNAL
PRESENT
AT
RECEIVER
INPUT?
FORCEOFF
OR SHDN
INPUT FORCEON
INPUT EN
INPUT TRANSMITTER
OUTPUTS RECEIVER
OUTPUTS
ROUTB
OUTPUTS
(NOTE 7) INVALID
OUTPUT MODE OF
OPERATION
ICL3222E, ICL3241E
N/A L N/A L High-Z Active Active N/A Manual Power-Down
N/A L N/A H High-Z High-Z Active N/A Manual Power-Down with
Receiver Disabled
N/A H N/A L Active Active Active N/A Normal Operation
N/A H N/A H Active High-Z Active N/A Normal Operation with
Receiver Disabled
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E
16 FN4910.21
February 22, 2010
The INVALID output always indicates whether or not a
valid RS-232 signal is present at any of the receiver
inputs (see Table 2), giving the user an easy way to
determine when the interface block should power
down. In the case of a disconnected interface cable
where all the receiver inputs are floating (but pulled to
GND by the internal receiver pull down resistors), the
INVALID logic detects the invalid levels and drives the
output low. The power management logic then uses
this indicator to power down the interface block.
Reconnecting the cable restores valid levels at the
receiver inputs, INVALID switches high, and the power
management logic wakes up the interface block.
INVALID can also be used to indicate the DTR or RING
INDICATOR signal, as long as the other receiver inputs
are floating, or driven to GND (as in the case of a
powered down driver). Connecting FORCEOFF and
FORCEON together disables the automatic power-down
feature, enabling them to function as a manual
SHUTDOWN input (see Figure 4).
ICL3221E, ICL3223E
No H H L Active Active N/A L Normal Operation
(Auto Power-Down Disabled)
No H H H Active High-Z N/A L
Yes H L L Active Active N/A H Normal Operation
(Auto Power-Down Enabled)
Yes H L H Active High-Z N/A H
No H L L High-Z Active N/A L Power-Down Due to Auto
Power-Down Logic
No H L H High-Z High-Z N/A L
Yes L X L High-Z Active N/A H Manual Power-Down
Yes L X H High-Z High-Z N/A H Manual Power-Down
with Receiver Disabled
No L X L High-Z Active N/A L Manual Power-Down
No L X H High-Z High-Z N/A L Manual Power-Down
with Receiver Disabled
ICL3243E
No H H N/A Active Active Active L Normal Operation
(Auto Power-Down Disabled)
Yes H L N/A Active Active Active H Normal Operation
(Auto Power-Down Enabled)
No H L N/A High-Z Active Active L Power-Down Due to Auto
Power-Down Logic
Yes L X N/A High-Z High-Z Active H Manual Power-Down
No L X N/A High-Z High-Z Active L Manual Power-Down
NOTE:
7. Applies only to the ICL3241E and ICL3243E.
TABLE 2. POWER-DOWN AND ENABLE LOGIC TRUTH TABLE (Continued)
RS-232
SIGNAL
PRESENT
AT
RECEIVER
INPUT?
FORCEOFF
OR SHDN
INPUT FORCEON
INPUT EN
INPUT TRANSMITTER
OUTPUTS RECEIVER
OUTPUTS
ROUTB
OUTPUTS
(NOTE 7) INVALID
OUTPUT MODE OF
OPERATION
FIGURE 2. POWER DRAIN THROUGH POWERED
DOWN PERIPHERAL
OLD
VCC
POWERED
GND SHDN = GND
VCC
Rx
Tx
VCC
CURRENT
VOUT = VCC
FLOW
RS-232 CHIP
DOWN
UART
ICL3221E, ICL3222E, ICL3223E, ICL3232E, ICL3241E, ICL3243E