LT8330 Low IQ Boost/SEPIC/ Inverting Converter with 1A, 60V Switch Description Features 3V to 40V Input Voltage Range nn Ultralow Quiescent Current and Low Ripple Burst Mode(R) Operation: IQ = 6A nn 1A, 60V Power Switch nn Positive or Negative Output Voltage Programming with a Single Feedback Pin nn Fixed 2MHz Switching Frequency nn Accurate 1.6V EN/UVLO Pin Threshold nn Internal Compensation and Soft-Start nn Low Profile (1mm) ThinSOTTM Package nn Low Profile (0.75mm) 8-Lead (3mm x 2mm) DFN Package nn Applications The LT(R)8330 is a current mode DC/DC converter capable of generating either positive or negative output voltages using a single feedback pin. It can be configured as a boost, SEPIC or inverting converter consuming as low as 6A of quiescent current. Low ripple Burst Mode operation maintains high efficiency down to very low output currents while keeping the output ripple below 15mV in a typical application. The internally compensated current mode architecture results in stable operation over a wide range of input and output voltages. Integrated soft-start and frequency foldback functions are included to control inductor current during start-up. The 2MHz operation combined with small package options, enables low cost, area efficient solutions. L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Industrial and Automotive Telecom nn Medical Diagnostic Equipment nn Portable Electronics nn nn Typical Application 48V Boost Converter 6.8H 4.7F 4.7F SW LT8330 1M EN/UVLO INTVCC FBX GND 4.7pF 34.8k 1F 100 1000 90 900 80 800 70 700 60 600 50 500 40 400 30 300 200 20 EFFICIENCY POWER LOSS 10 0 POWER LOSS (mW) VIN VOUT 48V 135mA EFFICIENCY (%) VIN 12V Efficiency and Power Loss 0 40 80 120 LOAD CURRENT (mA) 100 0 160 8330 TA01b 8330f For more information www.linear.com/LT8330 1 LT8330 Absolute Maximum Ratings (Note 1) SW.............................................................................60V VIN, EN/UVLO.............................................................40V EN/UVLO Pin Above VIN Pin.........................................6V INTVCC (Note 2)...........................................................4V FBX............................................................................4V Operating Junction Temperature (Note 3) LT8330E, LT8330I.............................. -40C to 125C LT8330H............................................. -40C to 150C Storage Temperature Range................... -65C to 150C Pin Configuration TOP VIEW FBX 1 NC 2 SW 3 SW 4 9 8 EN/UVLO 7 INTVCC 6 5 TOP VIEW SW 1 6 VIN VIN GND 2 5 INTVCC GND FBX 3 4 EN/UVLO S6 PACKAGE 6-LEAD PLASTIC TSOT-23 DDB PACKAGE 8-LEAD (3mm x 2mm) PLASTIC DFN JA = 125C/W, JC = 102C/W JA = 60C/W EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LT8330ES6#PBF LT8330ES6#TRPBF LTGMQ 6-Lead Plastic TSOT-23 -40C to 125C LT8330IS6#PBF LT8330IS6#TRPBF LTGMQ 6-Lead Plastic TSOT-23 -40C to 125C LT8330HS6#PBF LT8330HS6#TRPBF LTGMQ 6-Lead Plastic TSOT-23 -40C to 150C LT8330EDDB#PBF LT8330EDDB#TRPBF LGRC 8-Lead (3mm x 2mm) Plastic DFN -40C to 125C LT8330IDDB#PBF LT8330IDDB#TRPBF LGRC 8-Lead (3mm x 2mm) Plastic DFN -40C to 125C LT8330HDDB#PBF LT8330HDDB#TRPBF LGRC 8-Lead (3mm x 2mm) Plastic DFN -40C to 150C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 2 8330f For more information www.linear.com/LT8330 LT8330 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 12V, EN/UVLO = 12V unless otherwise noted. PARAMETER CONDITIONS MIN VIN Operating Voltage Range VIN Quiescent Current at Shutdown l VEN/UVLO = 0.2V MAX UNITS 40 V l 0.9 2 2 5 A A l 2 3.6 5 9.5 A A l 5.5 8.5 10 15 A A l 780 840 1100 1200 A A 1.6 -0.80 1.632 -0.780 V V 0.005 0.005 0.015 0.015 %/V %/V 10 nA VEN/UVLO = 1.5V VIN Quiescent Current TYP 3 VEN/UVLO = 2V, (Sleep Mode) (Not Switching) VEN/UVLO = 2V, (Active Mode) (Not Switching) FBX Regulation 1.568 -0.820 FBX Regulation Voltage FBX > 0V FBX < 0V FBX Line Regulation FBX > 0V, 3V < VIN < 40V FBX < 0V, 3V < VIN < 40V FBX Pin Current FBX = 1.6V, -0.8V l -10 VIN = 24V l 1.85 l l Oscillator Switching Frequency (fOSC) 2.0 2.15 MHz Minimum On-Time VIN = 24V 65 105 ns Minimum Off-Time VIN = 24V 47 65 ns 1.2 1.4 A Switch Maximum Switch Current Limit Threshold l 1.0 Switch RDS(ON) ISW = 0.5A 330 m Switch Leakage Current VSW = 60V 0.1 1 A EN/UVLO Logic EN/UVLO Pin Threshold (Rising) Start Switching l 1.620 1.68 1.745 V EN/UVLO Pin Threshold (Falling) Stop Switching l 1.556 1.60 1.644 V EN/UVLO Pin Current VEN/UVLO = 1.6V l -40 40 nA Soft-Start Soft-Start Time VIN = 24V 1 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: INTVCC cannot be externally driven. No additional components or loading is allowed on this pin. Note 3: The LT8330E is guaranteed to meet performance specifications from 0C to 125C junction temperature. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The ms LT8330I is guaranteed over the full -40C to 125C operating junction temperature range. The LT8330H is guaranteed over the full -40C to 150C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125C. Note 4: The IC includes overtemperature protection that is intended to protect the device during overload conditions. Junction temperature will exceed 150C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature will reduce lifetime. 8330f For more information www.linear.com/LT8330 3 LT8330 Typical Performance Characteristics FBX Positive Regulation Voltage vs Temperature -0.785 1.620 -0.790 1.610 -0.795 1.600 1.590 EN/UVLO Pin Thresholds vs Temperature 1.74 VIN = 12V 1.72 EN/UVLO PIN VOLTAGE (V) VIN = 12V FBX VOLTAGE (V) FBX VOLTAGE (V) 1.630 FBX Negative Regulation Voltage vs Temperature -0.800 -0.805 1.580 -0.810 1.570 -50 -25 -0.815 -50 -25 VIN = 12V 1.70 1.68 1.66 EN/UVLO RISING (TURN-ON) 1.64 1.62 1.60 EN/UVLO FALLING (TURN-OFF) 1.58 1.56 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (C) 8330 G01 2.04 2.02 2.00 1.98 1.96 1.94 NORMALIZED SWITCHING FREQUENCY (%) SWITCHING FREQUENCY (MHz) SWITCHING FREQUENCY (MHz) Normalized Switching Frequency vs FBX Voltage 2.15 2.06 2.10 2.05 2.00 1.95 1.90 1.92 1.90 -50 -25 1.85 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (C) 0 5 10 8330 G04 Switch Current Limit vs Duty Cycle 1.40 8330 G03 Switching Frequency vs VIN VIN = 24V 2.08 15 20 25 VIN (V) 30 35 40 45 100 VIN = 12V 1.10 20 40 60 DUTY CYCLE (%) 80 100 8330 G07 4 75 50 25 0 -0.8 60 VIN = 24V 0.0 0.4 0.8 FBX VOLTAGE (V) 1.2 1.6 VIN = 24V 55 80 70 60 50 30 -50 -25 -0.4 Switch Minimum Off-Time vs Temperature 50 45 40 35 40 0 100 8330 G06 MINIMUM OFF-TIME (ns) MINIMUM ON-TIME (ns) SWITCH CURRENT LIMIT (A) 1.20 VIN = 24V 8330 G05 90 1.00 125 Switch Minimum On-Time vs Temperature 1.30 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (C) 8330 G02 Switching Frequency vs Temperature 2.10 1.54 -50 -25 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (C) 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (C) 8330 G08 30 -50 -25 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (C) 8330 G09 8330f For more information www.linear.com/LT8330 LT8330 Typical Performance Characteristics 1000 VIN = 12V 8.75 950 7.50 900 VIN PIN CURRENT (A) VIN PIN CURRENT (A) 10.00 VIN Pin Current (Active Mode, Not Switching) vs Temperature 6.25 5.00 3.75 2.50 1.25 Burst Frequency vs Load Current 2.5 VIN = 12V SWITCHING FREQUENCY (MHz) VIN Pin Current (Sleep Mode, Not Switching) vs Temperature 850 800 750 700 FRONT PAGE APPLICATION VIN = 12V 2.0 VOUT = 48V 1.5 1.0 0.5 650 0 -50 -25 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (C) 600 -50 -25 0 0 25 50 75 100 125 150 175 JUNCTION TEMPERATURE (C) 8330 G10 IL 500mA/DIV VSW 20V/DIV VSW 20V/DIV 8330 G13 FRONT PAGE APPLICATION VIN = 12V, VOUT = 48V, ILOAD = 135mA 50 Switching Waveforms (in Deep Burst Mode) IL 500mA/DIV 1s/DIV 20 30 40 LOAD CURRENT (mA) 8330 G12 Switching Waveforms (in DCM/Light Burst Mode) VSW 20V/DIV 10 8330 G11 Switching Waveforms (in CCM) IL 500mA/DIV 0 1s/DIV 8330 G14 FRONT PAGE APPLICATION VIN = 12V, VOUT = 48V, ILOAD = 20mA 1s/DIV FRONT PAGE APPLICATION VIN = 12V, VOUT = 48V, ILOAD = 2mA VOUT Transient Response: Load Current Transients from 67.5mA to 135mA to 67.5mA VOUT Transient Response: Load Current Transients from 5mA to 135mA to 5mA FRONT PAGE APPLICATION FRONT PAGE APPLICATION IL 100mA/DIV 8330 G15 IL 100mA/DIV VIN = 12V VOUT = 48V VIN = 12V VOUT = 48V VOUT 500mV/DIV VOUT 500mV/DIV 100s/DIV 8330 G16 100s/DIV 8330 G17 8330f For more information www.linear.com/LT8330 5 LT8330 Pin Functions EN/UVLO: Shutdown and Undervoltage Detect Pin. The LT8330 is shut down when this pin is low and active when this pin is high. Below an accurate 1.6V threshold the part enters undervoltage lockout and stops switching. This allows an undervoltage lockout (UVLO) threshold to be programmed for system input voltage by resistively dividing down system input voltage to the EN/UVLO pin. An 80mV pin hysteresis ensures part switching resumes when the pin exceeds 1.68V. EN/UVLO pin voltage below 0.2V reduces VIN current below 1A. If shutdown and UVLO features are not required, the pin can be tied directly to system input. GND: Ground Connection for the LT8330. The DFN package has the best thermal performance due to an exposed pad (Pin 9) on the bottom of the package. This exposed pad must be soldered to a ground plane. Pin 5 of the DFN package (and Pin 2 of the TSOT package) should also be connected to a ground plane. The ground plane should be connected to large copper layers to spread heat dissipated by the LT8330. FBX: Voltage Regulation Feedback Pin for Positive or Negative Outputs. Connect this pin to a resistor divider between the output and GND. FBX reduces the switching frequency during start-up and fault conditions when FBX is close to GND. NC: No Internal Connection. Tie directly to local ground. 6 INTVCC: Regulated 3V Supply for Internal Loads. The INTVCC pin must be bypassed with a minimum 1F low ESR ceramic capacitor to ground. No additional components or loading is allowed on this pin. SW: The Output of Internal Power Switch. Minimize the metal trace area connected to this pin to reduce EMI. VIN: Input Supply. This pin must be locally bypassed. Be sure to place the positive terminal of the input capacitor as close as possible to the VIN pin, and the negative terminal as close as possible to the GND pin. 8330f For more information www.linear.com/LT8330 LT8330 Block Diagram D L VIN R4 OPT R3 OPT VOUT CIN COUT EN/UVLO VIN SW INTERNAL REFERENCE UVLO A6 UVLO + - 1.68V(+) 1.6V(-) 3V REGULATOR TJ > 170C INTVCC INTVCC UVLO CVCC FREQUENCY FOLDBACK OSCILLATOR 2MHz VOUT R1 1.6V FBX SWITCH LOGIC SLOPE ERROR AMP SELECT BURST DETECT ERROR + AMP A1 VC DRIVER - A5 + - PWM COMPARATOR R2 ERROR -0.8V UVLO M1 + AMP A2 - SLOPE SOFT-START M2 - + A3 + - A4 ILIMIT RSENSE GND 8330 BD 8330f For more information www.linear.com/LT8330 7 LT8330 Operation The LT8330 uses a fixed frequency, current mode control scheme to provide excellent line and load regulation. Operation can be best understood by referring to the Block Diagram. An internal 2MHz oscillator turns on the internal power switch at the beginning of each clock cycle. Current in the inductor then increases until the current comparator trips and turns off the power switch. The peak inductor current at which the switch turns off is controlled by the voltage on the internal VC node. The error amplifier servos the VC node by comparing the voltage on the FBX pin with an internal reference voltage (1.60V or -0.80V, depending on the chosen topology). When the load current increases it causes a reduction in the FBX pin voltage relative to the internal reference. This causes the error amplifier to increase the VC voltage until the new load current is satisfied. In this manner, the error amplifier sets the correct peak switch current level to keep the output in regulation. The LT8330 is capable of generating either a positive or negative output voltage with a single FBX pin. It can be configured as a boost or SEPIC converter to generate a positive output voltage, or as an inverting converter to generate a negative output voltage. When configured as a boost converter, as shown in the Block Diagram, the FBX pin is pulled up to the internal bias voltage of 1.60V by a voltage divider (R1 and R2) connected from VOUT to GND. Amplifier A2 becomes inactive and amplifier A1 performs (inverting) amplification from FBX to VC. When the LT8330 is in an inverting configuration, the FBX pin is pulled down to -0.80V by a voltage divider from VOUT to GND. Amplifier A1 becomes inactive and amplifier A2 performs (non-inverting) amplification from FBX to VC. If the EN/UVLO pin voltage is below 1.6V, the LT8330 enters undervoltage lockout (UVLO), and stops switching. When the EN/UVLO pin voltage is above 1.68V (typical), the LT8330 resumes switching. If the EN/UVLO pin voltage is below 0.2V, the LT8330 only draws 1A from VIN. To optimize efficiency at light loads, the LT8330 operates in Burst Mode operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to 6A. Applications Information To enhance efficiency at light loads the LT8330 uses a low ripple Burst Mode architecture. This keeps the output capacitor charged to the desired output voltage while minimizing the input quiescent current and output ripple. In Burst Mode operation the LT8330 delivers single small pulses of current to the output capacitor followed by sleep periods where the output power is supplied by the output capacitor. While in sleep mode the LT8330 consumes only 6A. As the output load decreases, the frequency of single current pulses decreases (see Figure 1) and the percentage of time the LT8330 is in sleep mode increases, resulting in much higher light load efficiency than for typical converters. To optimize the quiescent current performance at light loads, the current in the feedback resistor divider must be minimized as it appears to the output as load current. In addition, all possible leakage currents from 8 the output should also be minimized as they all add to the equivalent output load. The largest contributor to leakage current can be due to the reverse biased leakage of the Schottky diode (see Diode Selection in the Applications Information section). 2.5 SWITCHING FREQUENCY (MHz) Achieving Ultralow Quiescent Current FRONT PAGE APPLICATION VIN = 12V 2.0 VOUT = 48V 1.5 1.0 0.5 0 0 10 20 30 40 LOAD CURRENT (mA) 50 8330 F01 Figure 1. Burst Frequency vs Load Current 8330f For more information www.linear.com/LT8330 LT8330 Applications Information While in Burst Mode operation the current limit of the switch is approximately 240mA resulting in the output voltage ripple shown in Figure 2. Increasing the output capacitance will decrease the output ripple proportionally. As the output load ramps upward from zero the switching frequency will increase but only up to the fixed 2MHz defined by the internal oscillator as shown in Figure 1. The output load at which the LT8330 reaches the fixed 2MHz frequency varies based on input voltage, output voltage, and inductor choice. INTVCC Regulator A low dropout (LDO) linear regulator, supplied from VIN, produces a 3V supply at the INTVCC pin. A minimum 1F low ESR ceramic capacitor must be used to bypass the INTVCC pin to ground to supply the high transient currents required by the internal power MOSFET gate driver. No additional components or loading is allowed on this pin. The INTVCC rising threshold (to allow soft start and switching) is typically 2.6V. The INTVCC falling threshold (to stop switching and reset soft start) is typically 2.5V. Duty Cycle Consideration The LT8330 minimum on-time, minimum off-time and switching frequency (fOSC) define the allowable minimum and maximum duty cycles of the converter (see Minimum On-Time, Minimum Off-Time, and Switching Frequency in the Electrical Characteristics table). IL 200mA/DIV VOUT 5mV/DIV 5s/DIV 8330 F02 Figure 2. Burst Mode Operation Programming Input Turn-On and Turn-Off Thresholds with EN/UVLO Pin The EN/UVLO pin voltage controls whether the LT8330 is enabled or is in a shutdown state. A 1.6V reference and a comparator A6 with built-in hysteresis (typical 80mV) allow the user to accurately program the system input voltage at which the IC turns on and off (see the Block Diagram). The typical input falling and rising threshold voltages can be calculated by the following equations: VIN(FALLING,UVLO(-)) = 1.60 * (R3+R4)/R4 VIN(RISING, UVLO(+)) = 1.68 * (R3+R4)/R4 VIN current is reduced below 1A when the EN/UVLO pin voltage is less than 0.2V. The EN/UVLO pin can be connected directly to the input supply VIN for always-enabled operation. A logic input can also control the EN/UVLO pin. When operating in Burst Mode operation for light load currents, the current through the R3 and R4 network can easily be greater than the supply current consumed by the LT8330. Therefore, R3 and R4 should be large enough to minimize their effect on efficiency at light loads. Minimum Allowable Duty Cycle = Minimum On-Time(MAX) * fOSC(MAX) Maximum Allowable Duty Cycle = 1 - Minimum Off-Time(MAX) * fOSC(MAX) The required switch duty cycle range for a Boost converter operating in continuous conduction mode (CCM) can be calculated as: DMIN = 1- VIN(MAX)/(VOUT + VD) DMAX = 1- VIN(MIN)/(VOUT + VD) where VD is the diode forward voltage drop. If the above duty cycle calculations for a given application violate the minimum and/or maximum allowed duty cycles for the LT8330, operation in discontinuous conduction mode (DCM) might provide a solution. For the same VIN and VOUT levels, operation in DCM does not demand as low a duty cycle as in CCM. DCM also allows higher duty cycle operation than CCM. The additional advantage of DCM is the removal of the limitations to inductor value and duty cycle required to avoid sub-harmonic oscillations and the right half plane zero (RHPZ). While DCM provides these benefits, the trade-off is higher inductor peak current, lower available output power and reduced efficiency. 8330f For more information www.linear.com/LT8330 9 LT8330 Applications Information Setting the Output Voltage The output voltage is programmed with a resistor divider from the output to the FBX pin. Choose the resistor values for a positive output voltage according to: IL 500mA/DIV R1 = R2 * (VOUT /1.60V - 1) Choose the resistor values for a negative output voltage according to: VOUT 20V/DIV R1 = R2 * (|VOUT|/0.80V - 1) 500s/DIV The locations of R1 and R2 are shown in the Block Diagram. 1% resistors are recommended to maintain output voltage accuracy. Higher-value FBX divider resistors result in the lowest input quiescent current and highest light-load efficiency. FBX divider resistors R1 and R2 are usually in the range from 25k to 1M. Most applications use a phase-lead capacitor from VOUT to FBX in combination with high-value FBX divider resistors (see Compensation in the Applications Information section). Soft-Start The LT8330 contains several features to limit peak switch currents and output voltage (VOUT) overshoot during start-up or recovery from a fault condition. The primary purpose of these features is to prevent damage to external components or the load. High peak switch currents during start-up may occur in switching regulators. Since VOUT is far from its final value, the feedback loop is saturated and the regulator tries to charge the output capacitor as quickly as possible, resulting in large peak currents. A large surge current may cause inductor saturation or power switch failure. The LT8330 addresses this mechanism with an internal soft-start function. As shown in the Block Diagram, the soft-start function controls the ramp of the power switch current by controlling the ramp of VC through M2. This allows the output capacitor to be charged gradually toward its final value while limiting the start-up peak currents. Figure 3 shows the output voltage and supply current for the first page Typical Application. It can be seen that both the output voltage and supply current come up gradually. 10 8330 F03 Figure 3. Soft-Start Waveforms INTVCC undervoltage (INTVCC < 2.5V) and/or thermal lockout (TJ > 170C) will immediately prevent switching, will reset the internal soft-start function and will pull down VC. Once all faults are removed, the LT8330 will soft-start VC and hence inductor peak current. Frequency Foldback During start-up or fault conditions in which VOUT is very low, extremely small duty cycles may be required to maintain control of inductor peak current. The minimum on-time limitation of the power switch might prevent these low duty cycles from being achievable. In this scenario inductor current rise will exceed inductor current fall during each cycle, causing inductor current to `walk up' beyond the switch current limit. The LT8330 provides protection from this by folding back switching frequency whenever FBX pin is close to GND (low VOUT levels). This frequency foldback provides a larger switch-off time, allowing inductor current to fall enough each cycle (see Normalized Switching Frequency vs FBX Voltage in the Typical Performance Characteristics section). Thermal Lockout If the LT8330 die temperature reaches 170C (typical), the part will stop switching and go into thermal lockout. When the die temperature has dropped by 5C (nominal), the part will resume switching with a soft-started inductor peak current. 8330f For more information www.linear.com/LT8330 LT8330 Applications Information Switching Frequency and Inductor Selection The LT8330 switches at 2MHz, allowing small value inductors to be used. 0.68H to 10H will usually suffice. Choose an inductor that can handle at least 1.4A without saturating, and ensure that the inductor has a low DCR (copper-wire resistance) to minimize I2R power losses. Note that in some applications, the current handling requirements of the inductor can be lower, such as in the SEPIC topology where each inductor only carries one-half of the total switch current. For better efficiency, use similar valued inductors with a larger volume. Many different sizes and shapes are available from various manufacturers. Choose a core material that has low losses at 2MHz, such as a ferrite core. The final value chosen for the inductor should not allow peak inductor currents to exceed 1A in steady state at maximum load. Due to tolerances, be sure to account for minimum possible inductance value, switching frequency and converter efficiency. input voltage can ring to twice its nominal value, possibly exceeding the LT8330's voltage rating. This situation is easily avoided (see Application Note 88). Output Capacitor and Output Ripple Low ESR (equivalent series resistance) capacitors should be used at the output to minimize the output ripple voltage. Multilayer ceramic capacitors are an excellent choice, as they are small and have extremely low ESR. Use X5R or X7R types. This choice will provide low output ripple and good transient response. A 4.7F to 15F output capacitor is sufficient for most applications, but systems with very low output currents may need only a 1F or 2.2F output capacitor. Solid tantalum or OS-CON capacitor can be used, but they will occupy more board area than a ceramic and will have a higher ESR. Always use a capacitor with a sufficient voltage rating. Compensation Table 1. Inductor Manufacturers Sumida (847) 956-0666 www.sumida.com TDK (847) 803-6100 www.tdk.com Murata (714) 852-2001 www.murata.com Coilcraft (847) 639-6400 www.coilcraft.com Wurth (605) 886-4385 www.we-online.com Input Capacitor Bypass the input of the LT8330 circuit with a ceramic capacitor of X7R or X5R type placed as close as possible to the VIN and GND pins. Y5V types have poor performance over temperature and applied voltage, and should not be used. A 4.7F to 10F ceramic capacitor is adequate to bypass the LT8330 and will easily handle the ripple current. If the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be necessary. This can be provided with a low performance electrolytic capacitor. A precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the LT8330. A ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. If the LT8330 circuit is plugged into a live supply, the The LT8330 is internally compensated. The decision to use either low ESR (ceramic) capacitors or the higher ESR (tantalum or OS-CON) capacitors, for the output capacitor, can affect the stability of the overall system. The ESR of any capacitor, along with the capacitance itself, contributes a zero to the system. For the tantalum and OS-CON capacitors, this zero is located at a lower frequency due to the higher value of the ESR, while the zero of a ceramic capacitor is at a much higher frequency and can generally be ignored. A phase lead zero can be intentionally introduced by placing a capacitor in parallel with the resistor between VOUT and FBX. By choosing the appropriate values for the resistor and capacitor, the zero frequency can be designed to improve the phase margin of the overall converter. The typical target value for the zero frequency is between 30kHz to 60kHz. A practical approach to compensation is to start with one of the circuits in this data sheet that is similar to your application. Optimize performance by adjusting the output capacitor and/or the feed forward capacitor (connected across the feedback resistor from output to FBX pin). 8330f For more information www.linear.com/LT8330 11 LT8330 Applications Information Ceramic Capacitors Ceramic capacitors are small, robust and have very low ESR. However, ceramic capacitors can cause problems when used with the LT8330 due to their piezoelectric nature. When in Burst Mode operation, the LT8330's switching frequency depends on the load current, and at very light loads the LT8330 can excite the ceramic capacitor at audio frequencies, generating audible noise. Since the LT8330 operates at a lower current limit during Burst Mode operation, the noise is typically very quiet to a casual ear. If this is unacceptable, use a high performance tantalum or electrolytic capacitor at the output. Low noise ceramic capacitors are also available. Table 2. Ceramic Capacitor Manufacturers Taiyo Yuden (408) 573-4150 www.t-yuden.com AVX (803) 448-9411 www.avxcorp.com Murata (714) 852-2001 www.murata.com Diode Selection A Schottky diode is recommended for use with the LT8330. Low leakage Schottky diodes are necessary when low quiescent current is desired at low loads. The diode leakage appears as an equivalent load at the output and should be minimized. Choose Schottky diodes with sufficient reverse voltage ratings for the target applications. Table 3. Recommended Schottky Diodes PART NUMBER AVERAGE FORWARD REVERSE REVERSE CURRENT VOLTAGE CURRENT (mA) (V) (A) MANUFACTURER PMEG6010CEJ 1000 60 50 NXP PMEG6030EP 3000 60 200 NXP Layout Hints The high speed operation of the LT8330 demands careful attention to board layout. Careless layout will result in performance degradation. Figure 4a shows the recommended component placement for the ThinSOT package. Figure 4b shows the recommended component placement for the DFN package. Note the vias under the exposed pad. These should connect to a local ground plane for better thermal performance. VOUT C4 C1 L1 D1 R1 C2 GND 1 6 2 5 3 4 GND FB 1 8 2 7 3 6 4 5 C3 (VIN) R3 R2 VOUT (VIN) C2 VIN C1 D1 R1 C3 R4 C2 R4 FB R3 R2 VIN VOUT L1 VOUT 8330 F04a (a) 8330 F04b (b) Figure 4. Suggested Layout - (a) ThinSOT, (b) DFN 12 8330f For more information www.linear.com/LT8330 LT8330 Applications Information Thermal Considerations Care should be taken in the layout of the PCB to ensure good heat sinking of the LT8330. The DFN package has the best thermal performance due to an exposed pad (Pin 9) on the bottom of the package. This exposed pad must be soldered to a ground plane. Pin 5 of the DFN package (and Pin 2 of the TSOT package) should also be connected to a ground plane. The ground plane should be connected to large copper layers to spread heat dissipated by the LT8330 and to further reduce the thermal resistance (JA) values listed in the Pin Configuration section. Power dissipation within the LT8330 (PDISS_LT8330) can be estimated by subtracting the inductor and Schottky diode power losses from the total power losses calculated in an efficiency measurement. The junction temperature of LT8330 can then be estimated by, TJ (LT8330) = TA + JA * PDISS_LT8330 voltage (VOUT), the input voltage (VIN) and the diode forward voltage (VD). The maximum duty cycle (DMAX) occurs when the converter operates at the minimum input voltage: VOUT + VD VIN(MIN) + VOUT + VD DMAX = Conversely, the minimum duty cycle (DMIN) occurs when the converter operates at the maximum input voltage: DMIN = VOUT + VD VIN(MAX) + VOUT + VD Be sure to check that DMAX and DMIN obey: DMAX < 1-Minimum Off-Time(MAX) * fOSC(MAX) and DMIN > Minimum On-Time(MAX) * fOSC(MAX) Additional Topologies : SEPIC and Inverting In addition to the Boost topology, the LT8330 can be configured in a SEPIC or Inverting topology. SEPIC and Inverting converters are analyzed below. SEPIC Converter Applications The LT8330 can be configured as a SEPIC (single-ended primary inductance converter), as shown in Figure 5. This topology allows for the input to be higher, equal, or lower than the desired output voltage. The conversion ratio as a function of duty cycle is: where Minimum Off-Time, Minimum On-Time and fOSC are specified in the Electrical Characteristics table. SEPIC Converter: The Maximum Output Current Capability and Inductor Selection As shown in Figure 5, the SEPIC converter contains two inductors: L1 and L2. L1 and L2 can be independent, but can CDC L1 D1 VIN VOUT CIN VOUT + VD D = VIN 1-D L2 VIN COUT SW LT8330 EN/UVLO in continuous conduction mode (CCM). In a SEPIC converter, no DC path exists between the input and output. This is an advantage over the boost converter for applications requiring the output to be disconnected from the input source when the circuit is in shutdown. INTVCC FBX GND 8330 F05 Figure 5. LT8330 Configured in a SEPIC Topology SEPIC Converter: Switch Duty Cycle and Frequency For a SEPIC converter operating in CCM, the duty cycle of the main switch can be calculated based on the output 8330f For more information www.linear.com/LT8330 13 LT8330 Applications Information also be wound on the same core, since identical voltages are applied to L1 and L2 throughout the switching cycle. The inductor ripple currents IL1 and IL2 are identical: For the SEPIC topology, the current through L1 is the converter input current. Based on the fact that, ideally, the output power is equal to the input power, the maximum average inductor currents of L1 and L2 are: The inductor ripple current has a direct effect on the choice of the inductor value. Choosing smaller values of IL requires large inductances and reduces the current loop gain (the converter will approach voltage mode). Accepting larger values of IL allows the use of low inductances, but results in higher input current ripple and greater core losses. It is recommended that c falls in the range of 0.2 to 0.6. IL1(MAX)(AVE) = IIN(MAX)(AVE) = IO(MAX) * DMAX 1-DMAX IL2(MAX)(AVE) = IO(MAX) In a SEPIC converter, the switch current is equal to IL1 + IL2 when the power switch is on, therefore, the maximum average switch current is defined as: ISW(MAX)(AVE) = IL1(MAX)(AVE) +IL2(MAX)(AVE) = IO(MAX) * 1 1-DMAX Given an operating input voltage range, and having chosen ripple current in the inductor, the inductor value (L1 and L2 are independent) of the SEPIC converter can be determined using the following equation: c 1 ISW(PEAK) = 1+ *IO(MAX) * 2 1-DMAX The constant c in the preceding equations represents the percentage peak-to-peak ripple current in the switch, relative to ISW(MAX)(AVE), as shown in Figure 6. Then, the switch ripple current ISW can be calculated by: ISW = c * ISW(MAX)(AVE) ISW = * ISW(MAX)(AVE) t DTS L1= L2 = TS 8330 F06 Figure 6. The Switch Current Waveform of the SEPIC Converter VIN(MIN) 0.5 * ISW * fOSC * DMAX For most SEPIC applications, the equal inductor values will fall in the range of 1H to 47H. By making L1 = L2, and winding them on the same core, the value of inductance in the preceding equation is replaced by 2L, due to mutual inductance: L= ISW(MAX)(AVE) 14 Due to the current limit of its internal power switch, the LT8330 should be used in a SEPIC converter whose maximum output current (IO(MAX)) is less than the output current capability by a sufficient margin (10% or higher is recommended): IO(MAX) < (1 - DMAX) * (1A - 0.5 * ISW) * (0.9) and the peak switch current is: ISW IL1 = IL2 = 0.5 * ISW VIN(MIN) ISW * fOSC * DMAX This maintains the same ripple current and energy storage in the inductors. The peak inductor currents are: IL1(PEAK) = IL1(MAX) + 0.5 * IL1 IL2(PEAK) = IL2(MAX) + 0.5 * IL2 The maximum RMS inductor currents are approximately equal to the maximum average inductor currents. 8330f For more information www.linear.com/LT8330 LT8330 Applications Information Based on the preceding equations, the user should choose the inductors having sufficient saturation and RMS current ratings. A low ESR and ESL, X5R or X7R ceramic capacitor works well for CDC. Inverting Converter Applications SEPIC Converter: Output Diode Selection To maximize efficiency, a fast switching diode with a low forward drop and low reverse leakage is desirable. The average forward current in normal operation is equal to the output current. It is recommended that the peak repetitive reverse voltage rating VRRM is higher than VOUT + VIN(MAX) by a safety margin (a 10V safety margin is usually sufficient). The power dissipated by the diode is: The LT8330 can be configured as a dual-inductor inverting topology, as shown in Figure 7. The VOUT to VIN ratio is: VOUT - VD D =- VIN 1-D in continuous conduction mode (CCM). CDC L1 VIN + PD = IO(MAX) * VD + CIN SW where VD is diode's forward voltage drop, and the diode junction temperature is: LT8330 GND TJ = TA + PD * RJA The RJA used in this equation normally includes the RJC for the device, plus the thermal resistance from the board, to the ambient temperature in the enclosure. TJ must not exceed the diode maximum junction temperature rating. SEPIC Converter: Output and Input Capacitor Selection The selections of the output and input capacitors of the SEPIC converter are similar to those of the boost converter. SEPIC Converter: Selecting the DC Coupling Capacitor The DC voltage rating of the DC coupling capacitor (CDC, as shown in Figure 5) should be larger than the maximum input voltage: VCDC > VIN(MAX) CDC has nearly a rectangular current waveform. During the switch off-time, the current through CDC is IIN, while approximately -IO flows during the on-time. The RMS rating of the coupling capacitor is determined by the following equation: IRMS(CDC) > IO(MAX) * L2 - - COUT D1 VOUT + + 8330 F07 Figure 7. A Simplified Inverting Converter Inverting Converter: Switch Duty Cycle and Frequency For an inverting converter operating in CCM, the duty cycle of the main switch can be calculated based on the negative output voltage (VOUT) and the input voltage (VIN). The maximum duty cycle (DMAX) occurs when the converter has the minimum input voltage: DMAX = VOUT - VD VOUT - VD - VIN(MIN) Conversely, the minimum duty cycle (DMIN) occurs when the converter operates at the maximum input voltage : DMIN = VOUT - VD VOUT - VD - VIN(MAX) VOUT + VD VIN(MIN) 8330f For more information www.linear.com/LT8330 15 LT8330 Applications Information Be sure to check that DMAX and DMIN obey : DMAX < 1-Minimum Off-Time(MAX) * fOSC(MAX) and DMIN > Minimum On-Time(MAX) * fOSC(MAX) where Minimum Off-Time, Minimum On-Time and fOSC are specified in the Electrical Characteristics table. Inverting Converter: Inductor, Output Diode and Input Capacitor Selections The selections of the inductor, output diode and input capacitor of an inverting converter are similar to those of the SEPIC converter. Please refer to the corresponding SEPIC converter sections. Inverting Converter: Output Capacitor Selection The inverting converter requires much smaller output capacitors than those of the boost, flyback and SEPIC converters for similar output ripples. This is due to the fact that, in the inverting converter, the inductor L2 is in series with the output, and the ripple current flowing through the output capacitors are continuous. The output ripple voltage is produced by the ripple current of L2 flowing through the ESR and bulk capacitance of the output capacitor: 1 VOUT(P - P) = IL2 * ESRCOUT + 8 * f * COUT 16 After specifying the maximum output ripple, the user can select the output capacitors according to the preceding equation. The ESR can be minimized by using high quality X5R or X7R dielectric ceramic capacitors. In many applications, ceramic capacitors are sufficient to limit the output voltage ripple. The RMS ripple current rating of the output capacitor needs to be greater than: IRMS(COUT) > 0.3 * IL2 Inverting Converter: Selecting the DC Coupling Capacitor The DC voltage rating of the DC coupling capacitor (CDC, as shown in Figure 7) should be larger than the maximum input voltage minus the output voltage (negative voltage): VCDC > VIN(MAX) - VOUT CDC has nearly a rectangular current waveform. During the switch off-time, the current through CDC is IIN, while approximately -IO flows during the on-time. The RMS rating of the coupling capacitor is determined by the following equation: IRMS(CDC) > IO(MAX) * DMAX 1-DMAX A low ESR and ESL, X5R or X7R ceramic capacitor works well for CDC. 8330f For more information www.linear.com/LT8330 LT8330 Typical Applications 48V Boost Converter C1 4.7F VIN 100 D1 C3 4.7F SW VOUT 48V 135mA 90 EFFICIENCY (%) VIN 12V L1 6.8H Efficiency LT8330 R1 1M EN/UVLO FBX GND INTVCC R2 34.8k C2 1F D1: NXP PMEG6010CEJ L1: WURTH WE-MAPI 3015 74438335068 C3: MURATA GRM32ER71H475k C4 4.7pF 80 70 60 50 8330 TA02 BOOST: VOUT = 48V VIN = 12V 0 40 80 120 LOAD CURRENT (mA) 160 8330 TA02b 8V to 16V Input, 24V Boost Converter 100 L1 6.8H C1 4.7F R3 1M R4 287k VIN D1 SW LT8330 EN/UVLO R1 1M FBX GND INTVCC C4 4.7pF 90 80 70 BOOST : VOUT = 24V R2 71.5k C2 1F D1: DIODES INC. SBR140S3 L1: WURTH WE-MAPI 3015 74438335068 C3: MURATA GRM32ER71H475k VOUT 24V C3 4.7F 210mA AT VIN = 8V 320mA AT VIN = 12V 450mA AT VIN = 16V EFFICIENCY (%) VIN 8V TO 16V Efficiency 60 50 8330 TA03 VIN = 8V VIN = 12V VIN = 16V 0 100 200 300 400 LOAD CURRENT (mA) 500 8330 TA03b 3V to 6V Input, 48V Boost Converter 100 L1 0.68H C1 4.7F VIN D1 VOUT 48V C3 4.7F 12mA AT VIN = 3V 13mA AT VIN = 5V 14mA AT VIN = 6V SW LT8330 R1 1M EN/UVLO INTVCC D1: NXP PMEG6010CEJ L1: WURTH WE-MAPI 3012 744383340068 C3: MURATA GRM32ER71H475k C2 1F FBX GND R2 34.8k 90 80 EFFICIENCY (%) VIN 3V TO 6V Efficiency 70 60 50 40 30 BOOST : VOUT = 48V 20 VIN = 3V VIN = 5V VIN = 6V 10 8330 TA04 0 0 2 4 6 8 10 12 LOAD CURRENT (mA) 14 16 8330 TA04b 8330f For more information www.linear.com/LT8330 17 LT8330 Typical Applications 3V to 6V Input, 24V Boost Converter 100 L1 0.68H C1 4.7F VIN D1 C3 4.7F SW LT8330 EN/UVLO 80 R1 1M FBX GND INTVCC 90 VOUT 24V 30mA AT V IN = 3V 34mA AT V IN = 5V 35mA AT V IN = 6V EFFICIENCY (%) VIN 3V TO 6V Efficiency 60 50 R2 71.5k C2 1F 70 BOOST : VOUT = 24V VIN = 3V VIN = 5V VIN = 6V 40 D1: NXP PMEG6010CEJ L1: WURTH WE-MAPI 3012 744383340068 C3: MURATA GRM32ER71H475k 30 8330 TA05 0 4 8 12 16 20 24 28 32 36 40 LOAD CURRENT (mA) 8330 TA05b 8V to 30V Input, 24V SEPIC Converter VIN 8V TO 30V C1 4.7F VOUT 24V C3 4.7F 160mA AT V IN = 8V 200mA AT V IN = 12V x2 250mA AT V IN = 24V 250mA AT V IN = 30V L2 6.8H R3 1M VIN SW LT8330 EN/UVLO R4 287k INTVCC D1: NXP PMEG6010CEJ L1: WURTH WE-TDC 8038 74489440068 C3: MURATA GRM32ER71H475k 18 100 D1 C2 1F FBX GND R1 1M C4 4.7pF 90 EFFICIENCY (%) C5 1F L1 6.8H Efficiency 80 70 SEPIC: VOUT = 24V VIN = 8V VIN = 12V VIN = 24V VIN = 30V 60 R2 71.5k 50 8330 TA06 0 60 120 180 240 LOAD CURRENT (mA) 300 8330 TA06b 8330f For more information www.linear.com/LT8330 LT8330 Typical Applications 4V to 36V Input, 12V SEPIC Converter VIN 4V TO 36V C1 4.7F 100 D1 VOUT 12V C3 4.7F 170mA AT VIN = 4V 270mA AT VIN = 12V x2 280mA AT VIN = 24V 280mA AT VIN = 36V L2 4.7H R3 1M R4 806k VIN SW LT8330 EN/UVLO R1 1M FBX GND INTVCC 80 70 SEPIC: V OUT = 12V VIN = 4V VIN = 12V VIN = 24V VIN = 36V 60 R2 154k C2 1F D1: NXP PMEG6010CEJ L1: WURTH WE-TDC 8038 74489440047 C3: MURATA GRM31CR61C475k C4 4.7pF 90 EFFICIENCY (%) C5 1F L1 4.7H Efficiency 50 0 60 C1 4.7F Efficiency 100 D1 VOUT 5V C3 4.7F 280mA AT VIN = 4V 300mA AT VIN = 5V 380mA AT VIN = 12V 380mA AT VIN = 16V L2 2.7H R3 1M VIN SW LT8330 EN/UVLO R4 806k INTVCC D1: NXP PMEG6010CEJ L1: WURTH WE-TDC 8018 74489430027 C3: MURATA GRM21BR71C475k C2 1F R1 1M FBX GND C4 4.7pF 90 EFFICIENCY (%) C5 1F L1 2.7H 300 8330 TA07b 8330 TA07 4V to 16V Input, 5V SEPIC Converter VIN 4V TO 16V 120 180 240 LOAD CURRENT (mA) 80 70 SEPIC: VOUT = 5V VIN = 4V VIN = 5V VIN = 12V VIN = 16V 60 R2 464k 50 0 80 160 240 320 LOAD CURRENT (mA) 400 8330 TA08b 8330 TA08 8330f For more information www.linear.com/LT8330 19 LT8330 Typical Applications 8V to 30V Input, -24V Inverting Converter C1 4.7F 100 L2 6.8H C3 2.2F D1 R3 1M VIN SW VOUT -24V 160mA AT VIN = 8V 200mA AT VIN = 12V 250mA AT VIN = 24V 250mA AT VIN = 30V LT8330 EN/UVLO R4 287k INTVCC D1: NXP PMEG6010CEJ L1: WURTH WE-TDC 8038 74489440068 C3: MURATA GRM32ER71H475k R1 1M FBX GND C4 4.7pF 90 EFFICIENCY (%) VIN 8V TO 30V C5 1F L1 6.8H Efficiency 70 INVERTING: VOUT = -24V VIN = 8V VIN = 12V VIN = 24V VIN = 30V 60 R2 34.8k C2 1F 80 50 0 60 C1 4.7F 100 L2 4.7H VOUT -12V C3 4.7F 170mA AT VIN = 4V 270mA AT VIN = 12V 280mA AT VIN = 24V 280mA AT VIN = 36V D1 R3 1M VIN SW LT8330 EN/UVLO R4 806k INTVCC D1: NXP PMEG6010CEJ L1: Coilcraft LPD5030-472MR C3: MURATA GRM21BR71C475k 20 Efficiency C2 1F FBX GND R1 1M C4 4.7pF 90 EFFICIENCY (%) C5 1F L1 4.7H 300 8330 TA09b 8330 TA09 4V to 36V Input, -12V Inverting Converter VIN 4V TO 36V 120 180 240 LOAD CURRENT (mA) 80 70 INVERTING : VOUT = -12V VIN=4V VIN=12V VIN=24V VIN=36V 60 R2 71.5k 50 8330 TA10 0 60 120 180 240 LOAD CURRENT (mA) 300 8330 TA10b 8330f For more information www.linear.com/LT8330 LT8330 Typical Applications 4V to 16V Input, -5V Inverting Converter VIN 4V TO 16V C1 4.7F 100 L2 2.7H VOUT -5V C3 280mA AT VIN = 4V 4.7F 300mA AT VIN = 5V 380mA AT VIN = 12V 380mA AT VIN = 16V D1 R3 1M VIN SW LT8330 EN/UVLO R4 806k INTVCC D1: NXP PMEG6010CEJ L1: WURTH WE-TDC 8018 74489430027 C3: MURATA GRM21BR71C475k C2 1F FBX GND R1 1M C4 4.7pF 90 EFFICIENCY (%) C5 1F L1 2.7H Efficiency 80 70 INVERTING: VOUT = -5V VIN = 4V VIN = 5V VIN = 12V VIN = 16V 60 R2 191k 50 8330 TA11 0 80 160 240 320 LOAD CURRENT (mA) 400 8330 TA11b 8330f For more information www.linear.com/LT8330 21 LT8330 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DDB Package 8-Lead Plastic DFN (3mm x 2mm) DDB Package (Reference LTC DWG 05-08-1702 Rev B) 8-Lead Plastic DFN# (3mm x 2mm) (Reference LTC DWG # 05-08-1702 Rev B) 0.61 0.05 (2 SIDES) 0.70 0.05 2.55 0.05 1.15 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.20 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 3.00 0.10 (2 SIDES) R = 0.115 TYP 5 R = 0.05 TYP 0.40 0.10 8 2.00 0.10 (2 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) 0.56 0.05 (2 SIDES) 0.200 REF 0.75 0.05 0 - 0.05 4 0.25 0.05 1 PIN 1 R = 0.20 OR 0.25 x 45 CHAMFER (DDB8) DFN 0905 REV B 0.50 BSC 2.15 0.05 (2 SIDES) BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 22 8330f For more information www.linear.com/LT8330 LT8330 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S6 Package 6-Lead Plastic TSOT-23 (ReferenceS6 LTCPackage DWG # 05-08-1636) 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 0.62 MAX 2.90 BSC (NOTE 4) 0.95 REF 1.22 REF 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC 1.50 - 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.30 - 0.45 6 PLCS (NOTE 3) 0.95 BSC 0.80 - 0.90 0.20 BSC 0.01 - 0.10 1.00 MAX DATUM `A' 0.30 - 0.50 REF 0.09 - 0.20 (NOTE 3) 1.90 BSC NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 S6 TSOT-23 0302 8330f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT8330 23 LT8330 Typical Application 8V to 40V Input, 15V Converter Efficiency C6 1F 100 D2 L1C 6H L1A 6H VIN 8V TO 40V C5 1F C1 4.7F R4 287k VIN L1B 6H C3 4.7F -VOUT -15V INTVCC 80 70 50 R1 1M FBX GND C2 1F +VOUT = +15V -VOUT = -15V 60 SW LT8330 EN/UVLO D1, D2: NXP PMEG6010CEJ L1A, L1B, L1C: COILTRONICS VP4-0075 C3, C4: MURATA GRM32ER71H475k 90 120mA AT VIN = 8V LOAD 160mA AT VIN = 24V 170mA AT VIN = 40V D1 R3 1M +VOUT +15V EFFICIENCY (%) C4 4.7F VIN = 8V VIN = 24V VIN = 40V 0 40 80 120 160 LOAD CURRENT (mA) 200 8330 TA12b R2 56.2k 8330 TA12 Related Parts PART NUMBER DESCRIPTION COMMENTS LT1930/LT1930A 1A (ISW), 1.2MHz/2.2MHz High Efficiency Step-Up DC/DC Converter VIN = 2.6V to 16V, VOUT(MAX) = 34V, IQ = 4.2mA/5.5mA, ISD < 1A, ThinSOT Package LT1935 2A (ISW), 40V, 1.2MHz High Efficiency Step-Up DC/DC Converter VIN = 2.3V to 16V, VOUT(MAX) = 38V, IQ = 3mA, ISD < 1A, ThinSOT Package LT3467 1.1A (ISW), 1.3MHz High Efficiency Step-Up DC/DC Converter VIN = 2.4V to 16V, VOUT(MAX) = 40V, IQ = 1.2mA, ISD < 1A, ThinSOT, 2mm x 3mm DFN Packages LT3580 2A (ISW), 42V, 2.5MHz, High Efficiency Step-Up DC/DC Converter VIN = 2.5V to 32V, VOUT(MAX) = 42V, IQ = 1mA, ISD = <1A, 3mm x 3mm DFN-8, MSOP-8E LT8494 70V, 2A Boost/SEPIC 1.5MHz High Efficiency Step-Up DC/DC Converter VIN = 1V to 60V (2.5V to 32V Start-Up), VOUT(MAX) = 70V, IQ = 3A (Burst Mode operation), ISD = <1A, 20-Lead TSSOP LT8570/LT8570-1 65V, 500mA/250mA Boost/Inverting DC/DC Converter VIN(MIN) = 2.55V, VIN(MAX) = 40V, VOUT(MAX) = 60V, IQ = 1.2mA, ISD = <1mA, 3mm x 3mm DFN-8, MSOP-8E LT8580 1A (ISW), 65V 1.5MHz, High Efficiency Step-Up DC/DC Converter VIN: 2.55V to 40V, VOUT(MAX) = 65V, IQ = 1.2mA, ISD = <1A, 3mm x 3mm DFN-8, MSOP-8E 24 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT8330 (408) 432-1900 FAX: (408) 434-0507 www.linear.com/LT8330 8330f LT 0715 * PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2015