LP2950ACZ-5.0/LFT7 - NATIONAL SEMICONDUCTOR

LP2950,LP2951

LP2950/LP2951 Series of Adjustable Micropower Voltage Regulators

Literature Number: SNVS764M

LP2950/LP2951

August 20, 2011

Series of Adjustable Micropower Voltage Regulators

General Description

The LP2950 and LP2951 are micropower voltage regulators

with very low quiescent current (75μA typ.) and very low

dropout voltage (typ. 40mV at light loads and 380mV at

100mA). They are ideally suited for use in battery-powered

systems. Furthermore, the quiescent current of the LP2950/

LP2951 increases only slightly in dropout, prolonging battery

life.

The LP2950-5.0 is available in the surface-mount D-Pak

package, and in the popular 3-pin TO-92 package for pin-

compatibility with older 5V regulators. The 8-lead LP2951 is

available in plastic, ceramic dual-in-line, LLP, or metal can

packages and offers additional system functions.

One such feature is an error flag output which warns of a low

output voltage, often due to falling batteries on the input. It

may be used for a power-on reset. A second feature is the

logic-compatible shutdown input which enables the regulator

to be switched on and off. Also, the part may be pin-strapped

for a 5V, 3V, or 3.3V output (depending on the version), or

programmed from 1.24V to 29V with an external pair of re-

sistors.

Careful design of the LP2950/LP2951 has minimized all con-

tributions to the error budget. This includes a tight initial

tolerance (.5% typ.), extremely good load and line regulation

(.05% typ.) and a very low output voltage temperature coef-

ficient, making the part useful as a low-power voltage refer-

ence.

Features

■5V, 3V, and 3.3V versions available

■High accuracy output voltage

■Guaranteed 100mA output current

■Extremely low quiescent current

■Low dropout voltage

■Extremely tight load and line regulation

■Very low temperature coefficient

■Use as Regulator or Reference

■Needs minimum capacitance for stability

■Current and Thermal Limiting

■Stable with low-ESR output capacitors (10mΩ to 6Ω)

LP2951 versions only

■Error flag warns of output dropout

■Logic-controlled electronic shutdown

■Output programmable from 1.24 to 29V

Block Diagram and Typical Applications

LP2950

854625

LP2950/LP2951 Series of Adjustable Micropower Voltage Regulators

LP2951

854601

Connection Diagrams

TO-92 Plastic Package (Z)

854602

Bottom View

Dual-In-Line Packages (N, J)

Surface-Mount Package (M, MM)

854626

Top View

Metal Can Package (H)

854619

Top View

10-Lead Ceramic Surface-Mount Package (WG)

854664

Top View

TO-252 (D-Pak)

854670

Front View

8-Lead LLP

854671

Connect DAP to GND at device pin 4.

Top View

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LP2950/LP2951

Ordering Information

Package Temperature

Range VOUT

Part

Number

Package

Marking

Transport

Media

NSC

Drawing

TO-92

(Z)

−40 < TJ < 125 3.0 LP2950ACZ-3.0 2950A CZ3.0 Bag Z03A

LP2950CZ-3.0 2950 CZ3.0 Bag

3.3 LP2950ACZ-3.3 2950A CZ3.3 Bag

LP2950CZ-3.3 2950 CZ3.3 Bag

5.0 LP2950ACZ-5.0 2950A CZ5.0 Bag

LP2950CZ-5.0 2950 CZ5.0 Bag

TO-252

(D-Pak)

−40 < TJ < 125 3.0 LP2950CDT-3.0 LP2950CDT-3.0 75 Units/Rail TD03B

LP2950CDTX-3.0 2.5k Units Tape and Reel

3.3 LP2950CDT-3.3 LP2950CDT-3.3 75 Units/Rail

LP2950CDTX-3.3 2.5k Units Tape and Reel

5.0 LP2950CDT-5.0 LP2950CDT-5.0 75 Units/Rail

LP2950CDTX-5.0 2.5k Units Tape and Reel

(N-08E)

−40 < TJ < 125 3.0 LP2951ACN-3.0 LP2951ACN-3.0 40 Units/Rail N08E

LP2951CN-3.0 LP2951CN-3.0 40 Units/Rail

3.3 LP2951ACN-3.3 LP2951ACN-3.3 40 Units/Rail

LP2951CN-3.3 LP2951CN-3.3 40 Units/Rail

5.0 LP2951ACN LP2951ACN 40 Units/Rail

LP2951CN LP2951CN 40 Units/Rail

(M08A)

−40 < TJ < 125 3.0 LP2951ACM-3.0 2951ACM30*

(where * is die rev letter)

95 Units/Rail M08A

LP2951ACMX-3.0 2.5k Units Tape and Reel

LP2951CM-3.0 2951CM30*

(where * is die rev letter)

95 Units/Rail

LP2951CMX-3.0 2.5k Units Tape and Reel

3.3 LP2951ACM-3.3 2951ACM33*

(where * is die rev letter)

95 Units/Rail

LP2951ACMX-3.3 2.5k Units Tape and Reel

LP2951CM-3.3 2951CM33*

(where * is die rev letter)

95 Units/Rail

LP2951CMX-3.3 2.5k Units Tape and Reel

5.0 LP2951ACM 2951ACM*

(where * is die rev letter)

95 Units/Rail

LP2951ACMX 2.5k Units Tape and Reel

LP2951CM 2951CM*

(where * is die rev letter)

95 Units/Rail

LP2951CMX 2.5k Units Tape and Reel

(MUA08A)

−40 < TJ < 125 3.0 LP2951ACMM-3.0 L0BA 1k Units Tape and Reel MUA08A

LP2951ACMMX-3.0 3.5k Units Tape and Reel

LP2951CMM-3.0 L0BB 1k Units Tape and Reel

LP2951CMMX-3.0 3.5k Units Tape and Reel

3.3 LP2951ACMM-3.3 L0CA 1k Units Tape and Reel

LP2951ACMMX-3.3 3.5k Units Tape and Reel

LP2951CMM-3.3 L0CB 1k Units Tape and Reel

LP2951CMMX-3.3 3.5k Units Tape and Reel

5.0 LP2951ACMM L0DA 1k Units Tape and Reel

LP2951ACMMX 3.5k Units Tape and Reel

LP2951CMM L0DB 1k Units Tape and Reel

LP2951CMMX 3.5k Units Tape and Reel

(J08A)

−55 < TJ < 150 5.0 LP2951J/883 See MIL/AERO Datasheet 40 Units/Rail J08A

(H08C)

−55 < TJ < 150 5.0 LP2951H/883 See MIL/AERO Datasheet Tray H08C

(WG10A)

−55 < TJ < 150 5.0 LP2951WG/883 See MIL/AERO Datasheet Tray WG10A

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LP2950/LP2951

Package Temperature

Range VOUT

Part

Number

Package

Marking

Transport

Media

NSC

Drawing

8-lead LLP −40 < TJ < 125 3.0 LP2951ACSD-3.0 51AC30 1k Units Tape and Reel SDC08A

LP2951ACSDX-3.0 4.5k Units Tape and Reel

LP2951CSD-3.0 51AC30B 1k Units Tape and Reel

LP2951CSDX-3.0 4.5k Units Tape and Reel

3.3 LP2951ACSD-3.3 51AC33 1k Units Tape and Reel

LP2951ACSDX-3.3 4.5k Units Tape and Reel

LP2951CSD-3.3 51AC33B 1k Units Tape and Reel

LP2951CSDX-3.3 4.5k Units Tape and Reel

5.0 LP2951ACSD 2951AC 1k Units Tape and Reel

LP2951ACSDX 4.5k Units Tape and Reel

LP2951CSD 2951ACB 1k Units Tape and Reel

LP2951CSDX 4.5k Units Tape and Reel

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LP2950/LP2951

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Input Supply Voltage −0.3 to +30V

SHUTDOWN Input Voltage,

Error Comparator Output

Voltage, (Note 9)

FEEDBACK Input Voltage −1.5 to +30V

(Note 9, Note 10)

Power Dissipation Internally Limited

Junction Temperature (TJ)+150°C

Ambient Storage Temperature −65° to +150°C

Soldering Dwell Time, Temperature

Wave

Infrared

Vapor Phase

4 seconds, 260°C

10 seconds, 240°C

75 seconds, 219°C

ESD Rating

Human Body Model(Note 18) 2500V

Operating Ratings (Note 1)

Maximum Input Supply Voltage 30V

Junction Temperature Range

(TJ) (Note 8)

LP2950AC-XX, LP2950C-XX −40° to +125°C

LP2951 −55° to +150°C

LP2951AC-XX, LP2951C-XX −40° to +125°C

Electrical Characteristics (Note 2)

Parameter Conditions

(Note 2)

LP2951 LP2950AC-XX LP2950C-XX

Units

LP2951AC-XX LP2951C-XX

Tested Tested Design Tested Design

Typ Limit Typ Limit Limit Typ Limit Limit

(Note 3)

(Note 16)

(Note 3) (Note 4) (Note 3) (Note 4)

3V Versions (Note 17)

Output Voltage TJ = 25°C 3.0 3.015 3.0 3.015 3.0 3.030 V max

2.985 2.985 2.970 V min

−25°C ≤ TJ ≤ 85°C 3.0 3.0 3.030 3.0 3.045 V max

2.970 2.955 V min

Full Operating 3.0 3.036 3.0 3.036 3.0 3.060 V max

Temperature Range 2.964 2.964 2.940 V min

Output Voltage 100μA ≤ IL ≤ 100mA 3.0 3.045 3.0 3.042 3.0 3.072 V max

TJ ≤ TJMAX 2.955 2.958 2.928 V min

3.3V Versions (Note 17)

Output Voltage TJ = 25°C 3.3 3.317 3.3 3.317 3.3 3.333 V max

3.284 3.284 3.267 V min

−25°C ≤ TJ ≤ 85°C 3.3 3.3 3.333 3.3 3.350 V max

3.267 3.251 V min

Full Operating 3.3 3.340 3.3 3.340 3.3 3.366 V max

Temperature Range 3.260 3.260 3.234 V min

Output Voltage 100μA ≤ IL ≤ 100mA 3.3 3.350 3.3 3.346 3.3 3.379 V max

TJ ≤ TJMAX 3.251 3.254 3.221 V min

5V Versions (Note 17)

Output Voltage TJ = 25°C 5.0 5.025 5.0 5.025 5.0 5.05 V max

4.975 4.975 4.95 V min

−25°C ≤ TJ ≤ 85°C 5.0 5.0 5.05 5.0 5.075 V max

4.95 4.925 V min

Full Operating 5.0 5.06 5.0 5.06 5.0 5.1 V max

Temperature Range 4.94 4.94 4.9 V min

Output Voltage 100μA ≤ IL ≤ 100mA 5.0 5.075 5.0 5.075 5.0 5.12 V max

TJ ≤ TJMAX 4.925 4.925 4.88 V min

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LP2950/LP2951

Parameter Conditions

(Note 2)

LP2951 LP2950AC-XX LP2950C-XX

Units

LP2951AC-XX LP2951C-XX

Tested Tested Design Tested Design

Typ Limit Typ Limit Limit Typ Limit Limit

(Note 3)

(Note 16)

(Note 3) (Note 4) (Note 3) (Note 4)

All Voltage Options

Output Voltage

Temperature

Coefficient

(Note 12)20 120 20 100 50 150 ppm/°C

Line Regulation

(Note 14)

(VONOM + 1)V ≤ Vin

≤ 30V (Note 15)

0.03 0.1 0.03 0.1 0.04 0.2 % max

0.5 0.2 0.4 % max

Load Regulation

(Note 14)

100μA ≤ IL ≤ 100mA 0.04 0.1 0.04 0.1 0.1 0.2 % max

0.3 0.2 0.3 % max

Dropout Voltage

(Note 5)

IL = 100μA 80 80 80 mV max

50 150 50 150 50 150 mV max

IL = 100mA 450 450 450 mV max

380 600 380 600 380 600 mV max

Ground IL = 100μA75 120 75 120 75 120 μA max

Current 140 140 140 μA max

IL = 100mA 8 12 8 12 8 12 mA max

14 14 14 mA max

Dropout Vin = (VONOM − 0.5)

110 170 110 170 110 170 μA max

Ground Current IL = 100μA 200 200 200 μA max

Current Limit Vout = 0 160 200 160 200 160 200 mA max

220 220 220 mA max

Thermal Regulation (Note 13) 0.05 0.2 0.05 0.2 0.05 0.2 %/W

max

Output Noise, CL = 1μF (5V Only) 430 430 430 μV rms

10 Hz to 100 kHz CL = 200μF160 160 160 μV rms

CL = 3.3μF

(Bypass = 0.01μF100 100 100 μV rms

Pins 7 to 1 (LP2951)

8-pin Versions Only LP2951 LP2951AC-XX LP2951C-XX

Reference 1.23

1.25 1.23

1.26 V max

Voltage 1.26 1.26 1.27 V max

1.22 1.22 1.21 V min

1.2 1.2 1.2 V min

Reference (Note 7) 1.27 1.27 1.285 V max

Voltage 1.19 1.19 1.185 V min

Feedback Pin 20 40 20 40 20 40 nA max

Bias Current 60 60 60 nA max

Reference Voltage (Note 12) 20 20 50 ppm/°C

Temperature

Coefficient

Feedback Pin Bias 0.1 0.1 0.1 nA/°C

Current Temperature

Coefficient

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LP2950/LP2951

Parameter Conditions

(Note 2)

LP2951 LP2950AC-XX LP2950C-XX

Units

LP2951AC-XX LP2951C-XX

Tested Tested Design Tested Design

Typ Limit Typ Limit Limit Typ Limit Limit

(Note 3)

(Note 16)

(Note 3) (Note 4) (Note 3) (Note 4)

Error Comparator

Output Leakage VOH = 30V 0.01 1 0.01 1 0.01 1 μA max

Current 2 2 2μA max

Output Low Vin = (VONOM − 0.5)

150 250 150 250 150 250 mV max

Voltage IOL = 400μA 400 400 400 mV max

Upper Threshold (Note 6) 60 40 60 40 60 40 mV min

Voltage 25 25 25 mV min

Lower Threshold (Note 6) 75 95 75 95 75 95 mV max

Voltage 140 140 140 mV max

Hysteresis (Note 6) 15 15 15 mV

Shutdown Input

Input 1.3 1.3 1.3 V

Logic Low (Regulator ON) 0.6 0.7 0.7 V max

Voltage High (Regulator

OFF)

2.0 2.0 2.0 V min

Shutdown Pin Input

Current

Vshutdown = 2.4V 30 50 30 50 30 50 μA max

100 100 100 μA max

Vshutdown = 30V 450 600 450 600 450 600 μA max

750 750 750 μA max

Regulator Output

Current in Shutdown

(Note 11) 3 10 3 10 3 10 μA max

20 20 20 μA max

Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the

device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the

Electrical Characteristics tables.

Note 2: Unless otherwise specified all limits guaranteed for VIN = (VONOM + 1)V, IL = 100μA and CL = 1μF for 5V versions and 2.2μF for 3V and 3.3V versions.

Limits appearing in boldface type apply over the entire junction temperature range for operation. Limits appearing in normal type apply for TA = TJ = 25°C.

Additional conditions for the 8-pin versions are FEEDBACK tied to VTAP, OUTPUT tied to SENSE, and VSHUTDOWN ≤ 0.8V.

Note 3: Guaranteed and 100% production tested.

Note 4: Guaranteed but not 100% production tested. These limits are not used to calculate outgoing AQL levels.

Note 5: Dropout Voltage is defined as the input to output differential at which the output voltage drops 100 mV below its nominal value measured at 1V differential.

At very low values of programmed output voltage, the minimum input supply voltage of 2V (2.3V over temperature) must be taken into account.

Note 6: Comparator thresholds are expressed in terms of a voltage differential at the Feedback terminal below the nominal reference voltage measured at Vin =

(VONOM + 1)V. To express these thresholds in terms of output voltage change, multiply by the error amplifier gain = Vout/Vref = (R1 + R2)/R2.For example, at a

programmed output voltage of 5V, the Error output is guaranteed to go low when the output drops by 95mV × 5V/1.235V = 384 mV. Thresholds remain constant

as a percent of Vout as Vout is varied, with the dropout warning occurring at typically 5% below nominal, 7.5% guaranteed.

Note 7: Vref ≤ Vout ≤ (Vin − 1V), 2.3V ≤ Vin ≤ 30V, 100μA ≤ IL ≤ 100mA, TJ ≤ TJMAX.

Note 8: The junction-to-ambient thermal resistances are as follows: 180°C/W and 160°C/W for the TO-92 package with 0.40 inch and 0.25 inch leads to the

printed circuit board (PCB) respectively, 105°C/W for the molded plastic DIP (N), 130°C/W for the ceramic DIP (J), 160°C/W for the molded plastic SOP (M), 200°

C/W for the molded plastic MSOP (MM), and 160°C/W for the metal can package (H). The above thermal resistances for the N, J, M, and MM packages apply

when the package is soldered directly to the PCB. Junction-to-case thermal resistance for the H package is 20°C/W. Junction-to-case thermal resistance for the

TO-252 package is 5.4°C/W. The value of θJA for the LLP package is typically 51°C/W but is dependent on the PCB trace area, trace material, and the number

of layers and thermal vias. For details of thermal resistance and power dissipation for the LLP package, refer to Application Note AN-1187.

Note 9: May exceed input supply voltage.

Note 10: When used in dual-supply systems where the output terminal sees loads returned to a negative supply, the output voltage should be diode-clamped to

ground.

Note 11: Vshutdown ≥ 2V, Vin ≤ 30V, Vout = 0, Feedback pin tied to VTAP.

Note 12: Output or reference voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range.

Note 13: Thermal regulation is defined as the change in output voltage at a time T after a change in power dissipation is applied, excluding load or line regulation

effects. Specifications are for a 50mA load pulse at VIN = 30V (1.25W pulse) for T = 10ms.

Note 14: Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to heating effects

are covered under the specification for thermal regulation.

Note 15: Line regulation for the LP2951 is tested at 150°C for IL = 1mA. For IL = 100μA and TJ = 125°C, line regulation is guaranteed by design to 0.2%. See

Typical Performance Characteristics for line regulation versus temperature and load current.

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LP2950/LP2951

Note 16: A Military RETS specification is available on request. At time of printing, the LP2951 RETS specification complied with the boldface limits in this column.

The LP2951H, WG, or J may also be procured as Standard Military Drawing Spec #5962-3870501MGA, MXA, or MPA.

Note 17: All LP2950 devices have the nominal output voltage coded as the last two digits of the part number. In the LP2951 products, the 3.0V and 3.3V versions

are designated by the last two digits, but the 5V version is denoted with no code at this location of the part number (refer to ordering information table).

Note 18: Human Body Model (HBM) is 1.5kΩ in series with 100pF; LP2950 passes 2.5 kV(HBM) ESD; LP2951 passes 2.5 kV(HBM) except: Feedback pin passes

1kV(HBM) and Shutdown pin passes 2kV(HBM).

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LP2950/LP2951

Typical Performance Characteristics

Quiescent Current

854627

Dropout Characteristics

854628

Input Current

854629

Input Current

854630

Output Voltage vs. Temperature of 3

Representative Units

854631

Quiescent Current

854632

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LP2950/LP2951

Quiescent Current

854633

Quiescent Current

854634

Quiescent Current

854635

Short Circuit Current

854636

Dropout Voltage

854637

Dropout Voltage

854638

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LP2950/LP2951

LP2951 Minimum Operating Voltage

854639

LP2951 Feedback Bias Current

854640

LP2951 Feedback Pin Current

854641

LP2951 Error Comparator Output

854642

LP2951 Comparator Sink Current

854643

Line Transient Response

854644

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LP2950/LP2951

Load Transient Response

854645

Load Transient Response

854646

LP2951 Enable Transient

854647

Output Impedance

854648

Ripple Rejection

854649

Ripple Rejection

854650

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LP2950/LP2951

Ripple Rejection

854651

LP2951 Output Noise

854652

LP2951 Divider Resistance

854653

Shutdown Threshold Voltage

854654

Line Regulation

854655

LP2951 Maximum Rated Output Current

854656

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LP2950/LP2951

LP2950 Maximum Rated Output Current

854657

Thermal Response

854658

Output Capacitor ESR Range

854663

LP2951 Input Pin Current vs Input Voltage

0 5 10 15 20 25 30

100

120

INPUT PIN CURRENT, IIN (μA)

INPUT PIN VOLTAGE, VIN (V)

VSD = 2.0V

Output Load = Open

Ta= -50°C

Ta= -40°C

Ta= +25°C

Ta= +125°C

854672

LP2951 Input Pin Current vs Input Voltage

0 5 10 15 20 25 30

100

120

INPUT PIN CURRENT, IIN (μA)

INPUT PIN VOLTAGE, VIN (V)

VSD = 2.0V

Output Load = Short to Ground

Ta= -50°C

Ta= -40°C

Ta= +25°C

Ta= +125°C

854673

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LP2950/LP2951

Application Hints

OUTPUT CAPACITOR REQUIREMENTS

A 1.0 μF (or greater) capacitor is required between the output

and ground for stability at output voltages of 5V or higher. At

lower output voltages, more capacitance is required (2. 2μF

or more is recommended for 3.0V and 3.3V versions). Without

this capacitor the part will oscillate. Most types of tantalum or

aluminum electrolytic work fine here; even film types work but

are not recommended for reasons of cost. Many aluminum

electrolytics have electrolytes that freeze at about −30°C, so

solid tantalums are recommended for operation below −25°

C. The important parameters of the capacitor are an ESR of

about 5Ω or less and a resonant frequency above 500 kHz.

The value of this capacitor may be increased without limit.

854663

FIGURE 1. Output Capacitor ESR Range

The reason for the lower ESR limit is that the loop compen-

sation of the feedback loop relies on the capacitance value

and the ESR value of the output capacitor to provide the zero

that gives added phase lead (See Figure 1).

fZ = (1 / (2 x π x COUT x ESR) )

Using the 2.2 µF value from the Output Capacitor ESR

Range curve (Figure 1), a useful range for fZ can be estimat-

ed:

fZ(MIN)= (1 / (2 x π x 2.2 µF x 5Ω) ) = 14.5 kHz

fZ(MAX)= (1 / (2 x π x 2.2 µF x 0.05Ω) ) = 318 kHz

For ceramic capacitors, the low ESR produces a zero at a

frequency that is too high to be useful, so meaningful phase

lead does not occur. A ceramic output capacitor can be used

if a series resistance is added (recommended value of resis-

tance about 0.1Ω to 2Ω) to simulate the needed ESR. Only

X5R, X7R, or better, MLCC types should be used, and should

have a DC voltage rating at least twice the VOUT(NOM) value.

At lower values of output current, less output capacitance is

required for stability. The capacitor can be reduced to

0.33 μF for currents below 10 mA or 0.1 μF for currents below

1 mA. Using the adjustable versions at voltages below 5V

runs the error amplifier at lower gains so that more output

capacitance is needed. For the worst-case situation of a

100mA load at 1.23V output (Output shorted to Feedback) a

3.3 μF (or greater) capacitor should be used.

Unlike many other regulators, the LP2950 will remain stable

and in regulation with no load in addition to the internal voltage

divider. This is especially important in CMOS RAM keep-alive

applications. When setting the output voltage of the LP2951

versions with external resistors, a minimum load of 1 μA is

recommended.

Applications having conditions that may drive the LP2950/51

into nonlinear operation require special consideration. Non-

linear operation will occur when the output voltage is held low

enough to force the output stage into output current limiting

while trying to pull the output voltage up to the regulated value.

The internal loop response time will control how long it takes

for the device to regain linear operation when the output has

returned to the normal operating range. There are three sig-

nificant nonlinear conditions that need to be considered, all

can force the output stage into output current limiting mode,

all can cause the output voltage to over-shoot with low value

output capacitors when the condition is removed, and the

recommended generic solution is to set the output capacitor

to a value not less than 10 μF. Although the 10 μF value for

COUT may not eliminate the output voltage over-shoot in all

cases, it should lower it to acceptable levels (<10% of

VOUT(NOM)) in the majority of cases. In all three of these con-

ditions, applications with lighter load currents are more sus-

ceptible to output voltage over-shoot than applications with

higher load currents.

1) At power-up, with the input voltage rising faster than output

stage can charge the output capacitor.

VIN tRISE(MIN) > ((COUT / 100 mA) x ΔVIN)

Where ΔVIN = VOUT(NOM) + 1.0V

2) Recovery from an output short circuit to ground condition.

COUT(MIN)≈ (160 mA - ILOAD(NOM))/((VOUT(NOM)/10)/25 μs))

3) Toggling the LP2951 SHUTDOWN pin from high (i.e. OFF)

to low (i.e. ON).

COUT(MIN)≈ (160 mA - ILOAD(NOM))/((VOUT(NOM)/10)/25 μs))

854647

FIGURE 2. LP2951 Enable Transient

INPUT CAPACITOR REQUIREMENTS

A minimum 1 μF tantalum, ceramic or aluminum electrolytic

capacitor should be placed from the LP2950/LP2951 input pin

to ground if there is more than 10 inches of wire between the

input and the AC filter capacitor or if a battery is used as the

input.

ERROR DETECTION COMPARATOR OUTPUT

The comparator produces a logic low output whenever the

LP2951 output falls out of regulation by more than approxi-

mately 5%. This figure is the comparator's built-in offset of

about 60mV divided by the 1.235 reference voltage. (Refer to

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LP2950/LP2951

the block diagram in the front of the datasheet.) This trip level

remains “5% below normal” regardless of the programmed

output voltage of the 2951. For example, the error flag trip

level is typically 4.75V for a 5V output or 11.4V for a 12V out-

put. The out of regulation condition may be due either to low

input voltage, current limiting, or thermal limiting.

Figure 3 below gives a timing diagram depicting the ER-

ROR signal and the regulated output voltage as the LP2951

input is ramped up and down. For 5V versions, the ERROR

signal becomes valid (low) at about 1.3V input. It goes high

at about 5V input (the input voltage at which VOUT = 4.75V).

Since the LP2951's dropout voltage is load-dependent (see

curve in typical performance characteristics), the input volt-

age trip point (about 5V) will vary with the load current. The

output voltage trip point (approx. 4.75V) does not vary with

load.

The error comparator has an open-collector output which re-

quires an external pull up resistor. This resistor may be re-

turned to the output or some other supply voltage depending

on system requirements. In determining a value for this re-

sistor, note that while the output is rated to sink 400μA, this

sink current adds to battery drain in a low battery condition.

Suggested values range from 100k to 1 MΩ. The resistor is

not required if this output is unused.

854620

*When VIN ≤ 1.3V, the error flag pin becomes a high impedance, and the

error flag voltage rises to its pull-up voltage. Using VOUT as the pull-up volt-

age (see Figure 4), rather than an external 5V source, will keep the error flag

voltage under 1.2V (typ.) in this condition. The user may wish to divide down

the error flag voltage using equal-value resistors (10kΩ suggested), to en-

sure a low-level logic signal during any fault condition, while still allowing a

valid high logic level during normal operation.

FIGURE 3. ERROR Output Timing

PROGRAMMING THE OUTPUT VOLTAGE (LP2951)

The LP2951 may be pin-strapped for the nominal fixed output

voltage using its internal voltage divider by tying the output

and sense pins together, and also tying the feedback and

VTAP pins together. Alternatively, it may be programmed for

any output voltage between its 1.235V reference and its 30V

maximum rating. As seen in Figure 4, an external pair of re-

sistors is required.

The complete equation for the output voltage is

where VREF is the nominal 1.235V reference voltage and IFB

is the feedback pin bias current, nominally -20nA. The mini-

mum recommended load current of 1 μA forces an upper limit

of 1.2 MΩ on the value of R2, if the regulator must work with

no load (a condition often found in CMOS in standby). IFB will

produce a 2% typical error in VOUT which may be eliminated

at room temperature by trimming R1. For better accuracy,

choosing R2 = 100 kΩ reduces this error to 0.17% while in-

creasing the resistor program current to 12 μA. Since the

LP2951 typically draws 60 μA at no load with Pin 2 open-cir-

cuited, this is a small price to pay.

854607

*See Application Hints

**Drive with TTL-high to shut down. Ground or leave open if shutdown fea-

ture is not to be used.

Note: Pins 2 and 6 are left open.

FIGURE 4. Adjustable Regulator

Stray capacitance to the LP2951 Feedback terminal can

cause instability. This may especially be a problem when us-

ing high value external resistors to set the output voltage.

Adding a 100 pF capacitor between the Output pin and the

Feedback pin,and increasing the output capacitor to at least

3.3 μF, will fix this problem.

REDUCING OUTPUT NOISE

In reference applications it may be advantageous to reduce

the AC noise present at the output. One method is to reduce

the regulator bandwidth by increasing the size of the output

capacitor. This is the only way noise can be reduced on the

3 lead LP2950 but is relatively inefficient, as increasing the

capacitor from 1 μF to 220 μF only decreases the noise from

430 μV(RMS) to 160 μV(RMS) for a 100 kHz bandwidth at 5V

output.

Noise can be reduced fourfold by a bypass capacitor across

R1, since it reduces the high frequency gain from 4 to unity.

Pick

or about 0.01 μF. When doing this, the output capacitor must

be increased to 3.3 μF to maintain stability. These changes

reduce the output noise from 430μV to 100μV rms for a

100 kHz bandwidth at 5V output. With the bypass capacitor

added, noise no longer scales with output voltage so that im-

provements are more dramatic at higher output voltages.

www.national.com 16

LP2950/LP2951

LLP MOUNTING

The SDC08A (No Pullback) 8-Lead LLP package requires

specific mounting techniques which are detailed in National

Semiconductor Application Note # 1187. Referring to the sec-

tion PCB Design Recommendations in AN-1187 (Page 5),

it should be noted that the pad style which should be used

with the LLP package is the NSMD (non-solder mask defined)

type. Additionally, it is recommended the PCB terminal pads

to be 0.2 mm longer than the package pads to create a solder

fillet to improve reliability and inspection.

The thermal dissipation of the LLP package is directly related

to the printed circuit board construction and the amount of

additional copper area connected to the DAP.

The DAP (exposed pad) on the bottom of the LLP package is

connected to the die substrate with a conductive die attach

adhesive. The DAP has no direct electrical (wire) connection

to any of the eight pins. There is a parasitic PN junction be-

tween the die substrate and the device ground. As such, it is

strongly recommend that the DAP be connected directly to

the ground at device lead 4 (i.e. GND). Alternately, but not

recommended, the DAP may be left floating (i.e. no electrical

connection). The DAP must not be connected to any potential

other than ground.

For the LP2951 in the SDC08A 8-Lead LLP package, the

junction-to-case thermal rating, θJC, is 14.2°C/W, where the

case is the bottom of the package at the center of the DAP.

The junction-to-ambient thermal performance for the LP2951

in the SDC08A 8-Lead LLP package, using the JEDEC

JESD51 standards is summarized in the following table:

Board

Type

Thermal

Vias θJC θJA

JEDEC

2-Layer

JESD 51-3

None 14.2°C/W 185°C/W

JEDEC

4-Layer

JESD 51-7

1 14.2°C/W 68°C/W

2 14.2°C/W 60°C/W

4 14.2°C/W 51°C/W

6 14.2°C/W 48°C/W

17 www.national.com

LP2950/LP2951

Typical Applications

1A Regulator with 1.2V Dropout

854622

300mA Regulator with 0.75V Dropout

854621

Wide Input Voltage Range Current Limiter

854609

*Minimum input-output voltage ranges from 40mV to 400mV, depending on load

current. Current limit is typically 160mA.

Low Drift Current Source

854608

5 Volt Current Limiter

854610

*Minimum input-output voltage ranges from 40mV to 400mV, depending on load

current. Current limit is typically 160mA.

www.national.com 18

LP2950/LP2951

Regulator with Early Warning and Auxiliary Output

854611

■ Early warning flag on low input voltage

■ Main output latches off at lower input voltages

■ Battery backup on auxiliary output

■ Operation: Reg. #1's VOUT is programmed one diode drop above 5V. Its error

flag becomes active when VIN ≤ 5.7V. When VIN drops below 5.3V, the error flag

of Reg. #2 becomes active and via Q1 latches the main output off. When VIN

again exceeds 5.7V Reg. #1 is back in regulation and the early warning signal

rises, unlatching Reg. #2 via D3.

Latch Off When Error Flag Occurs

854612

2 Ampere Low Dropout Regulator

854613

For 5Vout, use internal resistors. Wire pin 6 to 7, & wire pin 2 to +Vout Bus.

19 www.national.com

LP2950/LP2951

5V Regulator with 2.5V Sleep Function

854614

*High input lowers Vout to 2.5V

Open Circuit Detector for 4 → 20mA Current Loop

854615

Regulator with State-of-Charge Indicator

854616

*Optional Latch off when drop out occurs. Adjust R3 for C2 Switching when Vin is 6.0V.

**Outputs go low when VIN drops below designated thresholds.

www.national.com 20

LP2950/LP2951

Low Battery Disconnect

854617

For values shown, Regulator shuts down when Vin < 5.5V and turns on again at 6.0V. Current drain in disconnected mode is ≈ 150μA.

*Sets disconnect Voltage

**Sets disconnect Hysteresis

System Overtemperature Protection Circuit

854618

LM34 for 125°F Shutdown

LM35 for 125°C Shutdown

21 www.national.com

LP2950/LP2951

Schematic Diagram

854623

www.national.com 22

LP2950/LP2951

Physical Dimensions inches (millimeters) unless otherwise noted

Order Number LP2951WG/883

NS Package Number WG10A

Metal Can Package (H)

NS Package Number H08C

23 www.national.com

LP2950/LP2951

Ceramic Dual-In-Line Package (J)

NS Package Number J08A

Surface Mount Package (M)

NS Package Number M08A

www.national.com 24

LP2950/LP2951

Molded Dual-In-Line Package (N)

NS Package Number N08E

Molded TO-92 Package (Z)

NS Package Number Z03A

25 www.national.com

LP2950/LP2951

Surface Mount Package (MM)

NS Package Number MUA08A

D-Pak Package

NS Package Number TD03B

www.national.com 26

LP2950/LP2951

LLP Package

NS Package Number SDC08A

27 www.national.com

LP2950/LP2951

Notes

LP2950/LP2951 Series of Adjustable Micropower Voltage Regulators

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