Pre-Breadboarding Tool - Advanced Linear Devices

415 Tasman Drive Sunnyvale, CA 94089-1706 (T) 408.747.1155 (F) 408.747.1286 (E-mail) sales@aldinc.com (Website) www.aldinc.com

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INTRODUCTION

As today's analog systems become more sophisticated, complex

and precise, and as industrial, instrumentation, telecom and au-

tomoti ve electronic control systems need to perform more func-

tions, it becomes increasingly cost effecti ve to integrate compo-

nents such as op amps, comparators, digital logic, etc. into a

single Application Specific IC. While microelectronics tech-

nology have increased in capability, it is also increasingly com-

ple x, and expensi ve. It has become necessary to hav e better and

faster eng ineering tools to tackle these higher level design c hal-

lenges, while decreasing the time to market.

In examining a typical design process, the design task usually

starts conceptually with an outline of desired capabilities, speci-

fications and features of the system. After design concept has

been established, One of the critical steps in the design process,

namely the prototype functional implementation and e v aluation

requires that individual functional blocks be specified, and that

individual components specifications be evaluated as to their

effect upon overall system performance.

It is at this lev el of design that the designer needs to know quickly

what functions, components, and particular specifications are

suitable and how they effect the system performance, and be

able to determine whether or not these components will per-

form the function within required system specifica tions. Once

these selections are made, the circuit design can be synthesized

and developed further.

Finally, a prototype breadboard can be constructed to test the

design concept, and gather data that are unattainable otherwise

and facilitate further circuit evaluation. Changes, corrections,

and improvements can clearly be evaluated. In order to recon-

cile any dif ferences between the design goal and the breadboard

implementation, not only the functionality of the breadboard

has to be adequate, but any incompatibilities or inconsistencies

between the various components must be resolved.

The design task takes on an additional dimension w hen analog

components are used and especially when such parameters as

tempco, offset voltages, and offset currents, noise, gain, device

matching, tracking of voltages and currents, power supply re-

jection ratio, and common mode rejection ratio become impor-

tant to the proper operation of the system.

Integration of these analog components into a single custom

monolithic IC while addressing these issues can become a daunt-

MACROMODELS THAT SPEED SOFTWARE SIMULATION

BECOME A USEFUL PRE-BREADBOARDING TOOL

ing task. And yet to reduce space, simplify manufacturing, reduce

parts count, and to reduce time to market, the designer often must

look towards an ASIC implementation. The pressure to integrate

mounts especiall y when production v olumes are seen to increase. At

that point, if the or iginal prototype design was done without due con-

sideration for integration, a complete redesign is usually necessary.

ALD ASIC PROGRAM

To address the situation mentioned above, Advanced Linear Devices

(ALD) of Sunnyvale, California has embarked on a two prong ap-

proac h to provide the designer with inexpensive, common sensed tool

that provides a powerful mixed signal ASIC design en vironment while

still providing the component level design and prototype parts for an

off the shelf low to medium volume design. Essentially a prototype

and low volume solution with the ease of integration without a rede-

sign.

First, ALD provides a design kit consisting of predesigned and pre-

fabricated analog functional bloc ks that have been completely tested

and c haracterized, these parts are standard parts, complete with char-

acterization curves and specifications. These analog functions are

not only useful in breadboarding for functionality but also useful in

determining any potential second or der effects that ma y affect per-

formance of the final system.

The question arises: If these analog cell are so well designed and

engineered to be adequate for this purpose, then w hy not sell these

blocks as a standard pr oduct? Indeed that's exactly what ALD has

done. They have made their standard packaged parts available as

standard cell integrated components. These products are a v ailable as

packaged parts or as ASIC functional blocks. ALD guarantees that

all of their products are fully compatible with each other on the same

chip. These products, therefore are available for prototyping, vol-

ume manufacturing or as ASIC components.

Second, ALD has also developed a unique family of macromodels,

subcircuits, and components that are fitted to their processing param-

eters. They are designed to be compatible with PSPICE and most

other SPICE based circuit simulators. These macromodels have been

de veloped specifically to ease the burden of the system designer when

utilizing the ALD products for board level design or for designing

breadboard/prototype for ASI implementation.

With these models, it now has become practical to simulate an ana-

log board level system on a personal computer. In addition a bread-

board using the actual IC components can be constructed. Due to the

complexity of most applications, utilizing hundreds of transistors,

the macro-model approach allows a designer to simulate develop a

415 Tasman Drive Sunnyvale, CA 94089-1706 (T) 408.747.1155 (F) 408.747.1286 (E-mail) sales@aldinc.com (Website) www.aldinc.com

system-on-a-chip using both software and hardwar e tools, thus per-

forming trial and error experimentation on the personal worksta-

tion as well as on the lab bench. Of cour se, the final design will

only be as good as what the designer can measure or predict using

simulation and breadboar d measurements. With simulation added

to the design verification process, convergence upon a design so-

lution is rapid. In addition, this approach allo ws the manufacturer

the possibility to verify his system through actual field tests, lim-

ited production, and beta test sites, before committing to the ex-

pensive of custom IC production.

Actual chip level experimentation and mask iteration are not only

costly, b ut as systems g et increasingl y complex, the probability of

a designer actually developing a w orking ASIC system under the

time and budget constraints diminishes. For complex analog or

mixed analog digital system development intended for ASIC imple-

mentation, the ability to inexpensively and quic kly do design it-

erations and measurements, whether on a computer station, or on a

breadboard, is vital to the ultimate success of the project.

Of course , the a bility to do both software and hardware iteration

produces a desirable combination for engineering analysis. For

certain situations, a quick run on a computer simulator can verify a

circuit conf iguration that performs an intended function. Unfortu-

nately , nice , idealized g raphs presented on a computer terminal do

not always represent actual circuit behavior and in many analog

systems full simulation with regard to all parametric behavior is

impractical if not impossible.

For other situations, such as to verify signal levels and timing of

interface between the ASIC and other board components such as

transducers, and to "feel" the adequac y of an analog signal, a bread-

board as an actual hardware simulator can prove superior as an

engineering tool. When all the pieces of individual subcircuits are

simulated or designed, the time comes to put them together and

verify that they perform as a system. This is a time when a de-

signer needs all the engineering tools at his disposal. As software

simulators and models may assist in spotting problems early on,

hardw are simulators and real hardware help other problems to show

up. This two prong approach to circuit development eliminates

redundant engineering effort when an ASIC needs to be imple-

mented later in a production cycle.

A design initially developed with this approach would not need

additional engineering effort when its time to integrate. More im-

portantly , this approach cut out most of the technical risks of ASIC

implementation because the designer has close feedback and abil-

ity to observe and measure the actual as well as the simulated sys-

tem. Thus the often sta ted goal of a quick implementa tion onto an

ASIC chip can be easily handled as the need and justification de-

velops.

EASY ASIC BREADBOARDING FOR AN ASIC

A vailable from ALD is a design kit that contains a box full of ana-

log IC par ts such as operational amplifiers, comparators, oscilla-

tors and transistors that allow a designer to develop custom cir-

cuitry. Also available from ALD is a proprietary library of

macromodels of these specific analog IC parts de veloped for a stan-

dard SPICE circuit simulator such as PSPICE, in addition a design

manual that contains complete information and useful hints is pro-

vided.

When working with the kit, one can design and sim ulate using the

ASIC library components or breadboard these circuits with Ad-

vanced Linear Devices' standard par ts. The designer can use any

number of analog cells fr om the design kit and in any configura-

tion desired, and later decide on the package or pinout for an ASIC

part. Since ALD's ASIC program is semicustom standard cell ap-

proach, ther e is no rigid limitation on how man y instances of any

of function block, pins, components or even the values used.

Furthermore, digital logic such as HC, 74C and CD4000 family

parts can also be used in the software simulator as well as the hard-

ware prototype . Many software circuit simulator suppliers already

supply dig ital parts by individual par t numbers in their digital li-

brary. These digital parts simulate the logic and performance of,

say, a CD4027 Dual JK Flip-Flop. ALD has developed functional

equiv alent digital cells in its computer libr ary that will perform the

identical logical functions.

A custom prototype system designed around using these generic

digital part types along with analo g parts supplied by ALD can be

readily implemented into an ASIC with virtually no performance

differences. With this complete libr ary of digital MSI functions

such as counters, encoders and decoders, no logic conversion is

necessary from standard part type to implementation of the ASIC.

All digital circuit blocks in ALD's digital library perfor m identical

functions to the generic part types in the simulation library.

Backgound on macromodels

An operational amplifier modeled with detailed transistor level

parameters and cir cuitry may run for five or six hours equivalent

CPU time based on a Pentium class personal computer for each

parametric iteration. W ith several amplifiers and tens or hundr eds

of simulations with perhaps dozens of parameters each requiring

multiple passes to run in order to completely analyze or optimize

an analog system design, analysis of these systems can readily

overwhelm available computer resources.

In addition, many simulation induced problems tend to creep up

using detailed transistor operational models. These problems in-

clude setting the correct internal node conditions, non-converg ence

of the circuit and simulation induced oscillation. In analog simu-

lation, where signal amplif ication, precision v oltages and feedback

are common circuit parameters, circuit behavior of a specific cir-

cuit block may depend not only on the transistor models and the

simulators used, but also on user specified iteration limits and tol-

erances. If these limits are set improperly, circuit may take hours

to converge, generate useless data, or terminate abruptly in the

middle of the simulation.

In the integration of a complex ASIC w here sev eral complex func-

tional blocks are used, a detailed tr ansistor lev el simulation is sim-

415 Tasman Drive Sunnyvale, CA 94089-1706 (T) 408.747.1155 (F) 408.747.1286 (E-mail) sales@aldinc.com (Website) www.aldinc.com

ply impractical. A macromodel that emulates the behavior of the

operational amplif ier, on the other hand , can be sim ulated in a few

seconds. Macromodels have been developed for the purpose of

simulation of a function block while using minimum computer

memory and CPU time and still provide adequate functional emu-

lation.

These are generally compositions of simple idealized elements, as

opposed to indi vidual transistor le vel models, this reduces the ma-

trix of variables that needs to be iterated on a computer station.

These macromodels ha ve been developed to perf orm the simulate

the function of indi vidual functional blocks. Ideal circuit elements

like ideal voltage controlled current sources are used to emulate

these amplifiers Also a set of equations in the simulator can emu-

late the behavior of an operational amplifier.

In many cases, the r eal difficulty in using this approach stems from

the fact tha t a real life operational amplifier may not be so "ideal"

in beha vior . As an y design engineer would attest, a r eal life circuit

can ha ve idiosyncrasies, behaviors and ca pabilities that can be dif-

ferent from the ideal, resulting in unintended behavior. The most

noteworthy of these differences can be incorporated into the

macromodel in order to better model the actual beha vior of a cir-

cuit. However, in the case of second or der effects like nonlinear

parametric changes, where a matrix of equations or even the best

macromodel may not accurately descr ibe actual circuit behavior,

the user would be w ell advised to check out his circuit with a bread-

board after simulation is completed.

Notwithstanding these limitations, in many applications a f irst or -

der macromodel can prov e adequate as a circuit analysis tool. These

macromodels, when carefully engineered and constructed, provide

the user with a convenient intermediate ste p where analysis com-

ple xity goes be yond paper and pencil, and the circuit function may

not yet be ready for breadboard construction in the laboratory.

Macromodels used in a simulators can and do give quick first or-

der tr ial analysis of the ability of a circuit conf iguration to perform

a given task. If a user also has working experience with an actual

part, and has developed intuition and feel to use it pr operly, then a

combination of the capabilities of computer simulation and bread-

boarding can be indeed a powerful engineering tool set indeed.

ALD-simulation model libraries

ALD models are designed to support board le vel macro simulation

such as PSPICE simulation where packaged circuit elements such

as transistors, operational amplifiers, MSI and SSI logic functions,

counters, latches, and gates are used. These are components tha t

one would normally put on a circuit board to prototype a system.

For ALD ASIC implementation, all chip macromodels and circuit

elements should be partitioned from other circuit elements. Parti-

tioning of the system involves no more than determining connec-

tion points between circuit elements that are intended on-chip and

those tha t are off-chip. ALD supplies a SPICE library designed for

ASIC integration that contains detailed SPICE circuit models of

analog integrated components like resistors, capacitors, diodes, tran-

sistors and of course all the major macro-models of functional

blocks of the standard integratible par ts. Once a partition of the

system is made, into on ASIC components, and off chip compo-

nents, then a sim ulation of the proposed ASIC can be done- in-

cluding the designers off chip components.

The circuit elements used in a simulator can be divided into four

major categories: ALD analog standard part macr omodels, ALD

ASIC element macromodels, digital function models and standard

vendor supplied PSPICE models.

ALD analog cell macromodels consists of a library of macromodels

of ALD standard parts including operational amplifiers, voltage

comparators, timers, oscillators, volta ge references and transistors.

These macromodels can also be used in applications where ASIC

implementation is not planned. ALD ASIC element macromodels

include diodes, transistors, zener diodes, input protection circuits,

and on-chip integrated resistors and capacitors. These element

models are only needed where an on-chip ASIC implementa tion

of these elements are planned.

Digital function models are specifically standard CMOS logic fam-

ily functions including, at present, HC logic family (5V only), 74C

logic family, and CD4000 logic family (5V to 12V). These com-

ponents and their models are widely available from a variety of

sources. Users can incorporate these functions into the their simu-

lator . ALD has these digital functions in its ASIC library r eady for

ASIC implementation.

Standard vendor supplied models are models of other circuit ele-

ments, such as a relay, microphone, piezoelectric crystal, or an

I.C. that is out of the scope of the ALD ASIC inte gratible library.

PSPICE provides a large selection of generic parts composed by

various vendors. These circuit elements can be used with the cir-

cuit simulator and the circuit breadboard but would not be included

in the ASIC chip.