82577 GbE PHY—Datasheet
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Revision History
Date Revision Description
February 2012 2.5 • Revised Table 68 (bit 5 description).
January 2011 2.4 • Changed the default value of word 0x13 (bits 15 and 7).
February 2010 2.3
•Updated figure 1.
• Updated tabl e 2.
• Updated section 7.4 and 10.3.1.2 (added Int el® 5 Series Express Chipset references).
• Added power sequencing note to section 5.3.2.
• Updated sectio n 6.4 .2. 2 (a dd ed Wi ndo ws* 7 re fer e nce ).
• Updated sections 7.4.1.3 .1.4 through 7. 4.1.3.1.7 and 7.4.1.3.2.1 through 7.4.1.3.2.2 (swapped Pos sible
VLAN Tag and Possible Len/LLC/SNAP Header in the tables).
• Added Port Control register (Page 769, Register 16) .
• Updated section 10.3.1.15 (LED behavi our).
November 2009 2.2
• Updated power consumption targets in section 6.
• Updated the NVM format and contents to match current NVM image.
• Added a PHY functionality section.
• Updated the recommended operating conditions in section 12.
• Changed the crystal Cload value from 27 pF to 33 pF.
• Updated oscillator specification table and added a note for the oscillator schematic.
October 2009 2.1 • Updated table 6.
June 2009 2.0 • Initial public release.
May 2009 1.75 • Major revision (all sections).
April 2009 1.2
• Updated title page (advanced cable diagnostics).
• Added new Section 2.5 (Intel® 5 Series Express Chipset/82577 – SMBus/PCIe Interconnects).
• Added new Appendix A, B, and C.
• Updated section 11 (crystal drive level).
• Update table 2.
March 2009 1.1
• Updated title page and product matrix in section 1.
• Corrected Epad size values (changed 3.80 mm to 4.3 mm).
• Removed 82574 L references.
• Added notes to section 6.1 (power calculations).
Feb 2009 1.0
• Changed fully integrated linear regulator voltage from 1.1 Vdc to 1.0 Vdc (all sections).
• Added SMBus specification reference to section 1.5.
• Updated pad size in section 4.1.
• Added new power consumption targets in Table 7.
• Changed internal pin name from LAN_PWR_GOODn to LAN_DISABLE_N (all sections).
• Updated Se ction 6.3.1.1 (added power consumption value during power u p).
• Added new Section “Device Functionality”.
• Added new Section “MAC Programming Interface”.
Sept 2008 0.95
• Section 2.2.2 (Remo ved last paragraph and Table 2).
• Section 2.3 (changed SMBC LK to SMB_CLK and SMBDATA to SMB_DATA).
• Section 2.3.1 (updated paragraph).
• Section 2.3.1.6 (removed).
• Removed old sections 2.3.1.6.1, 2.3.1.6.2, and 2.3.1.7).
• Section 2.3. 2.2.1 (updated table).
• Section 4.1 (added new mechanical drawing).
• Section 5.3.2 (changed TXTAL parameter to 35 ms).
• Section 6.1 (remove d note 2 from Table 7).
• Section 6.3.1.1 (updated paragraph).
• Section 6.3. 1.2 (removed all mode 1 references and updated register references).
• Section 6.3. 1.3 (added K1 Idle State information).
• Section 6.3.1.5 (removed)
• Section 6.3.2 (changed KX to K0).
• Section 6.3.3 (updated register refe rences).
• Section 7.3. 1.1 (updated operational range values).
• Section 7.3. 1.2 (updated operational range value).
• Removed Section 7.3.2 “Power On/Off Sequence”.
• Section 7.3.1.4, Table 127 (up dated power detec tion threshold valu es).
• Section 7.4.1 (updated Ipu llup values).
• Section 7.4.2 (updated VOL, VOH, and Ipullup values).
• Section 7.4.3 (updated Ipu llup values).
• Section 7.4.4.1 (Updated tab le and added transmitter eye diagram).
• Section 7.4.4.2 (Updated tab le and added receiver eye diagram).
• Removed old Section 7.4.4.3.
• Section 7.6.3 (updated paragraph).
• Section 7.7 (updated coupling capac itor values in Table 12 9. changed XTAL1 input value to 3.6 Vdc).
• Section 7.6.1 (updated input clock amplitude values).