1/4 inch 330k pixel Primary color filter CMOS Image Sensor with A/D converter TCM5043G Technical data sheet (Tentative Ver. 1.2) January 22nd, 2001 TOSHIBA Corporation Semiconductor Company, System LSI Division Marketing & Engineering Group Digital Consumer System LSI & Image Sensor Feature Item Optical format Total pixel numbers Signal pixel numbers Pixel pitch Image size Aspect ratio Power current consumption Master clock frequency Signal output Color filter array Output format Frame rate Package Additional functions - - Contents 1/4 inch 698(H) x 502(V) (350k pixels) 660(H) x 492(V) (330k pixels) 5.4um(H) x 5.4um(V) 3.564mm(H) x 2.657mm(V) 4(H) : 3(V) 21mA(typ) @30fps 24.54545MHz Progressive scanning RGB primary color filter Bayer arrangement(G checked, R/B in line sequence) 10bit digital and proportional output in parallel 30fps @12.27272MHz data rate 32pin TOG(=Tab on glass) Variable electronic shutter Internal synchronization mode (serial command setting): From 2H to 524H by 1H From 1V to 16V by 1H External synchronization mode: From 1H to 524H and from 1V to 16V by 1H From 1H to 524H, 1V and 4V combined with camera DSP TC90A70F Variable gain control Built-in feed back clamp: Optical black level is fixed to 64LSB Synchronization generator is implemented Command setting by micro wire 2.3 to 3.6V digital input/output is available Maximum Ratings (Vss=0V) Characteristics Power supply voltage Input voltage Input current of protection diode Storage temperature Symbol Vdvddio Vavdd, Vdvdd Vin Iin Tstg Rating -0.5 to 4.4 -0.5 to 3.7 -0.3 to Vdd +0.3 +/- 20 -30 to 85 Unit V mA Centigrade Recommended operating conditions (Vss=0V) Characteristics Power supply voltage Input voltage Operating temperature Symbol Vdvddio Vavdd,Vdvdd Vin Topr Min 2.3 2.6 Rating Typ 2.8 2.8 0 to Vdvddio -20 to 60 Unit Max 3.6 3.0 V Centigrade 1 Block Diagram Input of SGMODE controls synchronization mode between external synchronization mode and internal. In the case of ext. sync. mode, HPA, VRR and ESR pulse should be supplied to sensor. On the other hand, HD, VD and data clock is generated from sensor on int. sync. In that case electronic shutter speed is controlled by command setting. External synchronization mode MPU EN,SCLK,SDATA COMMAND DECODER VREF CDS IMAGE AREA GCA A/D 10bit Digital Output DATA9DATA0(LSB) TG & SG HPA,VRR,ESR SGMODE=L or OPEN MCK Internal synchronization mode MPU EN,SCLK,SDATA COMMAND DECODER VREF 10bit Digital Output IMAGE AREA TG & SG CDS GCA A/D DATA9DATA0(LSB) DATACLK MCK SGMODE=H HD,VD 2 Pixel Arrangement Dummy Light shielded pixels for pixels for optical test; bralck; 26 pixels (*) Light shielded dummy pixels; 6 pixels B G G R 6 pixels B G G R Signal pixels; 660 pixels (*) Light shielded Signal pixels; dummy 492 pixels pixels; 2 pixels B G G R B G G R (*) Light shielded dummy pixels; 2 pixels (*) Light (*) Light shielded shielded dummy dummy pixels; pixels; 2 pixels 2 pixels 3 Pin Configuration Pin No. Symbol Function Pin management 1 DVSS Digital GND (VSS) 0V 2 MCK Master clock input 3 DVDD Digital power supply (VDD) 24.54545 MHz 2.8V +/- 0.2V. Bi-passed condenser(4.7uF and 0.1uF) is preferable. Output impedance of power supply is recommended to be under 0.5 ohm @10kHz. 4 SOUT0 Sensor out(LSB) 5 SOUT1 Sensor out 6 SOUT2 Sensor out 7 SOUT3 Sensor out 8 SOUT4 Sensor out 9 SOUT5 Sensor out 10 SOUT6 Sensor out 11 SOUT7 Sensor out 12 SOUT8 Sensor out 13 SOUT9 Sensor out(MSB) 14 DVSSIO 15 DATACLK Digital I/O GND (VSS) Data clock output (a half of master clock) 16 DVDDIO Digital I/O power supply (VDD) 17 TEST4 Test terminal (pull-up) 18 DSTOP 19 20 21 22 0V 2.3 to 3.6V. Bi-passed condenser(2.2uF and 0.1uF) is preferable. No connection or connected to VDD Read stop control input (pull-up) 1: Active / 0: Halt Vertical timing pulse start pulse VRR(VD) input / VD pulse output ESR(STR Electrical shutter start pulse input Horizontal timing start pulse input HPA(HD) / HD pulse output Internal / external synchronization 0: External sync (HPA,VRR and ESR input) SGMODE mode (pull-down) 1: Internal sync (HD,VD output) 23 TEST5 Test terminal Connected to AVSS 24 RESET Reset for parameter setting Connected to DVDDIO via 100k to 1M ohm. Connected to GND via 0.1uF 25 SCLK Serial clock input 26 SDATA Serial data input 27 EN Data enable input 28 TEST1 Test terminal 29 TEST2 Test terminal 30 AVSS Analog GND (VSS) 0V 31 TEST3 Test terminal 32 AVDD Analog power supply (VDD) No connection 2.8V +/- 0.2V. Bi-passed condenser(2.2uF and 0.1uF) is preferable. Connected to GND(AVSS) via a capacitor of 2.2uF Connected to GND(AVSS) via a capacitor of 0.1uF *Aluminum electrolytic capacitor or Tantalum capacitor are desirable for power line. 4 Application circuit AVSS DVDDIO C3 R1 C2 C3 AVDD C2 C3 17 TEST4 DVDDIO 16 18 DSTOP DATACLK 15 19 VRR(VD) DVSSIO 14 20 ESR(STR) 21 HPA(HD) SOUT8 12 22 SGMODE SOUT7 11 23 TEST5 SOUT6 10 24 RESET SOUT5 9 25 SCLK SOUT4 8 26 SDATA SOUT3 7 27 EN SOUT2 6 28 TEST1 SOUT1 5 29 TEST2 30 AVSS DVDD 3 31 TEST3 MCK 2 32 AVDD DVSS 1 (MSB)SOUT9 (LSB)SOUT0 DVDDIO C2 C3 13 4 DVDD C1 C3 C1:4.7uF C2:2.2uF C3:0.1uF R1:100k to 1Mohm 5 Optical and electrical characteristics Item Sensitivity (G output) Symbol Conditions R(G) Condition *1 Saturation voltage VSAT Blooming margin BLM S/N (dark) Min Typ 150 200 (287 LSB) (383 LSB) 350 (671 LSB) S/N 500 times as standard condition Standard condition - Decay lag LAG G output; over 20mV - Power current Frame rate; 30fps Max Unit - mV - mV 7 (14 LSB) - dB No blooming - 57 3 (6 LSB) 21 mV mA - Setting value of internal gain amplifier; once (0dB) - (***LSB) means 10 bit digital output not include 64LSB for black level. - Signal output includes 64 LSB for black level. Standard conditions (Tc=60 degrees Centigrade) - Driving conditions: Frame rate; 30fps, Electronics shutter; Off (1/30s), VDD=2.8+/-0.2V Parameter setting value; Default - Light source: Color temperature; 3200K, Tangusten light - Optical filter: IR cut filter (50%; 650nm) - Optical lens; Fujinon CF25L (F0.85, f=25mm), F2.8 - Standard signal level: G output (average) 250mV Condition *1 - Luminance of object; 100nt - Driving and optical conditions are same as standard conditions. Relation between analog and digital output - Setting value of internal gain amplifier; once (0dB) - Assumption of DAC(500mVp-p) with linear gain Digital output (10bit) 1023 479 Black level = 64 0 250 500 Analog output [mV] (standard) (Saturation) 6 DC/AC characteristics DC characteristics (Vdd=2.8+/-0.2V, Tc=-20 to 60 degrees Centigrade) Symbol VIH VIL IIH IIL VOH VOL IDD Note1 Note2 Item High level input voltage Low level input voltage High level input current Low level input current High level output voltage Low level output voltage Current consumption Conditions VIN=VDD VIN=VSS IOH=-4mA IOL= 4mA VDD=2.8V Min 2 -1 -1 2.2 - Typ 21 Unit V V uA uA V V mA Note Note1 Note1 Note1 Note1 Note2 Note2 DSTOP, VRR, ESR, HPA, SGMODE, RESET, SCLK, SDATA, EN and MCK VD, STR, HD, DATACLK, DATA0 to DATA9 AC characteristics (Vdd=2.8+/-0.2V, Tc=-20 to 60 degrees Centigrade) Item Symbol Conditions Min Typ Set-up time for input ts Based on MCK Hold time for input th Based on MCK Output delay time tpd Based on MCK (C=15pF) Command clock fsclk frequency Note1 Note2 Note3 Max 0.8 1 1 0.4 - Max 10 10 10 6 Unit ns ns ns Note Note1 Note1 Note2 Note3 DSTOP, VRR, ESR and HPA, DATACLK, DATA0 to DATA9 SCLK 40nS MCK ts th Data IN Vdd/2 tpd Data OUT Vdd/2 7 Command setting table (1) Timing chart More than 16 SCLK max:1/4MCK (6MHz) EN SCLK D D D D D D D D D D D D D D D D 1 1 1 1 1 1 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 SDATA There is D0 data at 15 data before EN raise Setting item Gain setting Electronic shutter D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 (2) Command setting Monitoring mode 0 0 0 0 1 0 1 0 1 1 1 1 FBC mode 1 1 1 1 MSB Setting data(10bit) LSB MSB Setting data(10bit) LSB Note 2H to 16V 0: 30fps(default) 1: 60fps 0: Auto(default) 1: Manual(OFF) * * * Default value setting is available w/o sending command. Gain value should be set after power on reset. * In the case of internal synchronization mode, command setting of electronic shutter speed is available. ESR pulse need to be input on external synchronization mode. (3) Typical setting value 1) Gain setting table (typical value) Gain level (dB) -2.4 (Min) 0 (Standard) 3 6 9 12 18 20 Setting value D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 1 1 1 0 0 0 0 0 1 1 0 1 1 0 0 0 1 0 0 1 0 1 0 0 1 0 0 0 0 1 1 1 1 0 1 0 0 0 1 0 1 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 1 0 1 1 1 (Recommended max value) 2) Electronic shutter setting (internal synchronization mode) Electronic shutter Setting value speed (Storage time) Shutter Off (525H) 2 (H) 3 (H) : 523 (H) 524 (H) D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 0 0 0 : 1 1 0 0 0 : 0 0 0 0 0 : 0 0 0 0 0 : 0 0 0 0 0 : 0 0 0 0 0 : 0 0 0 0 0 : 1 1 0 0 0 : 0 0 0 0 1 : 1 1 0 1 0 : 0 1 8 9 Output Not to coincide with VRR ESR VRR HPA MCK 492H Effective signal Horizontal period Output SDATA EN SCLK ESR (storage time) VRR HPA 489 490 491 492 493 494 Vertical period Signal output format (external sync in normal mode) 1V=525H Effective signal 660 pixels Light shielded dummy pixels 2 pixels 30 pixels Light shielded pixels Light shielded dummy pixels 2 pixels 8CK 8CK 4CK Invalid period 31H Light shielded dummy period 2H Effective signal 492H Effective pixels 660 pixels 88 pixels Light shielded dummy pixels 2 pixels Invalid period 178.5CK 2H 35H 34H 33H 32H 31H 30H 29H 28H 27H 26H 25H 24H 23H 22H 21H 20H 19H 18H 17H 16H 15H 14H 13H 12H 11H 10H 9H 8H 7H 6H 5H 4H 3H 2H 1H 651 652 653 654 655 656 657 658 659 660 661 662 524H 523H 522H 521H 520H 519H 518H 517H 516H 515H 514H 513H 512H 511H 510H 509H 508H 507H 506H 505H 504H 503H 502H 501H 500H 499H 498H 497H 496H 495H 494H 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 10 Output Effective signal 244H 660 pixels Effective signal Light shielded dummy pixels 2 pixels 651 652 653 654 655 656 657 658 659 660 661 662 Not to coincide with VRR ESR VRR HPA MCK Horizontal period Output SDATA EN SCLK (Storage time) ESR VRR HPA Vertical pieoid Sgnal output format (external sync in monitoring mode) 1V=263H 30 pixels Light shielded pixels Light shielded dummy pixels 2 pixels 8CK 8CK 4CK Invalid period 17H Light shielded dummy period 2H 88 pixels Invalid period 178.5CK 2H 36H 35H 34H 33H 32H 31H 30H 29H 28H 27H 26H 25H 24H 23H 22H 21H 20H 19H 18H 17H 16H 15H 14H 13H 12H 11H 10H 9H 8H 7H 6H 5H 4H 3H 2H 1H 456 459 460 463 464 467 468 471 472 475 476 479 480 483 484 487 488 491 492 Effective signal 244H 262H 261H 260H 259H 258H 257H 256H 255H 254H 253H 252H 251H 250H 249H 248H 247H 246H 245H 244H 243H 242H 241H 240H 239H 238H 237H 236H 235H 234H 233H 232H 231H 1 2 5 6 9 10 13 14 17 18 21 22 25 26 29 30 33 34 37 38 41 42 45 46 49 50 53 54 57 58 61 Light shielded dummy pixels 2 pixels 660 pixels Effective pixels 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 11 Output VD HD MCK 489 490 659 487 488 656 486 654 655 660 pixels Effective pixels 494 Light shielded dummy pixels 2 pixels 491 492 660 661 657 658 484 485 652 653 651 Horizontal period 493 662 30 pixels Light shielded pixels Light shielded dummy pixels 2 pixels 39CK 88 pixels Invalid period 141CK 2H 2 3 1 Light shielded dummy pixels 2 pixels 1 2 Output 31H 4 5 3 4 492H 6 5 6 Light shielded dummy period 492H Effective pixels 174CK 7 Invalid period 7 8 8 9 Effective signal 9 10 10 SDATA 11 660 pixels Effective pixels 11 12 EN 12 13 13 14 SCLK 14 15 15 2H 16 17 16 17 ESR; N/A 26H 18 18 19 VD 4H 19 20 20 HD 21 22 21 22 Vertical period 23 23 24 Signal output format (Internal sync in normal mode) 1V=525H 24 25 25 12 Output VD HD MCK 477 657 473 474 655 656 469 470 653 654 466 652 660 pixels Effective pixels 489 490 Light shielded dummy pixels 2 pixels 478 481 658 659 651 Horizontal period 482 660 Output 485 486 661 662 244H 30 pixels Light shielded pixels Light shielded dummy pixels 2 pixels Invalid pixels 17H 2H 1 2 39CK 10 6 9 88 pixels 244H 17 18 141CK 13 14 Invalid period 5 Effective signal 21 Light shielded dummy period Light shielded dummy pixels 2 pixels 22 25 Effective signal 26 1 SDATA 29 30 2 3 EN 33 34 4 5 SCLK 37 6 2H 174CK 38 41 7 8 ESR; N/A 660 pixels Effective pixels 42 9 13H 45 46 10 11 VD 3H 49 12 HD 50 53 13 14 Vertical period 54 15 16 Signal output format (internal sync in monitoring mode) 1V=263H 25 23 24 22 20 21 18 19 17 Long storage time mode 1) Setting mode (1) External sync mode Intermittent mode by skipping VRR input Electronic shutter can be set by 1H from 1V to 16V (2) Internal sync mode Electronic shutter speed (storage time) Long storage 2V 3V : 15V 16V Setting value D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 1 1 : 1 1 1 1 : 1 1 0 0 : 0 0 0 0 : 0 0 0 0 : 0 0 0 0 : 0 0 0 0 : 1 1 0 0 : 1 1 0 1 : 1 1 1 0 : 0 1 13 Timing diagram for long storage mode Long storage mode on external sync mode 1V 16V 15V 14V 13V 12V 11V 10V 6V 5V 4V 3V 2V 1V 16V Normal storage operation VRR ESR Storage time=262H Signal output (assumed as analog output) Long storage mode from 1V to 16V by 1H Example 1 VRR FBC_OFF Command setting ESR Storage time=1V+262H Signal output (assumed as analog output) Example 2 VRR FBC_OFF Command setting ESR Storage time=15V+262H Signal output (assumed as analog output) Note: ESR can be set from 1H to 524H, or set to OFF(HI) Long strorage mode on internal sync mode Normal storage operation 1V 16V 15V 14V 13V 12V 11V 10V 6V 5V 4V 3V 2V 1V 16V When Electrical shutter speed is set to 262H VD STR Signal output (assumed as analog output) Long storage mode from 2V to 16V by 1V Example 1 VD FBC_OFF Command setting STR Storage time=2V Signal output (assumed as analog output) Example 2 VD FBC_OFF Command setting STR Storage time=16V Signal output (assumed as analog output) 14 Package outline 15 IC socket(tentative) The cover is not available for this socket.