VNQ690SP-E QUAD CHANNEL HIGH SIDE DRIVER Figure 1. Package Table 1. General Features Type VNQ690SP-E RDS(on) Iout VCC 90m (*) 10A 36V (*) Per each channel OUTPUT CURRENT PER CHANNEL: 10A CMOS COMPATIBLE INPUTS OPEN LOAD DETECTION (OFF STATE) UNDERVOLTAGE & OVERVOLTAGE n SHUT- DOWN OVERVOLTAGE CLAMP THERMAL SHUT-DOWN CURRENT LIMITATION VERY LOW STAND-BY POWER DISSIPATION PROTECTION AGAINST: n LOSS OF GROUND & LOSS OF VCC REVERSE BATTERY PROTECTION (**) IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE 10 1 PowerSO-10TM DESCRIPTION The VNQ690SP-E is a monolithic device made by using| STMicroelectronics VIPower M0-3 Technology, intended for driving resistive or inductive loads with one side connected to ground. This device has four independent channels. Built-in thermal shut down and output current limitation protect the chip from over temperature and short circuit. Table 2. Order Codes Package PowerSO-10TM Tube VNQ690SP-E Tape and Reel VNQ690SPTR-E Note: (**) See application schematic at page 9 Rev. 1 October 2004 1/20 VNQ690SP-E Figure 2. Block Diagram VCC OVERVOLTAGE UNDERVOLTAGE DEMAG 1 DRIVER 1 OUTPUT 1 ILIM1 INPUT 1 DEMAG 2 INPUT 2 DRIVER 2 OUTPUT 2 ILIM2 INPUT 3 LOGIC DEMAG 3 DRIVER 3 INPUT 4 STATUS OUTPUT 3 ILIM3 STATUS DEMAG 4 DRIVER 4 OUTPUT 4 OVERTEMP. 1 ILIM4 OVERTEMP. 2 OVERTEMP. 3 OPEN LOAD OFF-STATE OVERTEMP. 4 GND Table 3. Absolute Maximum Ratings Symbol Parameter VCC Supply voltage (continuous) -VCC Reverse supply voltage (continuous) IOUT Output current (continuous), per each channel Value Unit 41 V -0.3 V Internally limited A -15 A IR Reverse output current (continuous), per each channel IIN Input current +/- 10 mA ISTAT Status current +/- 10 mA IGND Ground current at TC<25C (continuous) -200 mA - INPUT 4000 V - STATUS 4000 V - OUTPUT 5000 V - VCC 5000 V 78 W 53 mJ Junction operating temperature -40 to 150 C Storage temperature -65 to 150 C Electrostatic Discharge (Human Body Model: R=1.5K; C=100pF) VESD Ptot EMAX Tj Tstg 2/20 Power dissipation at TC=25C Maximum Switching Energy (L=0.38mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=14A) VNQ690SP-E Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins STATUS INPUT 4 INPUT 3 INPUT 2 INPUT 1 6 7 8 9 5 4 3 10 1 GND OUTPUT 4 OUTPUT 3 OUTPUT 2 OUTPUT 1 2 11 VCC Connection / Pin Status Floating X To Ground N.C. X X Output X Input X Through 10K resistor Figure 4. Current and Voltage Conventions IS IIN1 INPUT 1 VCC OUTPUT 1 IIN2 VIN1 IIN3 IOUT2 IOUT3 VCC VOUT1 VOUT2 OUTPUT 3 INPUT 3 VOUT3 IOUT4 VIN3 IIN4 OUTPUT 4 INPUT 4 VIN4 VF1 (*) OUTPUT 2 INPUT 2 VIN2 IOUT1 STATUS VSTAT ISTAT VOUT4 GND IGND (*) VFn = VCCn - VOUTn during reverse battery condition Table 4. Thermal Data Symbol Rthj-case Rtj-amb Parameter Thermal resistance junction-case (MAX) per channel Thermal resistance junction-ambient (MAX) Value 2 52 (1) 37 (2) Unit C/W C/W Note: 1. When mounted on a standard single-sided FR-4 board with 0.5cm of Cu (at least 35 m thick) Note: 2. When mounted on a standard single-sided FR-4 board with 6cm of Cu (at least 35 m thick). 3/20 VNQ690SP-E ELECTRICAL CHARACTERISTICS (VCC=6V up to 24V; -40C<Tj<150C unless otherwise specified) Table 5. Power (Per each channel) Symbol Parameter VCC (#) Test Conditions Min. Typ. Max. Unit Operating supply voltage 6 13 36 V VUSD (#) Undervoltage shutdown 3.5 4.6 6 V VUVhyst (#) Undervoltage hysteresis 0.2 1 V VOV (#) Overvoltage shutdown 36 V VOVhyst (#) Overvoltage hysteresis 0.25 V Off state; VIN=VOUT =0V; VCC=13.5V IS (#) RON Supply current On state resistance A 12 40 Tj=25C 12 25 A On state; VIN=3.25V; 9V<VCC<18V 6 12 mA IOUT=1A; Tj=25C; 9V<VCC<18V 90 m IOUT=1A, Tj=150C; 9V<VCC<18V 180 m 0 50 A -75 0 A Off state; VIN=VOUT =0V; VCC=13.5V IL(off1) Off State Output Current VIN=VOUT=0V IL(off2) Off State Output Current VIN=0V; VOUT =3.5V IL(off3) Off State Output Current VIN=VOUT=0V; VCC=13V; Tj =125C 5 A IL(off4) Off State Output Current VIN=VOUT=0V; VCC=13V; Tj =25C 3 A Note: (#) Per device. Table 6. Protection (see note 1) (per each channel) Symbol Min. Typ. Max. Unit Shutdown temperature 150 170 200 C TR Reset temperature 135 Thyst Thermal hysteresis 7 15 ILIM DC Short circuit current 10 14 Vdemag Turn-off output voltage clamp TTSD VSTAT Parameter Status low output voltage Test Conditions C 25 C 20 A 20 A VCC-55 V ISTAT =1.6mA 0.5 V 9V<VCC<36V 6V<VCC<36V IOUT =2A; VIN=0V; L=6mH VCC-41 VCC-48 ILSTAT Status leakage current Normal operation; VSTAT=5V 10 A CSTAT Status pin input capacitance Normal operation; VSTAT=5V 25 pF VSCL Status clamp voltage 8 V ISTAT =1mA ISTAT =-1mA 6 6.8 -0.7 V Note: 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles 4/20 VNQ690SP-E ELECTRICAL CHARACTERISTICS (continued) Table 7. VCC - Output Diode Symbol VF Parameter Forward on Voltage Test Conditions -IOUT=0.9A; Tj=150C Min Typ Max 0.6 Unit V Typ 30 30 See relative diagram See relative diagram Max Unit s s Typ Max Unit 20 s 3.5 V 300 s Max 1.25 Unit V V V A A V Table 8. Switching (V CC=13V) Symbol td(on) td(off) Parameter Turn-on delay time Turn-off delay time Test Conditions RL=13 channels 1,2,3,4 RL=13 channels 1,2,3,4 dVOUT /dt(on) Turn-on voltage slope RL=13 channels 1,2,3,4 dVOUT /dt(off) Turn-off voltage slope RL=13 channels 1,2,3,4 Min V/s V/s Table 9. Openload Detection (off state) per each channel Symbol tSDL VOL TDOL Parameter Status Delay Openload Voltage Detection Threshold Openload Detection Delay at Turn Off Test Conditions See Figure 1 (Openload detection reading must be performed after TDOL). Min VIN=0V 1.5 2.5 VCC=18V Table 10. Logic Input Symbol VIL VIH VHYST IIH IIL VICL Parameter Input Low Level Voltage Input High Level Voltage Input Hysteresis Voltage Input high level voltage Input Current Input Clamp Voltage Test Conditions Min Typ 3.25 0.5 VIN=3.25V VIN=1.25V IIN=1mA 10 1 6 IIN=-1mA 6.8 8 -0.7 V Figure 5. Status Timing Waveforms OPENLOAD STATUS TIMING OVERTEMP STATUS TIMING VIN VIN VSTAT VSTAT tDOL tSDL tSDL tSDL 5/20 VNQ690SP-E Table 11. Truth Table (Per each channel) CONDITIONS INPUT Normal Operation Overtemperature Undervoltage Overvoltage Current Limitation Output Voltage > VOL OUTPUT SENSE L L H H H H L L H H L L L L X H L X L L H H L H L L H H X H L H L H H H Figure 6. Switching Characteristics VLOAD 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% t VIN td(on) tr td(off) t 6/20 VNQ690SP-E Table 12. Electrical Transient Requirements ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 I II TEST LEVELS III IV -25 V +25 V -25 V +25 V -4 V -50 V +50 V -50 V +50 V -5 V -75 V +75 V -100 V +75 V -6 V -100 V +100 V -150 V +100 V -7 V ISO T/R Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 Test Levels Result 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I C C C C C C II C C C C C E III C C C C C E IV C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. 7/20 VNQ690SP-E Figure 7. Waveforms NORMAL OPERATION INPUTn LOAD VOLTAGEn STATUS UNDERVOLTAGE VUSDhyst VCC VUSD INPUTn LOAD VOLTAGEn STATUS undefined OVERVOLTAGE VCC<VOV VCC>VOV VCC INPUTn LOAD VOLTAGEn STATUS OPENLOAD with external pull-up INPUTn LOAD VOLTAGEn VOL STATUS tDOL Tj INPUTn LOAD CURRENTn STATUS 8/20 TTSD TR OVERTEMPERATURE tDOL VNQ690SP-E Figure 8. Application Schematic +5V +5V VCC Rprot STATUS Dld Rprot INPUT1 OUTPUT1 C Rprot INPUT2 OUTPUT2 Rprot INPUT3 OUTPUT3 INPUT4 OUTPUT4 Rprot GND RGND VGND DGND Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2. GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / (IS(on)max). 2) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device's datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected. LOAD DUMP PROTECTION Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table. 9/20 VNQ690SP-E C I/Os PROTECTION: If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k. 10/20 VNQ690SP-E Figure 12. High Level Input Current Figure 9. Off State Output Current IL(off1) (A) Iih (A) 3.5 5 3.25 4.5 Vin=3.25V Vcc=24V Vout=0V 3 4 2.75 3.5 2.5 3 2.25 2.5 2 2 1.75 1.5 1.5 1 1.25 0.5 1 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) 50 75 100 125 150 175 100 125 150 175 150 175 Tc (C) Figure 13. Input Low Level Figure 10. Input High Level Vih (V) Vil (V) 4 2.6 3.75 2.4 3.5 2.2 3.25 2 3 1.8 2.75 1.6 2.5 1.4 2.25 1.2 2 1 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) 50 75 Tc (C) Figure 11. Input Clamp Voltage Figure 14. Input Hysteresis Voltage Vicl (V) Vihyst (V) 8 1.4 1.3 7.75 Iin=1mA 1.2 7.5 1.1 7.25 1 7 0.9 6.75 0.8 6.5 0.7 6.25 0.6 6 0.5 -50 -25 0 25 50 75 Tc (C) 100 125 150 175 -50 -25 0 25 50 75 100 125 Tc (C) 11/20 VNQ690SP-E Figure 15. Overvoltage Shutdown Figure 18. Openload Off State Detection Threshold Vov (V) Vol (V) 50 5 47.5 4.5 Vin=0V 45 4 42.5 3.5 3 40 2.5 37.5 2 35 1.5 32.5 1 0.5 30 -50 -25 0 25 50 75 100 125 150 175 0 -50 Tc (C) -25 0 25 50 75 100 125 150 175 150 175 Tc (C) Figure 16. Turn-on Voltage Slope Figure 19. Turn-off Voltage Slope dVout/dt(on) (V/ms) dVout/dt(off) (V/ms) 500 600 450 550 Vcc=13V RI=13Ohm 400 Vcc=13V RI=13Ohm 500 350 450 300 400 250 350 200 300 150 250 100 200 50 150 0 -50 -25 0 25 50 75 100 125 150 175 100 -50 -25 0 25 50 Tc (C) 75 100 125 Tc (C) Figure 17. ILIM Vs Tcase Figure 20. On State Resistance Vs VCC Ilim (A) Ron (mOhm) 25 160 Tc= 150C 22.5 140 Vcc=13V 20 120 17.5 Iout=1A 100 15 80 12.5 Tc= 25C 10 60 7.5 40 Tc= -40C 5 20 -50 -25 0 25 50 75 Tc (C) 12/20 100 125 150 175 0 5 10 15 20 Vcc (V) 25 30 35 40 VNQ690SP-E Figure 21. On State Resistance Vs Tcase Figure 23. Status Clamp Voltage Ron (mOhm) Vscl (V) 160 7.4 7.3 140 Iout=1A Vcc=9V; 18V & 36V 120 Istat=1mA 7.2 100 7.1 80 7 60 6.9 40 6.8 20 6.7 6.6 0 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 22. Status Leakage Current Figure 24. Status Low Output Voltage Ilstat (A) Vstat (V) 0.05 0.8 0.045 0.7 Vstat=5V Istat=1.6mA 0.04 0.6 0.035 0.5 0.03 0.4 0.025 0.3 0.02 0.2 0.015 0.1 0.01 0 -50 -25 0 25 50 75 Tc (C) 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (C) 13/20 VNQ690SP-E Figure 25. Maximum turn off current versus load inductance ILMAX (A) 100 10 A B C 1 0.01 0.1 A = Single Pulse at TJstart=150C B= Repetitive pulse at T Jstart=100C C= Repetitive Pulse at T Jstart=125C Conditions: VCC=13.5V 1 L(mH) 10 100 Values are generated with R L=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 14/20 VNQ690SP-E PowerSO-10TM Thermal Data Figure 26. PowerSO-10TM PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: from minimum pad lay-out to 8cm2). Figure 27. Rthj-amb Vs PCB copper area in open box free air condition RTHj_amb (C/W) 55 Tj-Tamb=50C 50 45 40 35 30 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) 15/20 VNQ690SP-E Figure 28. PowerSO-10 Thermal Impedance Junction Ambient Single Pulse ZTH (C/W) 1000 100 Footprint 6 cm2 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 Time (s) Figure 29. Thermal fitting model of a double channel HSD in PowerSO-10 10 100 1000 Pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tp T Table 13. Thermal Parameter Tj_1 C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd1 Tj_2 C1 C2 R1 R2 Pd2 T_amb 16/20 Area/island (cm2) R1 (C/W) R2 (C/W) R3( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C) Footprint 0.05 0.3 0.3 0.8 12 37 0.001 5.00E-03 0.02 0.3 0.75 3 6 22 5 VNQ690SP-E PACKAGE MECHANICAL Table 14. PowerSO-10TM Mechanical Data millimeters Symbol Min A A (*) A1 B B (*) C C (*) D D1 E E2 E2 (*) E4 E4 (*) e F F (*) H H (*) h L L (*) a (*) Typ Max 3.35 3.4 0.00 0.40 0.37 0.35 0.23 9.40 7.40 9.30 7.20 7.30 5.90 5.90 3.65 3.6 0.10 0.60 0.53 0.55 0.32 9.60 7.60 9.50 7.60 7.50 6.10 6.30 1.27 1.25 1.20 13.80 13.85 1.35 1.40 14.40 14.35 0.50 1.20 0.80 0 2 1.80 1.10 8 8 Note: (*) Muar only POA P013P Figure 30. PowerSO-10TM Package Dimensions B 0.10 A B 10 H E E2 E4 1 SEATING PLANE e B DETAIL "A" h A C 0.25 D = D1 = = = SEATING PLANE A F A1 A1 L DETAIL "A" P095A 17/20 VNQ690SP-E Figure 31. PowerSO-10TM Suggested Pad Layout And Tube Shipment (No Suffix) CASABLANCA 14.6 - 14.9 MUAR B 10.8 - 11 C 6.30 C A A B 0.67 - 0.73 1 9.5 2 3 4 5 10 9 8 7 6 0.54 - 0.6 All dimensions are in mm. 1.27 Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) Casablanca 50 1000 532 10.4 16.4 0.8 Muar 50 1000 532 4.9 17.2 0.8 Figure 32. Tape And Reel Shipment (suffix "TR") REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 600 600 330 1.5 13 20.2 24.4 60 30.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 24 4 24 1.5 1.5 11.5 6.5 2 End All dimensions are in mm. Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 18/20 500mm min VNQ690SP-E REVISION HISTORY Date Oct. 2004 Revision 1 - First Issue. Description of Changes 19/20 VNQ690SP-E Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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