TSA 1401 APPL ICATION INF ORMATION
12/19
5 APPLICATION INFOR MATION
The TSA1401 is a High Speed Analog to Digital
conv er ter based on a pipeline architecture and the
latest deep sub m icron CMO S process to achiev e
the best performances in terms of linearity and
power consumption.
The pipeline structure consists of 14 internal
conversion stages in which the analog signal is
fed and sequentially con verted into digital data.
Each of the 14 stages consists of an Analog to
Digital converter, a Digital to Analog converter, a
Sample and Hold and an amplifier (gain=2). A 1.5-
bit conversion resolution is achieved in each
stage. Each resulting LSB-MSB couple is then
time-shifted to recover from the delay caused by
conversion. Digital data correction completes the
proce ssin g by recov ering from the redunda ncy of
the (LSB-MSB) couple for each stage. The
corrected data are outputted through the digital
buffers.
Signal input is sampled on the rising edge of the
clock while digital outputs are delivered on the
falling edge of the clock.
The ad vantages of such a convert er reside in the
combin ation of pipeline archit ecture and the most
advanced technologies. The highest dynamic
performances are achieved while consumption
remains at the lowest level.
5.1 Analog Input Configuration
5.1.1 Analog input level and references
To maximize the TSA1401’s high-resolution and
speed, it is advisable to drive the analog input
differentially. The full scale of TSA1401 is
adjust ed throug h the voltage value of VREFP and
VREFM:
VIN-VINB=2(VREFP-VREFM)
The differential analog input signal always
prese nts a common mo de voltage, CM:
CM=(VIN+VINB)/2
In order for the user to select the right full scale
according to the application, a control pin,
REFMODE, allows to switch from internal to
external references.
Internal references, common mode:
When REFMODE is set to VIL level, TSA1401
operates wi th its own reference voltage generated
by its internal bandg ap. VREFM pin is connected
externally to the Analog Ground while VREFP is
set to its internal voltage (0. 86V ). The full scale of
the ADC when using i nternal references is 1.8Vpp
(to reduc e t he full scale if desired, VREFM may be
forced externally).
In this case VREFP and INCM are low impedance
outpu ts. INCM pin (voltage g enerator 0.46V) may
be used to supply the common mode, CM of the
analog inp ut signal.
External references, common mode:
In applications requiring a different full scale
magnitude, it is possible to force externally
VREFP and INCM (REFM must be connected to
analog groun d or forced externally).
REFMODE set to VIH level will put in standby
mode the internal references. In this case,
VREFP, INCM are high impedance inputs and
have to be forced by external references.
TSA1401 shows better performances when the
full scale is increased by the use of external
references (see
Figure 10
and
11
).
Fig. 10: Linearity vs. VREFP
Fin=5MHz;Fs=20Mhz;Icca=26mA;INCM=0.45V
65
68
71
74
77
80
0.8 0.9 1 1.1 1.2 1.3 1.4
REFP