Data Sheet, Rev.2, Feb. 2005
Power Management & Supply
Never stop thinking.
Boost Controller
TDA4863
Power Factor Controller
IC for High Power Factor
and Low THD
Edition 2005-02
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München, Germany
© Infineon Technologies AG 2005.
All Rights Reserved.
Attention please!
The information herein is give n to describe certain components and shall not be considered as warranted
characteristics.
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circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
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TDA4863
Revision History: 2005-02 Rev.2
Previous Version:
Page Subjects (major changes since last revision)
Document’s layout has been changed: 2002-Sep.
Added green Package and RoHS-compliance
TDA4863
Table of Contents Page
Data Sheet 3 Rev.2, 2005-02
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Improvements Referred to TDA 4862 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.4 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.5 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2 Functional Desc ription . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 IC Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Voltage Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Overvoltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.5 Multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.6 Current Sense Comparator, LEB and RS Flip-Flop . . . . . . . . . . . . . . . . . . 10
2.7 Zero Current Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.8 Restart Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.9 Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.10 Gate Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.11 Signal Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.3 Electrical Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4 Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1 Results of THD Measurements with Application Board Pout = 110 W . . . . 22
Data Sheet 4 Rev.2, 2005-02
Type Ordering Code Package
TDA4863 Q67040-S4452 PG-DIP-8-4
TDA4863G Q67040-A4451 PG-DSO-8-3
Power Factor Controller
IC for High Power Factor
and Low THD
TDA4863
Rev. 2 Boost Controller
PG-DIP-8-4
PG-DSO-8-3
1Overview
1.1 Features
• IC for sinusoidal line-current consumption
• Power factor achieves nearly 1
• Controls boost converter as active harmonic
filter for low THD
• Start up with low current consumption
• Zero current detector for discontinuous
operation mode
• Output overvoltage protection
• Output undervoltage lockout
• Internal start up timer
• Totem pole output with active shut down
• Internal leading edge blanking LEB
• Pb-free lead plating; RoHS compliant
1.2 Improvements Referred to TDA 4862
• Suitable for universal input applications with low THD at low load conditions
• Very low start up current
• Accurate OVR and VISENSEmax threshold
• Competition compatible VCC thresholds
• Enable threshold referred to VVSENSE
TDA4863
Overview
Data Sheet 5 Rev.2, 2005-02
Figure 1 Typical application
1.3 Description
The TDA4863 IC controls a boost converter in a way that sinusoidal current is taken from
the single phase line supply and stabilized DC voltage is available at the output. This
active harmonic filter limits the harmonic currents resulting from the capacitor pulsed
charge currents during rectification. The power factor which describes the ratio between
active and apparent power is almost one. Line voltage fluctuations can be compensated
very efficiently.
AC line DC Output
Volage
GND
TDA4863
RF-Filter
and
Rectifier
TDA4863
Overview
Data Sheet 6 Rev.2, 2005-02
1.4 Pin Configuration
Figure 2 Pin Configuration of TDA4863
1 VSENSE
2 VAOUT
3 MULTIN
4 ISENSE
8 VCC
7 GTDRV
6 GND
5 DETIN
TDA4863
Overview
Data Sheet 7 Rev.2, 2005-02
Pin Definitions and Functions
Pin Symbol Description
1 VSENSE Voltage Amplifier Inverting Input
VSENSE is connected via a resistive divider to the boost converter
output. With a capacitor connected to VAOUT the inte rn al error
amplifier acts as an integrator.
2 VAOUT Voltage Amplifier Output
VVAOUT is connected internally to the first multiplier input. To prevent
overshoot the input voltage is clamped internally at 5 V. If VVAOUT is
less than 2.2 V the gate driver is inhibited. If the current flowing into
this pin exceeds an internal threshold the multiplier output voltage is
reduced to prevent the MOSFET from overvoltage damage.
3MULTINMultiplier Input
MULTIN is the second multiplier input and is connected via a resistive
divider to the rectifier output voltage.
4 ISENSE Current Sense Input
ISENSE is connected to a sense resistor controlling the MOSFET
source current. The input is internally clamped at -0.3 V to prevent
negative input voltage interaction. A leading edge blanking circuitry
suppresses voltage spikes when turning the MOSFET on.
5DETINZero Current Detector Input
DETIN is connected to an auxiliary winding and monitors the zero
crossing of the inductor current.
6GNDGround
7GTDRVGate Driver Output
GTDRV is the output of a totem-pole circuitry for direct driving a
MOSFET. An active shutdown circuitry ensures that GTDRV is set to
low if the IC is switched off.
8VCC Positive Voltage Supply
If VCC exceeds the turn-on threshold the IC is switched on. When VCC
falls below the turn-off threshold the IC is switched off. In switch off
mode power consumption is very low. Two capacitors should be
connected to VCC. An electrolytic capacitor and 100 nF ceramic
capacitor which is used to absorb fast supply current spikes. Make
sure that the electrolytic capacitor is discharged before the IC is
plugged into the application board.
TDA4863
Overview
Data Sheet 8 Rev.2, 2005-02
1.5 Block Diagram
Figure 3 Internal Block Diagram
0.2V GTDRV
Reference
Voltage
Vref
Gate
Drive
+
-
Voltage
Amp Multiplier
RS
Flip-Flop
+
-
UVLO
Restart
Timer
+
-
Detector
VSENSE VAOUT MULTIN ISENSE
DETINVCC GND
+
-
Current
Comp
multout
+
+
-
-Inhibit
time delay
2.2V
2.5V
uvlo
active
shut down
1.5V
1.0V
12.5V
10V
tdVA=2us
tres=150us
tdsd=70ns
20V
+
1V
Inhibit
Enable
OVR
0.5V
1V
3.5V
Vref
-
+
+
-
Clamp
Current
5V
+
-
5.4V
LEB
40k
5p
TDA4863
Functional Description
Data Sheet 9 Rev.2, 2005-02
2 Functional Description
2.1 Introduction
Conventional electronic ballasts and switch mode power supplies are designed with a
bridge rectifier and a bulk capacitor. Their disadvantage is that the circuit draws power
from the line when the instantaneous AC voltage exceeds the capacitors voltage. This
occurs near the line voltage peak and causes a high charge current spik e with following
characteristics: The apparent power is higher than the real power that means low power
factor condition, the current spikes are non sinusoidal with a high content of harmonics
causing line noise, the rectified voltage depends on load condition and requires a large
bulk capacitor, special efforts in noise suppression are necessary.
With the TDA4863 preconverter a sinusoidal current is achieved which varies in direct
instantaneous proportional to the input voltage half sine wave and so provides a power
factor near 1. This is due to the appearance of almost any complex load like a resistive
one at the AC line. The harmonic distortions are reduced and comply with the IEC555
standard requirements.
2.2 IC Description
The TDA4863 contains a wide bandwidth voltage amplifier used in a feedback loop, an
overvoltage regulator, an one quadrant multiplier with a wide linear operating range, a
current sense comparator, a zero current detector, a PWM and logic circuitry, a totem-
pole MOSFET driver, an internal trimmed voltage reference, a restart timer and an
undervoltage lockout circuitry.
2.3 Voltage Amplifier
With an external capacitor between the pins VSENSE and VAOUT the voltage amplifier
acts like an integrator. The integrator monitors the average output voltage over several
line cycles. Typically the integrator´s bandwidth is set below 20 Hz in order to suppress
the 100 Hz ripple of the rectified line voltage. The voltage amplifier is internally
compensated and has a gain bandwidth of 5 MHz (typ.) and a phase margin of 80
degrees. The non-inverting input is biased internally to 2.5 V. The output is directly
connected to the multip lier input.
The gate drive is disabled when VSENSE voltage is less than 0.2 V or VAOUT voltage
is less than 2.2 V.
If the MOSFET is placed nearby the controller switching interferences have to be taken
into account. The output of the voltage amplifier is designed in a way to minimize these
inteferences.
TDA4863
Functional Description
Data Sheet 10 Rev.2, 2005-02
2.4 Overvoltage Regulator
Because of the integrator´s low bandwidth fast changes of the output voltage can’t be
regulated within an adequate time. Fast output changes occur during initial start-up,
sudden load removal, or output arcing. While the integrator´s differential input voltage
remains zero during this fast changes a peak current is flowing through the external
capacitor into pin VAOUT. If this current exceeds an internal defined margin the
overvoltage regulator circuitry reduces the multiplier output voltage. As a result the on
time of the MOSFET is reduced.
2.5 Multiplier
The one quadrant multiplier regulates the gate driver with respect of the DC output
voltage and the AC half wave rectified input voltage. Both inputs are designed to achieve
good linearity over a wide dynamic range to represent an AC line free from distortion.
Special efforts have been made to assure universal line applications with respect to a 90
to 270 V AC range.
The multiplier output is internally clamped to1.3 V. So the MOSFET is protected against
critical operating during start up.
2.6 Current Sense Comparator, LEB and RS Flip-Flop
The source current of the MOS transistor is transferred into a sense voltage via the
external sense resistor. The multiplier output voltage is compared with this sense
voltage. Switch on time of the MOS transistor is determined by the comparision result
To protect the current comparator input from negative pulses a current source is inserted
which sends current out of the ISENSE pin every time when VISENSE-signal is falling
below ground potential. An internal RC-filter is connected at the ISENSE pin which
smoothes the switch-on current spike.The remaining switch-on current spike is blanked
out via a leading edge blanking circuit with a blanking time of typ. 200 ns.
The RS Flip-Flop ensures that only one single switch-on and switch-off pulse appears at
the gate drive output during a given cycle (double pulse suppression).
2.7 Zero Current Detector
The zero current detector senses the inductor current via an auxiliary winding and
ensures that the next on-time of the MOSFET is initiated immediately when the inductor
current has reached zero. This reduces the reverse recovery losses of the boost
converter diode to a minimum. The MOSFET is switched off when the voltage drop of
the shunt resistor exceeds the voltage level of the multiplie r output. So the boost current
waveform has a triangular shape and there are no deadtime gaps between the cycles.
This leads to a continuous AC line current limiting the peak current to twice of the
average current.
TDA4863
Functional Description
Data Sheet 11 Rev.2, 2005-02
To prevent false tripping the zero current detector is designed as a Schmitt-Trigger with
a hysteresis of 0.5 V. An internal 5 V clamp protects the input from overvoltage
breakdown, a 0.6 V clamp prevents substrate injection. An external resistor has to be
used in series with the auxiliary winding to limit the current through the clamps.
2.8 Restart Timer
The restart timer function eliminates the need of an oscillator. The timer starts or restarts
the TDA4863 when the driver output has been off for more than 150 µs after the inductor
current reaches zero.
2.9 Undervoltage Lockout
An undervoltage lockout circuitry switches the IC on when VCC reaches the upper
threshold VCCH and switches the IC off when VCC is falling below the lower threshold VCCL.
During start up the supply current is less then 100 µA.
An internal voltage clamp has been added to protect the IC from VCC overvoltage
condition. When using this clamp special care must be taken on power dissipation.
Start up current is provided by an external start up resistor which is connected from the
AC line to the input supply voltage VCC and a storage capacitor which is connected from
VCC to ground. Be aware that this capacitor is discharged before the IC is plugged into
the application board. Otherwise the IC can be destroyed due to the high capacitor
voltage.
Bootstrap power supply is created with the previous mentioned auxiliary winding and a
diode (see “Application Circuit” on Page 21).
2.10 Gate Drive
The TDA4863 totem pole output stage is MOSFET compatible. An internal protection
ciruitry is activated when VCC is within the start up phase and ensures that the MOSFET
is turned off. The totem pole output has been optimized to minimize cross conduction
current during high speed operation.
TDA4863
Functional Description
Data Sheet 12 Rev.2, 2005-02
2.11 Signal Diagrams
Figure 4 Typical signals
DETIN
GTDRV
LEB
VISENSE multout
IVAOUT
Icoil
I
OVR
TDA4863
Electrical Characteristics
Data Sheet 13 Rev.2, 2005-02
3 Electrical Characteristics
3.1 Absolute Maximum Ratings
Parameter Symbol Limit Values Unit Remarks
min. max.
Supply + Zener Current ICCH + IZ20 mA
Supply Voltage VCC -0.3 VZVVZ = Zener
Voltage
ICC+IZ = 20 mA
Voltage at Pin 1,3,4 -0.3 6.5
Current into Pin 2 IVAOUT
-10
40 mA VVAOUT =4V,
VVSENSE =2.8V
VVAOUT =0V,
VVSENSE =2.3V
t<1ms
Current into Pin 5 IDETIN -10 10 DETIN > 6 V
DETIN < 0.4 V
t<1ms
Current into Pin 7 IGTDRV -500 500 t<1ms
ESD Protection 2000 V MIL STD 883C
method 3015.6,
100 pF,1500 Ω
Storage Temperature Tstg -50 150 °C
Operating Junction Temperature TJ-40 150
Thermal Resistance
Junction-Ambient RthJA 100
180 K/W PG-DIP-8-4
PG-DSO-8-3
TDA4863
Electrical Characteristics
Data Sheet 14 Rev.2, 2005-02
3.2 Characteristics
Unless otherwise stated, -40°C < Tj < 150°C, VCC = 14.5 V
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Start-Up circuit
Zener Voltage VZ18 20 22 V ICC +IZ=20mA
Start-up Supply Current ICCL 20 100 µA
V
CC
=
V
CCON
-0.5 V
Operating Supply Current ICCH 4 6 mA Output low
VCC Turn-ON Threshold VCCON 12 12.5 13 V
VCC Turn-OFF Threshold VCCOFF 9.5 10 10. 5
VCC Hysteresis VCCHY 2.5
Voltage Amplifier
Voltage feedback Input
Threshold VFB 2.45 2.5 2.55 V
Line Regulation VFBLR 5mV
V
CC
=12V to 16V
Open Loop Voltage Gain1) GV100 dB
Unity Gain Bandwidth1) BW5MHz
Phase Margin1) M80Degr
Bias Current VSENSE IBVSENSE -1.0 -0.3 µA
Enable Threshold VVSENSE 0.17 0.2 0.25 V
Inhibit Threshold Voltage VVAOUTI 2.1 2.2 2.3 VISENSE =-0.38V
Inhibit Time Delay tdVA 3µsVISENSE =-0.38V
Output Current Source IVAOUTH -6 mA VVAOUT =0V
VVSENSE =2.3V,
t<1ms
Output Current Sink IVAOUTL 35 VVAOUT =4V
VVSENSE =2.8V,
t<1ms
Upper Clamp Voltage VVAOUTH 4.8 5.4 6.0 V VVSENSE =2.3V,
IVAOUT =-0.2mA
Lower Clamp Voltage VVAOUTL 0.8 1.1 1.4 V VVSENSE =2.8V,
IVAOUT =0.5mA
1) Guaranteed by design, not tested
TDA4863
Electrical Characteristics
Data Sheet 15 Rev.2, 2005-02
Overvoltage Regulator
Threshold Current IOVR 35 40 45 µA Tj= 25°C ,
VVAOUT = 3.5 V
Current Comparator
Input Bias Current IBISENSE -1 -0.2 1 µA VISENSE =0V
Input Offset Voltage
(Tj = 25 °C) VISENSEO 25 mV VVAOUT =2.7V
VMULTIN = 0 V
Max Threshold Voltage VISENSEM 0.95 1.0 1.05 V
Threshold at OVR VISENOVR 0.05 IOVR =50µA
Leading Edge Blanking tLEB 100 200 300 ns
Shut Down Delay tdISG 80 130
Detector
Upper Threshold Voltage VDETINU 1.5 1.6 V
Lower Threshold Voltage VDETINL 0.95 1.1
Hysteresis VDETINHY 0.25 0.4 0.55
Input Current IBDETIN -1 -0.2 1 µA VDETIN =2V
Input Clamp Voltage
High State
Low State VDETINHC
VDETINLC
4.5
0.1 4.9
0.4 5.4
0.7
VIDETIN =5mA
IDETIN =-5mA
Multiplier
Input bias current IBMULTIN -1 -0.2 1 µA VMULTIN =0V
Dynamic voltage range
MULTIN VMULTIN 0 to 4 V VVAOUT =2.75V
Dynamic voltage range
VAOUT VVAOUT VFB to
VFB +
1.5
VMULTIN =1V
Multiplier Gain Klow
Khigh
0.3
0.7
VVAOUT <3V,
VMULTIN =1V
VVAOUT >3.5V,
VMULTIN =1V
K=deltaVISENSE/deltaVVAOUT at VMULTIN = constant
3.2 Characteristics (cont’d)
Unless otherwise stated, -40°C < Tj < 150°C, VCC = 14.5 V
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
TDA4863
Electrical Characteristics
Data Sheet 16 Rev.2, 2005-02
Restart Timer
Restart time tRES 100 160 250 µs
Gate Drive
Output voltage low state VGTL 0.3 V IGT =0mA
Output voltage low state VGTL 1.0 V IGT =2mA
1.7 IGT =20mA
2.2 IGT = 200 mA
Output voltage high state VGTH 10.8 IGT =-5mA,
see “Gate Drive
Voltage High
State versus
Vcc” on Page 20
Output voltage active shut
down VGTSD 11.25 IGT =20mA,
VCC =9V
Rise time trise 80 130 ns CGT = 4.7nF
VGT = 2...8 V
Fall time tfall 55 130
3.2 Characteristics (cont’d)
Unless otherwise stated, -40°C < Tj < 150°C, VCC = 14.5 V
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
TDA4863
Electrical Characteristics
Data Sheet 17 Rev.2, 2005-02
3.3 Electrical Diagrams
Icc versus Vcc
Iccl versus Vcc
VCCON/OFF versus Temperature
ICCL versus Temperature, VCC = 10 V
0
0,5
1
1,5
2
2,5
3
3,5
4
4,5
5
0 5 10 15 20
Vcc/V
Icc / mA
VCC ON
VCC OFF
0
5
10
15
20
25
30
35
40
45
50
0246810121416
Vcc / V
Iccl / uA
7
8
9
10
11
12
13
14
-40 0 40 80 120 160
Tj / °C
Vcc / V
VCC ON
VCC OFF
0
5
10
15
20
25
30
35
40
45
50
-40 0 40 80 120 160
Tj / °C
ICCL / uA
TDA4863
Electrical Characteristics
Data Sheet 18 Rev.2, 2005-02
VFB versus Temperat ure
(pin1 connected to pin2)
Overvoltage Regulator VISENSE
versus Threshold Voltage
Open Loop Gain and Phase versus
Frequency
Leading Edge Blanking
versus Temperature
2,45
2,46
2,47
2,48
2,49
2,5
2,51
2,52
2,53
2,54
2,55
-40 0 40 80 120 160
Tj / °C
VFB / V
0
0,2
0,4
0,6
0,8
1
1,2
35 37 39 41 43 45
Iovp / uA
VISENSE / V
VVAOUT = 3.5V
VMULTIN = 3.0V
0
20
40
60
80
100
120
0,01 0,1 1 10 100 1000 10000
f/kHz
0
20
40
60
80
100
120
140
160
180
Phi/deg
GV/dB
Phi
G
v
0
50
100
150
200
250
300
-40 0 40 80 120 160
Tj / ° C
LEB / ns
TDA4863
Electrical Characteristics
Data Sheet 19 Rev.2, 2005-02
Current Sense Threshold VISENSE
versus VMULTIN
Restart Time versus Temperature
Current Sense Threshold VISENSE
versus VVAOUT
0
0,1
0,2
0,3
0,4
0,5
0,6
0,7
0,8
0,9
1
01234
V
MULTIN
/ V
V
ISENSE
/ V
VAOUT=2.75V
3.0V
3.5V
4.0V
4.5V
3.25V
100
120
140
160
180
200
220
-40 0 40 80 120 160
Tj / °C
trst / us
0
0,1
0,2
0,3
0,4
0,5
0,6
0,7
0,8
0,9
1
2,5 3 3,5 4 4,5
V
VAOUT
/ V
VISENSE / V
1.0
1.5
2.0
3.0
Vmultin=4.0
0.5
0.25
TDA4863
Electrical Characteristics
Data Sheet 20 Rev.2, 2005-02
Gate Drive Rise Time and Fall Time
versus Temperat ure Gate Drive Voltage High State
versus Vcc
0
20
40
60
80
100
120
140
-40 0 40 80 120 160
Tj / °C
rise time / ns
rise
time
fall
time
8
8,5
9
9,5
10
10,5
11
11,5
12
11 13 15
Vcc / V
V
GTH
/ V
IGT=-2mA
IGT=-20mA
IGT=-200mA
TDA4863
Application Circuit
Data Sheet 21 Rev.2, 2005-02
4 Application Circuit
Figure 5 Pout = 110 W, Universal Input Vin = 90 - 270 V AC
Vin
90-270V AC
C9
220n
R9
33k
R7
9.1k
R6B
470k
C10
47uF
25V
C8
47uF
450V
R11
0.5
R4A
820k
R5
10k
TDA4863
R10
12
R4B
820k
D5
MR856
R12
470
R8A
120k R8B
120k
R6A
470k
C4
10n
R7
9.1k
C13
3.3n
400V
D7
D6
CoolMOS
SPP04N60S5
0.95 Ohm
C1
1u
C2
1u
1234
5678
Vout
410V DC
Application circuit: Pout=110W, universal Input Vin=90-270V AC
GND
L1=750uH
E36/11,N27; gap=2mm
W1=85 turns,d=40x0.1
W2=17 turns, d=0.3
RF filter
and
rectifier
TDA4863
Application Circuit
Data Sheet 22 Rev.2, 2005-02
4.1 Results of THD Measurements with Application Board
P
out
=110W
(Measurements according to IEC61000-3-2.
150% limit (red line): Momentary measured value must be below this limit.
100% limit (blue line): Average of measured values must be below this limit.
The worst measured momentary value is shown in the diagrams.)
Figure 6 THD Class C:
Pmax =110W, Vinac =90V, Iout = 250 mA, Vout = 420 V, PF = 0.998
Figure 7 THD Class C:
Pmax =110W, Vinac =220V, Iout =250mA, Vaout = 420 V, PF = 0.992
0,00
0,05
0,10
0,15
0,20
0,25
0,30
Current RMS(Amps)
Harmonic #
4 8 12 16 20 24 28 32 36 40
0,000
0,025
0,050
0,075
0,100
0,125
0,150
0,175
0,200
0,225
Current RMS(Amps)
Harmonic #
4 8 12 16 20 24 28 32 36 40
TDA4863
Application Circuit
Data Sheet 23 Rev.2, 2005-02
Figure 8 THD Class C:
Pmax =110W, Vinac =270V, Iout =250mA, Vaout = 420 V, PF = 0.978
Figure 9 THD Class C:
Pmax =110W, Vinac =90V, Iout = 140 mA, Vaout = 420 V, PF = 0.999
0,000
0,025
0,050
0,075
0,100
0,125
0,150
0,175
Current RMS(Amps)
Harmonic #
4 8 12 16 20 24 28 32 36 40
0,00
0,05
0,10
0,15
0,20
0,25
0,30
Current RMS(Amps)
Harmonic #
4 8 12 16 20 24 28 32 36 40
TDA4863
Application Circuit
Data Sheet 24 Rev.2, 2005-02
Figure 10 THD Class C:
Pmax =110W, Vinac =220V, Iout =140mA, Vaout = 420 V, PF = 0.975
Figure 11 THD Class C:
Pmax =110W, Vinac =270V, Iout =140mA, Vaout = 420 V, PF = 0.883
0,000
0,025
0,050
0,075
0,100
0,125
Current RMS(Amps)
Harmonic #
4 8 12 16 20 24 28 32 36 40
0,00
0,01
0,02
0,03
0,04
0,05
0,06
0,07
0,08
0,09
0,10
Current RMS(Amps)
Harmonic #
4 8 12 16 20 24 28 32 36 40
TDA4863
Package Outlines
Data Sheet 25 Rev.2, 2005-02
5 Package Outlines
Figure 12
Does not include plastic or metal protrusion of 0.25 max. per side
9.52
Index Marking
±0.25
0.35
2.54
0.46
1
8
±0.1
1.7 MAX.
4
1)
8x
5
3.25 MIN. 4.37 MAX.
0.38 MIN.
±0.25
8.9
±1
0.25
6.35
+0.1
±0.38
7.87
1)
1)
PG-DIP-8-4
(Plastic Dual In-line Package)
GPD05583
TDA4863
Package Outlines
Data Sheet 26 Rev.2, 2005-02
Figure 13
Does not include plastic or metal protrusion of 0.15 max. per side
-0.05
-0.2
+0.1
5
0.41
Index Marking (Chamfer)
x8
1
1)
4
8
1.27
5
A
0.1
0.2
M
A
(1.5)
0.1 MIN.
1.75 MAX.
C
C
6±0.2
0.64
0.33 4
-0.2
-0.01
0.2
+0.05
x 45˚
±0.08
1)
±0.25
MAX.8˚
1)
Index
Marking
PG-DSO-8-3
(Plastic Dual Small Outline)
GPS09032
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm
www.infineon.com
Published by Infineon Technologies AG
