GS9064-CKDE3 - Gennum Corp.

GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3

Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com

www.gennum.com

Revision Date: June 2006 Document No. 22212 - 3

DATA SHEET

GS9064

KEY FEATURES

• SMPTE 259 and SMPTE 344 compliant

• automatic cable equalization

• supports DVB-ASI at 270Mb/s

• typical maximum equalized length of Belden 1694A

cable at 270Mb/s is 350m

•50Ω differential output (with internal 50Ω pull-ups)

• cable length indicator

• output mute based on maximum cable length adjust or

manual override

• Pb-free and Green

• single 3.3V power supply operation

• operating temperature range: 0°C to +70°C

• pin compatible with HDLINX™ II GS1524 multirate SDI

adaptive cable equalizer

APPLICATIONS

• SMPTE 259M Coaxial Cable Serial Digital Interfaces

DESCRIPTION

The GS9064 is a second-generation high-speed bipolar

integrated circuit designed to equalize and restore signals

received over 75Ω co-axial cable at data rates from

143Mb/s up to 540Mb/s. The GS9064 is designed to

support SMPTE 344M and SMPTE 259M and is optimized

for performance at 270Mb/s.

The GS9064 features DC restoration to compensate for the

DC content of SMPTE pathological test patterns, and

incorporates a Cable Length Indicator (CLI) that provides a

linear indication of the amount of cable being equalized.

A voltage programmable mute threshold (MCLADJ) is

included to allow muting of the GS9064 output when a

selected cable length is reached. This feature allows the

GS9064 to distinguish between low amplitude SDI signals

and noise at the input of the device. The CD/MUTE pin

provides an indication of the GS9064 mute status in

addition to functioning as a mute control input. The output

of the GS9064 may be forced to an active or a mute

condition by applying a voltage to the CD/MUTE pin.

GS9064 FUNCTIONAL BLOCK DIAGRAM

CABLE LENGTH INDICATOR/ADJUSTOR

CARRIER DETECT

MUTE

EQUALIZER DC RESTORE OUTPUT

AGC

CLI

CD/MUTE

SDO

SDOSDI

SDI

MCLADJ

BYPASS

GS9064 SD SDI

Adaptive Cable Equalizer

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GS9064

TABLE OF CONTENTS

1. PIN OUT .......................................................................................................................................... 3

1.1 PIN ASSIGNMENT................................................................................................................ 3

1.2 PIN DESCRIPTIONS .............................................................................................................. 3

2. ELECTRICAL CHARACTERISTICS .......................................................................................................... 4

2.1 ABSOLUTE MAXIMUM RATINGS .................................................................................................................... 4

2.2 DC ELECTRICAL CHARACTERISTICS........................................................................................ 4

2.3 AC ELECTRICAL CHARACTERISTICS........................................................................................ 5

2.4 SOLDER REFLOW PROFILE.................................................................................................... 6

2.5 INPUT/OUTPUT CIRCUITS .................................................................................................... 7

2.6 TYPICAL PERFORMANCE CURVES.......................................................................................... 8

3. DETAILED DESCRIPTION..................................................................................................................... 9

3.1 SERIAL DIGITAL INPUT ......................................................................................................... 9

3.2 AUTOMATIC CABLE EQUALIZATION........................................................................................ 9

3.3 CABLE LENGTH INDICATION & CARRIER DETECT/MUTE ........................................................... 9

4. APPLICATION REFERENCE DESIGN .................................................................................................... 10

4.1 PCB LAYOUT .................................................................................................................... 10

4.2 TYPICAL APPLICATION CIRCUIT ........................................................................................... 10

5. REFERENCES.................................................................................................................................. 10

6. PACKAGE & ORDERING INFORMATION............................................................................................... 11

6.1 PACKAGE DIMENSIONS...................................................................................................... 11

6.2 ORDERING INFORMATION................................................................................................... 11

7. REVISION HISTORY .......................................................................................................................... 12

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GS9064

1. PIN OUT

1.1 PIN ASSIGNMENT

1.2 PIN DESCRIPTIONS

NUMBER NAME TYPE DESCRIPTION

1 CLI Output CABLE LENGTH INDICATOR

An analog voltage proportional to the cable length connected to the serial digital input.

NOTE: CLI is recommended for data rates up to 360 Mb/s only.

2, 15 VCC Input

Power

Most positive power supply connection. Connect to +3.3V.

3, 6, 11,

VEE Input

Power

Most negative power supply connection. Connect to ground.

4, 5 SDI, SDI Input Serial digital differential inputs.

7, 8 AGC+, AGC- Passive

Input

External AGC capacitor. Should be set to 1µF.

9 BYPASS Input Forces the CORE stage and the DC RESTORE stage into bypass mode when HIGH. No

equalization occurs in this mode.

10 MCLADJ Input MAXIMUM CABLE LENGTH ADJUST

Adjusts the approximate maximum amount of cable to be equalized (from 0m to the

maximum cable length). The output is muted (latched to the last state) when the

maximum cable length is achieved.

NOTE: MCLADJ is recommended for data rates up to 360 Mb/s only.

12, 13 SDO, SDO Output Equalized serial digital differential outputs.

16 CD/MUTE Input /

Output

MUTE INDICATOR-CONTROL / CARRIER DETECT

OUTPUT: the output voltage drops to below 1.2V when the carrier is present and the

data outputs are active.

INPUT: if the CD/MUTE pin is tied to ground, the data output will never mute and the

MCLADJ setting is overwritten. If the CD/MUTE pin is tied to VCC, the data outputs will

always mute and the MCLADJ setting is overwritten.

CLI

SDI

AGC+

AGC-

CD/MUTE

SDO

MCLADJ

BYPASS

GS9064

16PIN SOIC

TOP VIEW

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2. ELECTRICAL CHARACTERISTICS

2.1 ABSOLUTE MAXIMUM RATINGS

PARAMETER VALUE

Supply Voltage -0.5V to +3.6 VDC

Input ESD Voltage 500V

Storage Temperature Range -50°C< Ts < 125°C

Input Voltage Range (any input) -0.3 to (VCC + 0.3)V

Operating Temperature Range 0°C to 70°C

Power Dissipation 300mW

Lead Temperature (soldering, 10 sec.) 260°C

Moisture Sensitivity Level 2

2.2 DC ELECTRICAL CHARACTERISTICS

VCC = 3.3V , VEE = 0V , TA = 0°C to 70°C, 270Mb/s, unless otherwise shown

PARAMETER SYMBOL CONDITIONS MIN TYPICAL MAX UNITS

TEST

LEVEL NOTES

Supply Voltage VCC 3.1 3.3 3.5 V 1 -

Power Consumption PDTA = 25°C - 265 - mW 5 -

Supply Current ΙSTA = 25°C - 80 - mA 1 -

Input Common Mode Voltage VCMIN -1.75-V10-

Output Common Mode Voltage VCMOUT -V

CC - ΔVSDO/2 - mV 7 -

CLI DC Voltage Cable length = 0m - 2.5 - V 1 -

No signal (max

cable length)

-1.9-V7-

Floating MCLADJ DC Voltage - 1.3 - V 7 -

MCLADJ Range 0m to max cable

length

-0.69-V7-

CD/Mute Output Voltage VCD/Mute(OH) Carrier not present 2.6 - - V 1 -

VCD/Mute(OL) Carrier present - - 1.2 1 -

CD/Mute Input Voltage

Required to Force Outputs to

Mute

VCD/Mute) Min to Mute 3.0 - - V 7 -

CD/Mute Input Voltage

Required to Force Outputs to

Activate

VCD/Mute Max to Activate - - 2.0 V 7 -

TEST LEVELS

1. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges.

2. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges using

correlated test.

3. Production test at room temperature and nominal supply voltage.

4. QA sample test.

5. Calculated result based on Level 1, 2, or 3.

6. Not tested. Guaranteed by design simulations.

7. Not tested. Based on characterization of nominal parts.

8. Not tested. Based on existing design/characterization data of similar product.

9. Indirect test.

10. Wafer Probe

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GS9064

2.3 AC ELECTRICAL CHARACTERISTICS

VCC = 3.3V , VEE = 0V , TA = 0°C to 70°C, 270Mb/s, unless otherwise shown

PARAMETER SYMBOL CONDITIONS MIN TYPICAL MAX UNITS

TEST

LEVEL NOTES

Serial Input Data Rate DRSDI EQ active 143 - 540 Mb/s 6 -

Input Swing ΔVSDI Differential, TA =25°C

Cable length = 0m

720 800 950 mVp-p 1-

Output Swing ΔVSDO Differential, 50 ohm load, TA

=25°C

-750 -mV

p-p 1-

Maximum Equalized

Cable Length

270Mb/s, Belden 8281

0.20UI output jitter

EQ Pathological

-280 -m 7 -

540Mb/s, Belden 8281

0.20UI output jitter

EQ Pathological

-180 -m 7 -

Output Rise/Fall Time tr

, tf20% - 80% - 80 220 ps 1 -

Mismatch in Rise/Fall

Time

--30ps1-

Duty Cycle Distortion - - 100 ps 7 -

Overshoot - - 10 % 1 -

Input Return Loss IRL 15 - - dB 7 -

TEST LEVELS

1. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges.

2. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges using

correlated test.

3. Production test at room temperature and nominal supply voltage.

4. QA sample test.

5. Calculated result based on Level 1, 2, or 3.

6. Not tested. Guaranteed by design simulations.

7. Not tested. Based on characterization of nominal parts.

8. Not tested. Based on existing design/characterization data of similar product.

9. Indirect test.

10. Wafer Probe

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GS9064

2.4 SOLDER REFLOW PROFILE

Figure 1 Maximum Pb-free Solder Reflow Profile

Figure 2 Standard Eutectic Solder Reflow Profile

25˚C

150˚C

200˚C

217˚C

260˚C

250˚C

Time

Temperature

8 min. max

60-180 sec. max

60-150 sec.

20-40 sec.

3˚C/sec max

6˚C/sec max

25˚C

100˚C

150˚C

183˚C

230˚C

220˚C

Time

Temperature

6 min. max

120 sec. max

60-150 sec.

10-20 sec.

3˚C/sec max

6˚C/sec max

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GS9064

2.5 INPUT/OUTPUT CIRCUITS

All resistors in ohms, all capacitors in farads, unless otherwise shown.

Figure 3 Input Equivalent Circuit

Figure 4 MCLADJ Equivalent Circuit

Figure 5 CD/MUTE Circuit

Figure 6 Output Circuit

Figure 7 CLI Output Circuit

Figure 8 Bypass Circuit

3.6k

SDI SDI

VCC

MCLADJ

12k

150µ

7.5k

OUTPUT

STAGE

MUTE

CONTROL

CD/MUTE

SDOSDO

10k

VCC

CLI

Bypass Internal

Reference

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2.6 TYPICAL PERFORMANCE CURVES

All resistors in ohms, all capacitors in farads, unless otherwise shown.

Figure 9 Power Consumption

Figure 10 CLI Voltage vs 8281 Cable Length, 270Mb/s

Figure 11 Input 8281, 280m, 270Mb/s

Figure 12 MCLADJ Input Voltage vs 1694A Cable Length,

270Mb/s

Figure 13 Typical Peak-to-Peak Jitter, PRN223-1, 1694A, 270Mb/s

Figure 14 Output 8281, 280m, 270Mb/s

350

300

250

200

150

100

00 20 40 60 80

TEMPERATURE (˚C)

POWER CONSUMPTION (mW)

CABLE LENGTH (m)

CLI VOLTAGE (V)

3.5

2.5

1.5

0 50 100 150 200 250 300

CABLE LENGTH (m)

MCLADJ VOLTAGE (V)

2.0

0 50 100 150 200 250 300

2.5

3.0

3.5

1100

900

700

500

400

300

200

100

00 100 200 300 400

CABLE LENGTH (m)

JITTER (ps)

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GS9064

3. DETAILED DESCRIPTION

The GS9064 is a high speed bipolar IC designed to

equalize SD serial digital signals. The device can typically

equalize 350 meters of Belden

1694A cable

at 270Mb/s.

Powered from a single +3.3V or -3.3V power supply, the

device consumes approximately 240mW of power.

3.1 SERIAL DIGITAL INPUT

The SD serial digital input signal may be connected to the

input pins (SDI/SDI) in either a differential or single ended

configuration. AC coupling of the inputs is recommended,

as the SDI and SDI inputs are internally biased at

approximately +1.8 volts.

3.2 AUTOMATIC CABLE EQUALIZATION

The input signal passes through a variable gain equalizing

stage whose frequency response closely matches the

inverse of the cable loss characteristic. In addition, the vari-

ation of the frequency response with control voltage imitates

the variation of the inverse cable loss characteristic with

cable length.

The edge energy of the equalized signal is monitored by a

detector circuit which produces an error signal

corresponding to the difference between the desired edge

energy and the actual edge energy. This error signal is

integrated by both an internal and an external AGC filter

capacitor providing a steady control voltage for the gain

stage. As the frequency response of the gain stage is

automatically varied by the application of negative

feedback, the edge energy of the equalized signal is kept

at a constant level which is representative of the original

edge energy at the transmitter.

The equalized signal is also DC restored, effectively restor-

ing the logic threshold of the equalized signal to its correct

level independent of shifts due to AC coupling. The digital

output signals have a nominal voltage of 750mVpp differen-

tial, or 375mVpp single ended when terminated with 50Ω as

shown below in Figure 13.

Figure 15 Typical Output Voltage Levels

3.3 CABLE LENGTH INDICATION & CARRIER

DETECT/MUTE

The GS9064 incorporates an analog cable length indicator

(CLI) output and a programmable threshold output mute

(MCLADJ). In addition, a multi-function CD/MUTE pin allows

control of the GS9064 MUTE functionality for SD inputs.

3.3.1 Cable Length Indicator

The voltage output of the CLI pin is a representation of the

amount of cable present at the inputs of the device. Figure

8 shows the CLI voltage versus cable length (signal

strength). At 270Mb/s with no cable length and 800mV input

signal levels, the CLI output voltage is approximately 2.5V.

As the cable length is increased, the CLI voltage

decreases, thereby providing an approximate correlation

between the CLI voltage and cable length

3.3.2 Programmable Mute Threshold

A voltage programmable mute threshold (MCLADJ) is

included to allow muting of the GS9064 output when a

selected cable length is reached. This feature allows the

device to distinguish between low amplitude SDI signals

and noise at its input.

Figure 10 shows the relationship between the voltage

applied to the MCLADJ pin and the input cable length

accepted by the GS9064. For consistent accurate results

this may need to be calibrated for each device. The

MCLADJ pin may be left unconnected for applications

where output muting is not required.

This feature has been designed for use in applications such

as routers where signal crosstalk and circuit noise cause

the equalizer to output erroneous data when no input signal

is actually present. The use of a Carrier Detect function with

a fixed internal reference does not solve this problem since

the signal to noise ratio on the circuit board could be

significantly less than the default signal detection level set

by the on-chip reference.

NOTE: MCLADJ and CLI are only recommended for data

rates up to 360 Mb/s.

3.3.3 Carrier Detect/Mute

Applying a HIGH INPUT to the CD/Mute pin forces the

GS9064 outputs to a muted condition. See the DC Electrical

Characteristics table for voltage levels. In this condition the

outputs are latched to the last logic level present at the

output to avoid signal crosstalk.

Applying a LOW INPUT to the CD/Mute pin will force the

GS9064 outputs to remain active regardless of input cable

length or the voltage applied to the MCLADJ pin. See the DC

Electrical Characteristics table for voltage levels.

50 50

SDO

+187.5mV

-187.5mV

VCM = 2.925V

typical

+187.5mV

-187.5mV

VCM = 2.925V

typical

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When used as an OUTPUT, the CD/Mute pin will provide an

indication of the output mute status. The CD/Mute voltage

will fall to below 1.2V when the carrier is present and the

data outputs are active.

NOTE: The CD/Mute pin is not functional in BYPASS mode.

4. APPLICATION REFERENCE DESIGN

4.1 PCB LAYOUT

An FR-4 dielectric can be used, however, controlled

impedance transmission lines are required for PCB traces

longer than approximately 1cm. Note the following PCB

artwork features used to optimize performance:

1. The PCB ground plane is removed under the GS9064

input AND output components to minimize parasitic

capacitance.

2. High speed traces are curved to minimize impedance

changes.

4.2 TYPICAL APPLICATION CIRCUIT

5. REFERENCES

Compliant with SMPTE 259M and SMPTE 344.

6.4n 10n

BYPASS

MCLADJ

SDO

BNC

VCC

CLI

10n

4u7

GS9064

SDI

CD/MUTE

VEE

VCC

SDO

VEE

VCC

AGC- BYPASS

MCLADJ

CLI

AGC+

SDO

CD/MUTE

37.4

VCC

NOTE: All resistors in Ohms, capacitors in Farads,

and inductors in Henrys, unless otherwise noted.

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6. PACKAGE & ORDERING INFORMATION

6.1 PACKAGE DIMENSIONS

16 PIN SOIC

6.2 ORDERING INFORMATION

PART NUMBER PACKAGE TEMPERATURE RANGE Pb-FREE AND GREEN

GS9064-CKD 16 pin SOIC 0°C to 70°C No

GS9064-CKDE3 16 pin SOIC 0°C to 70°C Yes

Symbol

MIN. MIN.MAX. MAX.NOM. NOM.

MILLIMETER INCH

* CONTROLLING DIMENSION: MM

1.35

0.10

1.30

0.33

0.19

9.80

3.80

5.80

0.40

0˚

1.63

0.15

1.40

0.41

9.91

3.90

1.27

6.00

0.64

1.07

1.75

0.25

1.50

0.51

0.25

10.01

4.00

0.053

0.004

0.051

0.013

0.064

0.006

0.055

0.016

0.390

0.154

0.50

0.069

0.010

0.059

0.020

0.010

0.394

0.157

0˚8˚ 8˚

6.20

1.27

0.10 0.004

0.042

0.0250.016

0.228 0.236 0.244

0.050

0.150

0.386

0.007

Detail F

16 9

0.010"

GAUGE PLANE

Seating Plane

See Detail F

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GS9064

CAUTION

ELECTROSTATIC

SENSITIVE DEVICES

DO NOT OPEN PACKAGES OR HANDLE

EXCEPT AT A STATIC-FREE WORKSTATION

DOCUMENT IDENTIFICATION

DATA SHEET

The product is in production. Gennum reserves the right to make

changes at any time to improve reliability, function or design, in order to

provide the best product possible.

GENNUM CORPORATION

Mailing Address: P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3

Shipping Address: 970 Fraser Drive, Burlington, Ontario, Canada L7L 5P5

Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946

GENNUM JAPAN CORPORATION

Shinjuku Green Tower Building 27F, 6-14-1, Nishi Shinjuku,

Shinjuku-ku, Tokyo, 160-0023 Japan

Tel. +81 (03) 3349-5501, Fax. +81 (03) 3349-5505

GENNUM UK lIMITED

25 Long Garden Walk, Farnham, Surrey, England GU9 7HX

Tel. +44 (0)1252 747 000 Fax +44 (0)1252 726 523

Gennum Corporation assumes no liability for any errors or omissions in this

document, or for the use of the circuits or devices described herein. The sale

of the circuit or device described herein does not imply any patent license,

and Gennum makes no representation that the circuit or device is free from

patent infringement.

GENNUM and the G logo are registered trademarks of Gennum Corporation.

Printed in Canada.

www.gennum.com

7. REVISION HISTORY

VERSION ECR PCN DATE CHANGES AND/OR MODIFICATIONS

A 120607 - July 2002 New Document

B 125774 - July 2002 Added detailed block descriptions and initial applications

information.

C 126688 - September

2002

Change packaging from LGA to SOIC for pin compatibility with the

GS1524.

0 127023 - December

2002

Upgrade document to Preliminary Data Sheet and edit AC/DC

Characteristics to match current design specification limits.

1 128542 - June 2003 Upgrade document to Data Sheet. Power number corrected.

2 133975 - June 2004 Added lead-free and green information.

3 140763 39738 June 2006 Added solder reflow profile and MSL information.