MM
Q
60
R
070
P
Datasheet
Aug.
20
14 Revision 1
.0
MagnaC
hip Semiconductor L
td
.
1
Parameter
V
alue
Unit
V
DS
@
T
j,max
650
V
R
DS(on),max
0.
07
Ω
V
TH
,typ
3
V
I
D
53
A
Q
g,typ
132
nC
Order Code
Marking
T
emp. Range
Package
Packing
RoHS Status
MM
Q
60
R
070
P
TH
60R070P
-55 ~ 150
℃
TO
-
247
T
ube
Halogen Free
MMQ
60R070
P
600V 0.
07
Ω
N-channel MOSFET
Description
MM
Q60R
070
P is pow
er MOSFET
using magnachi
p
’
s advanced super ju
nction technology
that can
realize v
ery low on-resistance and gate
charge. It w
ill provide much high e
fficiency
by using
optimized char
ge coupling technolo
gy
. These user
friendly
devices give an adv
antage of Low EM
I to
designers as w
ell as low
switching loss.
Features
Low Pow
er Loss by High Speed Sw
itching and Low
On-Resistance
100%
Av
alanche
T
es
ted
Green Packa
ge
–
Pb Free Plating, Halo
gen Free
Key Parameters
Ordering Informatio
n
Applications
PFC Pow
er Supply Stages
Switching
Applications
Adapter
Motor Control
DC
–
DC Converters
G
D
S
G
D
G
S
G
Package & Internal
Circui
t
MM
Q
60
R
070
P
Datasheet
Aug.
20
14 Revision 1
.0
MagnaC
hip Semiconductor L
td
.
2
Parameter
Symbol
Rating
Unit
Note
Drain
–
Source vol
tage
V
DSS
600
V
Gate
–
Source vol
tage
V
GSS
±
30
V
Continuous drain
current
I
D
53
A
T
C
=25
℃
33.5
A
T
C
=100
℃
Pulsed drain cu
rrent
(1)
I
DM
159
A
Power dissi
pation
P
D
391
W
Single - pulse aval
anche energy
E
AS
1
135
mJ
MOSFE
T dv/dt ruggedne
ss
dv/dt
50
V/ns
Diode dv
/dt ruggedness
dv/dt
15
V/ns
Storage tempera
ture
T
stg
-55 ~150
℃
Maximum operatin
g junction
temperature
T
j
150
℃
1)
Pulse width t
P
limited by T
j,m
ax
2)
I
SD
≤
I
D
, V
DS peak
≤
V
(
BR)DSS
Parameter
Symbol
V
alue
Unit
Thermal resistanc
e, junction-case max
R
thjc
0.32
℃
/W
Thermal resistanc
e, junction-ambient max
R
thja
62.5
℃
/W
Thermal Character
istics
Absolute Maximum
Rating (T
c
=25
℃
unless otherw
ise specified)
MM
Q
60
R
070
P
Datasheet
Aug.
20
14 Revision 1
.0
Magna
Chip Semicond
uctor Ltd
.
3
Parameter
Symbol
Min.
T
yp.
Max.
Unit
T
est Condition
Drain
–
Source
Breakdow
n voltage
V
(BR)D
SS
600
-
-
V
V
GS
= 0V
,
I
D
=0.25mA
Gate
Threshold V
oltage
V
GS
(th)
2
3
4
V
V
DS
= V
GS,
I
D
=0.25mA
Zero Gate V
oltage
Drain Current
I
D
SS
-
-
1
μ
A
V
DS
= 600V
,
V
GS
= 0V
Gate Leakage
Current
I
GSS
-
-
100
nA
V
GS
=
±3
0V
,
V
DS
=0V
Drain-Source On
State Resistance
R
DS(ON)
-
0.
0
63
0.07
Ω
V
GS
= 10V
, I
D
=
25.8A
Parameter
Symbol
Min.
T
yp.
Max.
Unit
T
est Condition
Input Capacitance
C
iss
-
4440
-
pF
V
DS
= 25V
, V
GS
= 0V
,
f = 1.0M
Hz
Output Capacitance
C
oss
-
2965
-
Reverse
T
ransfer Capacitance
C
rss
-
165
-
Effectiv
e Output Capacit
ance
Energy Related
(3)
C
o(er)
-
1
12
-
V
DS
= 0V to 480V
,
V
GS
= 0V
,f = 1.0M
Hz
T
urn On D
elay
T
ime
t
d(on)
-
70
-
ns
V
GS
= 10V
,
R
G
= 25Ω,
V
DS
= 300V
, I
D
=
53
A
Rise
T
ime
t
r
-
200
-
T
urn Of
f
Delay
Ti
me
t
d(off)
-
410
-
Fall
T
ime
t
f
-
162
-
T
otal Gate Char
ge
Q
g
-
132
-
nC
V
GS
= 10V
,
V
DS
= 480V
,
I
D
=
53
A
Gate
–
Source Cha
rge
Q
gs
-
31
-
Gate
–
Drain Char
ge
Q
gd
-
58
-
Gate Resistance
R
G
-
2.4
-
Ω
V
GS
= 0V
,
f = 1.0M
Hz
3) C
o(er)
is a capacitance that gives the same stored energy as C
OSS
while V
DS
is
rising from 0V to 80% V
(BR)DSS
Static Characterist
ics (T
c
=25
℃
unless otherw
ise specified)
Dynamic Characteri
stics (T
c
=25
℃
unless otherw
ise specified)
MM
Q
60
R
070
P
Datasheet
Aug.
20
14 Revision 1
.0
Magna
Chip Semicond
uctor Ltd
.
4
Parameter
Symbol
Min.
T
yp.
Max.
Unit
T
est Condition
Continuous Diod
e Forward
Current
I
SD
-
-
53
A
Diode Forw
ard Voltage
V
SD
-
-
1.4
V
I
SD
=
53.0 A, VGS = 0
V
Reverse Recov
ery Time
t
rr
-
5
82
-
ns
I
SD
=
53.0A
di/dt = 100 A/μs
V
DD
= 100 V
Reverse Recov
ery Charge
Q
rr
-
13.7
-
μ
C
Reverse Recov
ery Current
I
rrm
-
47
-
A
Reverse Diode Ch
aracteristics (T
c
=25
℃
unless otherw
ise specified)
MM
Q
60
R
070
P
Datasheet
Aug.
20
14 Revision 1
.0
Magna
Chip Semicond
uctor Ltd
.
5
MM
Q
60
R
070
P
Datasheet
Aug.
20
14 Revision 1
.0
Magna
Chip Semicond
uctor Ltd
.
6
MM
Q
60
R
070
P
Datasheet
Aug.
20
14 Revision 1
.0
Magna
Chip Semicond
uctor Ltd
.
7
MM
Q
60
R
070
P
Datasheet
Aug.
20
14 Revision 1
.0
Magna
Chip Semicond
uctor Ltd
.
8
T
est Circuit
V
DS
10V
1mA
DUT
100K
Ω
10V
Same type as DUT
+
-
V
DD
DUT
+
-
Same type as DUT
V
DS
+
-
I
S
R
g
10K
Ω
V
gs
±
15V
L
I
F
V
DD
DUT
+
-
I
D
V
DS
V
gs
t
p
R
L
V
DD
DUT
+
-
I
AS
V
DS
R
g
V
gs
t
p
L
10V
V
GS
Charge
Q
g
Q
gs
Q
gd
V
DS
V
GS
90%
10%
T
d(on)
t
r
t
on
T
d(off)
t
f
t
off
V
DD
t
p
t
AV
V
DS(t)
BV
DSS
I
AS
Rds(on) * I
AS
t
rr
t
a
t
b
I
FM
I
RM
d
i
/d
t
0.25 I
RM
0.75 I
RM
0.5 I
RM
V
R
V
RM(REC)
Fig15-1. Gate charge measurement circuit
Fig15-2. Gate charge waveform
Fig16-1. Diode reverse recovery test circuit
Fig16-1. Diode reverse recovery test waveform
Fig17-1. Switching time test circuit for resistive load
Fig17-2. Switching time waveform
Fig18-1. Unclamped inductive load test circuit
Fig18-2. Unclamped inductive waveform
R
g
25
Ω
MM
Q
60
R
070
P
Datasheet
Aug.
20
14 Revision 1
.0
Magna
Chip Semicond
uctor Ltd
.
9
E
D
Q
L
L1
e
b
b2
b1
A
A1
c
D1
E1
ΦP
S
A2
E2
Physical Dimension
TO
-
247
Dimensions are in mil
limeters, unless ot
herwise specified
Dimension
Min(mm)
Max(mm)
A
4.70
5.31
A1
2.20
2.60
A2
1.50
2.49
b
0.99
1.40
b1
2.59
3.43
b2
1.65
2.39
c
0.38
0.89
D
20.30
21.46
D1
13.08
-
E
15.45
16.26
E1
13.06
14.02
E2
4.32
5.49
e
5.45BSC
L
19.81
20.57
L1
-
4.50
ΦP
3.50
3.70
Q
5.38
6.20
S
6.15BSC
MM
Q
60
R
070
P
Datasheet
Aug.
20
14 Revision 1
.0
Magna
Chip Semicond
uctor Ltd
.
10
DISCLAIMER:
The
Products
are
not
designed
for
use
in
hostile
environments,
including,
without
limitation,
aircraft,
nuclear
pow
er
generation,
medical
appliances,
and
devices
or
systems
in
which
malfunction
o
f
any
Product
can
reasonably
be
expected
to
result
in
a
personal
injury.
Seller’s
customers
using
or
selling
Seller’s
products
for
use
in
suc
h
applications do so at their own risk and agree to fully defend and indemnify
Seller.
MagnaCh
ip
reserves the
right to
change the
specification
s
and circuitry without
notice at
any time.
Mag
naChip does
not
consider
re
sponsibility
for
use
o
f
any
circuitry
other
than
circuitry
entirely
included
in
a
Magna
Chip
product.
is
a
registered
trademark
of
MagnaChip
Semiconductor
Ltd.
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