*Common to Substrate and Case
Flat Package
S4S3
D4D3
D2D1
S2S1
IN2IN1
V+ V–*
VLVR
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Top View
D1S1
NC
Dual-In-Line
IN1
D3V–
S3VR
S4VL
D4V+
NC IN2
D2S2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Top View
Refer to JAN38510 Information, Military Section
DG189/190/191
Siliconix
S-52880—Rev. C, 28-Apr-97 1
High-Speed Drivers with Dual SPDT JFET Switches
Features Benefits Applications
Constant On-Resistance Over Entire
Analog Range
Low Leakage
Low Crosstalk
Rad Hardness
Low Distortion
Eliminates Large Signal Errors
High Precision
High Bandwidth Capability
Fault Protection
Audio Switching
Video Switching
Sample/Hold
Guidance and Control Systems
Aerospace
Description
The DG189/190/191 are precision dual single-pole,
double-throw (SPDT) analog switches designed to provide
accurate switching of video and audio signals. This series
is ideally suited for applications requiring a constant
on-resistance over the entire analog range.
The major difference in the devices is the on-resistance
(DG189—10 , DG190—30 , DG191—75 Reduced
errors are achieved through low leakage current (ID(on)
< 2 nA). Applications which benefit from the flat JFET
on-resistance include audio switching, video switching, and
data acquisition.
To achieve fast and accurate switch performance, each
device comprises four n-channel JFET transistors and a
TTL compatible bipolar driver. The driver is designed to
achieve break-before-make switching action, eliminating
the inadvertent shorting between channels and the crosstalk
which would result. In the on state, each switch conducts
current equally well in either direction. In the off condition,
the switches will block up to 20 V peak-to-peak, with
feedthrough of less than –60 dB at 10 MHz.
Functional Block Diagram and Pin Configuration
Truth Table
Logic SW1, SW2SW3, SW4
0 OFF ON
1 ON OFF
Logic
“
0
”
0.8 V
Logic
0
0
.
8
V
Logic
“
1
”
24V
L
og
i
c
“1”
2
.
4
V
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70034.
DG189/190/191
2 Siliconix
S-52880—Rev. C, 28-Apr-97
Ordering Information
Temp Range Package Part Number
DG189BP
–25 to 85_C16-Pin Sidebraze DG190BP
DG191BP
DG189AP/883, 5962-9068901MEA
16-Pin Sidebraze DG190AP/883, JM38510/11107BEA
–55 to 125_CDG191AP/883, JM38510/11108BEA
14
-
Pin Flat Pack
JM38510/11107BXA
14
-
Pi
n
Fl
a
t
P
ac
k
JM38510/11108BXA
Absolute Maximum Ratings
V+ to V– 36 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V+ to VD 33 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VS, VD to V– –0.3 to 33 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VD to VD 22 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VL to V– 36 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VL to VIN 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VL to VR 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VIN to VR8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VR to V– 27 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VR to VIN 2 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current (S or D) DG189 200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current (S or D) DG190, DG191 30 mA. . . . . . . . . . . . . . . . . . . . . . . . .
Current (All Other Pins) 30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature –65 to 150_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipationa
16-Pin Sidebrazeb900 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14-Pin Flat Packc900 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes:
a. All leads welded or soldered to PC Board.
b. Derate 12 mW/_C above 75_C
c. Derate 10 mW/_C above 75_C
Schematic Diagram (Typical Channel)
Figure 1.
VR
VLV+
S
IN
D
V–
DG189/190/191
Siliconix
S-52880—Rev. C, 28-Apr-97 3
Specificationsa for DG189
Test Conditions
Unless Otherwise Specified
V15VV 15VV5V
A Suffix
–55 to 125_CB Suffix
–25 to 85_C
Parameter Symbol V+ = 15 V, V– = –15 V, VL = 5 V
VR = 0 V, VIN = 0.8 V or 2 VfTempbTypcMindMaxdMindMaxdUnit
Analog Switch
Analog Signal RangeeVANALOG Full –7.5 15 –7.5 15 V
Drain-Source
On-Resistance rDS(on) IS = –10 mA, VD = –7.5 V Room
Full 7.5 10
20 15
25
Source Off
Lk C
IS(off)
VS = "10 V, VD = #10 V
V+ = 10 V, V– = –20 V Room
Hot 0.05 10
1000 15
300
Leakage Current
I
S(off) VS = "7.5 V, VD = #7.5 V Room
Hot 0.05 10
1000 15
300
Drain Off
Lk C
ID(off)
VS = "10 V, VD = #10 V
V+ = 10 V, V– = –20 V Room
Hot 0.04 10
1000 15
300 nA
Leakage Current
I
D(off) VS = "7.5 V, VD = #7.5 V Room
Hot 0.03 10
1000 15
300
Channel On
Leakage Current ID(on) VD = VS = "7.5 V Room
Hot –0.1 –2
–200 –10
–200
Saturation Drain Current IDSS 2 ms Pulse Duration Room 300 mA
Digital Input
Input Current with
Input Voltage High IINH VIN = 5 V Room
Hot <0.01 10
20 10
20
A
Input Current with
Input Voltage Low IINL VIN = 0 V Full –30 –250 –250
A
Dynamic Characteristics
Turn-On Time ton
See Switching Time Test Circuit
Room 240 400 425
ns
Turn-Off Time toff
See
Switching
Time
Test
Circuit
Room 140 200 225
ns
Source-Off Capacitance CS(off) VS = –5 V, ID = 0 Room 21
Drain-Off Capacitance CD(off) f = 1 MHz VD = –5 V, IS = 0 Room 17 pF
Channel-On Capacitance CD(on) VD = VS = 0 V Room 17
Off Isolation OIRR f = 1 MHz, RL = 75 Room >55 dB
Power Supplies
Positive Supply Current I+ Room 0.6 1.5 1.5
Negative Supply Current I–
VIN
=
0 V, or 5 V
Room –2.7 –5 –5
mA
Logic Supply Current IL
V
IN =
0
V
,
or
5
V
Room 3.1 4.5 4.5
mA
Reference Supply Current IRRoom –1 –2 –2
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
DG189/190/191
4 Siliconix
S-52880—Rev. C, 28-Apr-97
Specificationsa for DG190
Test Conditions
Unless Otherwise Specified
V15VV 15VV5V
A Suffix
–55 to 125_CB Suffix
–25 to 85_C
Parameter Symbol V+ = 15 V, V– = –15 V, VL = 5 V
VR = 0 V, VIN = 0.8 V or 2 VfTempbTypcMindMaxdMindMaxdUnit
Analog Switch
Analog Signal RangeeVANALOG Full –7.5 15 –7.5 15 V
Drain-Source
On-Resistance rDS(on) IS = –10 mA, VD = –7.5 V Room
Full 18 30
60 50
75
Source Off
Lk C
IS(off)
VS = "10 V, VD = #10 V
V+ = 10 V, V– = –20 V Room
Hot 0.06 1
100 5
100
Leakage Current
I
S(off) VS = "7.5 V, VD = #7.5 V Room
Hot 0.1 1
100 5
100
Drain Off
Lk C
ID(off)
VS = "10 V, VD = #10 V
V+ = 10 V, V– = –20 V Room
Hot 0.05 1
100 5
100 nA
Leakage Current
I
D(off) VS = "7.5 V, VD = #7.5 V Room
Hot 0.06 1
100 5
100
Channel On
Leakage Current ID(on) VD = VS = "7.5 V Room
Hot –0.02 –2
–200 –10
–200
Digital Input
Input Current with
Input Voltage High IINH VIN = 5 V Room
Hot <0.01 10
20 10
20
A
Input Current with
Input Voltage Low IINL VIN = 0 V Full –30 –250 –250
A
Dynamic Characteristics
Turn-On Time ton
See Switching Time Test Circuit
Room 85 150 180
ns
Turn-Off Time t off
S
ee
S
w
it
c
hi
ng
Ti
me
T
es
t
Ci
rcu
it
Room 95 130 150 ns
Source-Off Capacitance CS(off) VS = –5 V, ID = 0 Room 9
Drain-Off Capacitance CD(off) f = 1 MHz VD = –5 V, IS = 0 Room 6 pF
Channel-On Capacitance CD(on) VD = VS = 0 V Room 14
Off Isolation OIRR f = 1 MHz, RL = 75 Room >50 dB
Power Supplies
Positive Supply Current I+ Room 0.6 1.5 1.5
Negative Supply Current I–
VIN
=
0 V, or 5 V
Room –2.7 –5 –5
mA
Logic Supply Current IL
V
IN =
0
V
,
or
5
V
Room 3.1 4.5 4.5
mA
Reference Supply Current IRRoom –1 –2 –2
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
DG189/190/191
Siliconix
S-52880—Rev. C, 28-Apr-97 5
Specificationsa for DG191
Test Conditions
Unless Otherwise Specified
V15VV 15VV5V
A Suffix
–55 to 125_CB Suffix
–25 to 85_C
Parameter Symbol V+ = 15 V, V– = –15 V, VL = 5 V
VR = 0 V, VIN = 0.8 V or 2 VfTempbTypcMindMaxdMindMaxdUnit
Analog Switch
Analog Signal RangeeVANALOG Full –10 15 –10 15 V
Drain-Source
On-Resistance rDS(on) IS = –10 mA, VD = –7.5 V Room
Full 35 75
150 100
150
Source Off
Lk C
IS(off)
VS = "10 V, VD = #10 V
V+ = 10 V, V– = –20 V Room
Hot 0.05 1
100 5
100
Leakage Current
I
S(off) VS = "10 V, VD = #10 V Room
Hot 0.07 1
100 5
100
Drain Off
Lk C
ID(off)
VS = "10 V, VD = #10 V
V+ = 10 V, V– = –20 V Room
Hot 0.04 1
100 5
100 nA
Leakage Current
I
D(off) VS = "10 V, VD = #10 V Room
Hot 0.05 1
100 5
100
Channel On
Leakage Current ID(on) VD = VS = "10 V Room
Hot –0.03 –2
–200 –10
–200
Digital Input
Input Current with
Input Voltage High IINH VIN = 5 V Room
Hot <0.01 10
20 10
20
A
Input Current with
Input Voltage Low IINL VIN = 0 V Full –30 –250 –250
A
Dynamic Characteristics
Turn-On Time ton
See Switching Time Test Circuit
Room 120 250 300
ns
Turn-Off Time toff
See
Switching
Time
Test
Circuit
Room 100 130 150
ns
Source-Off Capacitance CS(off) VS = –5 V, ID = 0 Room 9
Drain-Off Capacitance CD(off) f = 1 MHz VD = –5 V, IS = 0 Room 6 pF
Channel-On Capacitance CD(on) VD = VS = 0 V Room 14
Off Isolation OIRR f = 1 MHz, RL = 75 Room >50 dB
Positive Supply Current I+ Room 0.6 1.5 1.5
Negative Supply Current I–
VIN =0Vor5V
Room –2.7 –5 –5
mA
Logic Supply Current IL
V
IN =
0
V
, or
5
V
Room 3.1 4.5 4.5 m
A
Reference Supply Current IRRoom –1 –2 –2
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
DG189/190/191
6 Siliconix
S-52880—Rev. C, 28-Apr-97
Typical Characteristics
, I–, I+, I (mA)ILR
A)IIN (
IIN vs. VIN and TemperatureSupply Current vs. Temperature
Temperature (_C) Temperature (_C)
5
4
3
2
1
0–55 –35 –15 5 25 45 65 85 105 125 0
100
80
60
40
20
–55 –35 –15 5 25 45 65 85 105 125
IL
I+
–IR
–I–
–IINL
IINH
VINL = 0
VINH = 5 V
(ns)tON,t
OFF
Temperature (_C)
Switching Time vs. VD and Temperature (DG189)rDS(on) vs. Temperature
Temperature (_C)
rDS(on) ()
100
1–50 –25 0 25 50 75 100 125
10
230
90
–55 –35 –15 5 25 45 65 85 105 125
210
190
170
150
130
110
VD= –7.5 V
IS = –10 mA
tOFF
tON
DG189
DG190
DG191
VD = –7.5 V
VD = 7.5 V
Leakage vs. Temperature (DG189) Switching Time vs. VD and Temperature (DG190/191)
(nA)I , I
SD
(ns)tON,t
OFF
Temperature (_C) Temperature (_C)
100
0.1 25 45 65 85 105 125
10
1
ID(on) ID(off)
IS(off)
V+ = 10 V
V– = –20 V
VL = 5 V
VR = 0
130
50
–55 –35 –15 5 25 45 65 85 105 125
120
110
100
90
80
70
60
tOFF
tON
VD = –7.5 V
VD = 7.5 V
DG189/190/191
Siliconix
S-52880—Rev. C, 28-Apr-97 7
Typical Characteristics (Cont’d)
(pF)CS, D
ID(off) vs. Temperature (DG190/191)
(nA)
ID
Temperature (_C)
100
10
1
0.1 25 45 65 85 105 125
B Suffix
A Suffix
Capacitance vs. VD or VS (DG189)
VD or VS – Drain or Source Voltage (V)
30
26
22
18
14
10 –8 –4 0 4 8
CD(off)
CS(off)
CD(on)
f = 1 MHz
V+ = 10 V, V– = –20 V
VD = –10 V, VS = 10 V
ISO (dB)
(pF)CS, D
Off Isolation vs. FrequencyCapacitance vs. VD or VS (DG190/191)
VD or VS – Drain or Source Voltage (V) f – Frequency (Hz)
100
90
80
70
60
50
40
30
20
10
0105106107108
V+ = 15 V, V– = –15 V
VR = 0, VL = 5 V
RL = 75
VIN 220 mVRMS
DG189
DG190/191
20
18
16
14
12
10
8
6
4
2
0–10 –8 –6 –4 –2 0 2 4 6 8 10
CD(off)
CS(off)
CD(on)
Capacitance is measured from test terminal
to common.
VINL = 0.8 V
VINH = 2 V
f = 1 MHz
DG189/190/191
8 Siliconix
S-52880—Rev. C, 28-Apr-97
Test Circuits
Feedthrough due to charge injection may result in spikes at the leading and trailing edge of the output waveform.
Figure 2. Switching Time
Logic
Input
Switch
Output
tOFF
tON
tr <10 ns
tf <10 ns
90%
50%
0 V
3 V
0 V
0 V
90%
3 V
–3 V
VL
V–
V+
IN
CL
100 pF
RL
1 k
D1VO
S3
S1
VS2
VS1
–15 V
+15 V+5 V
CL (includes fixture and stray capacitance)
tON: VS = 3 V
tOFF:V
S
= –3 V
VR
D3
+
)
Application Hintsa
Switch
V+
Positive
Supply Voltage
(V)
V–
Negative Supply
Voltage
(V)
VL
Logic Supply
Voltage
(V)
VR
Reference
Supply
Voltage
(V)
VIN
Logic Input
Voltage
VINH(min)/
VINL(max)
(V)
VS
Analog Voltage
Range
(V)
DG189
DG190
15b
10
12
–15
–20
–12
5
5
5
GND
GND
GND
2.0/0.8
2.0/0.8
2.0/0.8
–7.5 to 15
–12.5 to 10
–4.5 to 12
DG191
15b
10
12
–15
–20
–12
5
5
5
GND
GND
GND
2.0/0.8
2.0/0.8
2.0/0.8
–10 to 15
–15 to 10
–7 to 12
Notes:
a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject to production testing.
b. Electrical Parameter Chart based on V+ = 15 V, VL = 5 V, VR = GND
