TCD2950D Preliminary TOSHIBA CCD Image SensorCCD (charge coupled device) TCD2950D The TCD2950D is a high sensitive and low dark current 10680 elements x 6 line CCD color image sensor which includes CCD drive circuit and clamp circuit. The sensor is designed for scanner. The device contains a row of 10680 elements x 6 line staggered photodiodes which provide a 96 lines/mm (2400DPI) across a A4 size paper. The device is operated by 5 V pulse, and 12 V power supply. Features Weight: 5.2 g (typ.) * Number of image sensing elements: 10680 elements x 6 line * Image sensing element size: 2.8 m by 4 m on 4 m centers * Photo sensing region: High sensitive and low dark current PN photodiode * Distance between photodiode array: 64 m (16 lines) * Clock: 2 phase (5 V) * Power supply: 12 V power supply voltage * Internal circuit: Clamp circuit * Package: 22 pin CERDIP package * Color filter: Red, green, blue Pin Connections (top view) VSH Reset pulse voltage V RS Clamp pulse voltage V CP Power supply voltage -0.3~8.0 V VOD -0.3~15 V Operating temperature Topr 0~60 C Storage temperature Tstg -25~85 C Note1: All voltage are with respect to SS terminals (ground). SS 4 19 CP NC 5 18 SS 1A1 6 17 1A4 2A1 7 16 2A4 2A2 8 15 2A3 1A2 9 14 1A3 SH3 10 13 SH1 12 SH2 SS 11 1 1 OD 1 20 1 3 B Shift pulse voltage RS OS1 21360 V Unit 21 G Clock pulse voltage Rating 2 OS2 21360 Symbol SS 22 R Characteristics 1 21360 Maximum Ratings (Note1) OS3 2002-01-31 TCD2950D Circuit Diagram OD CP SS 20 19 18 1A4 2A4 17 2A3 1A3 16 15 14 CCD ANALOG SHIFT REGISTER 1 13 SH1 D60 D62 S1 S3 S21357 S21359 D64 D66 74 D76 PHOTO DIODE (B) S21356 S21358 S21360 D65 73 D75 OS1 21 PHOTO DIODE (B) D59 D61 D63 S2 S4 D14 D16 D18 SHIFT GATE 1 D13 D15 D17 CLAMP SHIFT GATE 2 CCD ANALOG SHIFT REGISTER 2 CCD ANALOG SHIFT REGISTER 3 12 SH2 D60 D62 S1 S3 S5 S21357 S21359 D64 D66 74 D76 PHOTO DIODE (G) S21356 S21358 S21360 D65 73 D75 OS2 22 PHOTO DIODE (G) D59 D61 D63 S2 S4 D14 D16 D18 SHIFT GATE 3 D13 D15 D17 CLAMP SHIFT GATE 4 CCD ANALOG SHIFT REGISTER 4 CCD ANALOG SHIFT REGISTER 5 10 SH3 D60 D62 S1 S3 S5 S21357 S21359 D64 D66 74 D76 PHOTO DIODE (R) S21356 S21358 S21360 D65 73 D75 OS3 1 PHOTO DIODE (R) D59 D61 D63 S2 S4 D14 D16 D18 SHIFT GATE 5 D13 D15 D17 CLAMP SHIFT GATE 6 CCD ANALOG SHIFT REGISTER 6 3 SS RS 4 6 7 8 9 2A2 1A2 SS 1A1 2A1 2 11 SS 2002-01-31 TCD2950D Optical/Electrical Characteristics (Ta = 25C, VOD = 12 V, V = VSH =V RS = V CP = 5 V (pulse), f = 1 MHz, f RS = 2 MHz, tINT = 11 ms, LIGHT SOURCE = A LIGHT SOURCE + CM500S FILTER (t = 1 mm), LOAD RESISTANCE = 100 k ) Characteristics Unit Note V/lxs (Note 2) 20 % (Note 3) 3 12 mV (Note 4) 1 % (Note 5) VSAT 2.9 3.5 V (Note 6) Saturation Exposure SE 1.16 1.84 lxs (Note 7) Dark signal Voltage VDRK 0.5 2.0 mV (Note 8) Dark Signal Non Uniformity DSNU 2.0 7.0 mV (Note 8) DC Power Dissipation PD 420 585 mW Total Transfer Efficiency TTE 92 98 % Output Impedance ZO 0.3 1.0 k DC Compensation Output Voltage VOS 5.0 6.0 7.0 V (Note 9) Random Noise ND 0.8 mV (Note 10) Reset Noise VRSN 0.3 1.0 V (Note 9) Masking Noise VMS 0.2 1.0 V (Note 9) Sensitivity Symbol Min Typ. Max Red R(R) 0.9 1.4 1.9 Green R(G) 1.3 1.9 2.5 Blue R(B) 0.9 1.3 1.7 PRNU (1) 15 PRNU (3) RI Photo response non uniformity Register imbalance Saturation Output Voltage Note 2: Sensitivity is defined for each color of signal outputs average when the photosensitive surface is applied with the light of uniform illumination and uniform color temperature. Note 3: PRNU (1) is defined for each color on a single chip by the expressions below when the photosensitive surface is applied with the light of uniform illumination and uniform color temperature. PRNU (1) = x x 100 (%) x Where x is average of total signal output and X is the maximum deviation from x . The amount of incident light is shown below. Red = 1/2*SE Green = 1/2*SE Blue = 1/4*SE Note 4: PRNU (3) is defined as maximum voltage with next pixels, where measured at 5% of SE (typ.). Note 5: Register imbalance is defined as follows. 21359 RI = n =1 xn - x (n + 1) 21359 x x (%) x 100 Note 6: VSAT is defined as minimum saturation output of all effective pixels. Note 7: Definition of SE SE = VSAT RG (lxs) 3 2002-01-31 TCD2950D Note 8: VDRK is defined as average dark signal voltage of all effective pixels. DSNU is defined as different voltage between VDRK and VMDK when VMDK is maximum dark signal voltage. VDRK VMDK DSNU Note 9: DC signal output voltage is defined as follows. Reset noise voltage is defined as follows. Masking noise voltage is defined as follows. VRSN OS VMS VOS SS Note 10: Random noise is defined as the standard deviation (sigma) of the output level difference between two adjacent effective pixels under no illumination (i.e. darkconditions) calculated by the following procedure. video output Output waveform (effective pixels under dark condition) video output 200 ns 200 ns pixel (n) (1) (2) (3) (4) 1 30 | Vi | 30 i=1 = 1 30 2 (| Vi |-V ) 30 i=1 Procedure (2), (3) and (4) are repeated 10 times to get sigma value. 10 sigma values are averaged. = (7) pixel (n + 1) Two adjacent pixels (pixel n and n + 1) in one reading are fixed as measurement points. Each of the output level at video output periods averaged over 200 ns period to get V (n) and V (n + 1). V (n + 1) is subtracted from V (n) to get V. V = V (n) - V (n + 1) The standard deviation of V is calculated after procedure (2) and (3) are repeated 30 times (30 readings). V = (5) (6) V 1 10 10 j = 1 j value calculated using the above procedure is observed 2 times larger than that measured relative to the ground level. So we specify random noise as follows. ND = 1 2 4 2002-01-31 TCD2950D Operating Condition Characteristics Clock pulse voltage Shift pulse voltage Reset pulse voltage Clamp pulse voltage Symbol "H" level "L" level "H" level "L" level "H" level "L" level "H" level "L" level Power supply voltage Min Typ. Max 4.5 5.0 5.5 0 0.3 4.5 5.0 5.5 0 0.5 4.5 5.0 5.5 0 0.5 4.5 5.0 5.5 0 0.5 11.4 12.0 13.0 VA VSH V RS V CP VOD Unit Note V V V V V Clock Characteristics (Ta = 25C) Characteristics Symbol Min Typ. Max Unit Clock pulse frequency fA 0.15 1.0 10 MHz Reset pulse frequency f RS 0.3 2.0 10 MHz Clamp pulse frequency f CP 0.3 2.0 10 MHz CA 400 pF Shift gate capacitance CSH 50 pF Reset gate capacitance CRS 10 pF CCP 10 pF Clock capacitance Clamp gate capacitance (Note 11) Note 11: VOD = 12 V 5 2002-01-31 TCD2950D Timing Chart (bit clamp mode) tINT (integration time) SH 1A 2A RS CP D3 D2 D1 D0 D77 D76 D75 D73 D67 D66 D65 D64 S21360 S21359 S3 S2 S1 D63 D62 D61 D60 D59 D58 D16 D15 D14 D13 D12 D11 D10 D4 D3 D2 D1 D0 OS DUMMY OUTPUTS (13 elements) DUMMY OUTPUTS (8 elements) LIGHT SHIELD OUTPUTS (47 elements) TEST OUTPUT (2 element) (3 elements) DUMMY OUTPUTS (64 elements) SIGNAL OUTPUTS (21360 elements) DUMMY OUTPUTS (14 elements) DUMMY OUTPUT (1 element) 1 LINE READOUT PERIOD (21438 elements) 6 2002-01-31 TCD2950D Timing Requirements t2 t3 t4 SH 1 t1 t5 2 1A GND 3.5 V (max) 1.5 V (min) 3.5 V (max) 1.5 V (min) RS t18 CP 1 t6 t7 2 RS t15 t14 t8 t10 t9 CP t16 t17 t11 t13 t12 OS 7 2002-01-31 TCD2950D Timing Requirements Characteristics Pulse timing of SH and 1A SH pulse rise time, fall time Symbol Min Typ. (Note11) Max t1 110 1000 t5 200 1000 t2, t4 0 50 ns Unit ns t3 1000 2000 ns t6, t7 0 50 ns t8, t10 0 20 ns t9 15 100 ns t11, t13 0 20 ns CP pulse width t12 20 100 ns Pulse timing of 1A, 2A and CP t14 10 40 ns Pulse timing of RS and CP t15 0 100 ns t16, t17 15 ns t18 0 500 ns SH pulse width 1, 2 pulse rise time, fall time RS pulse rise time, fall time RS pulse width (Note 12) CP pulse rise time, fall time Video data delay time (Note 13) Pulse timing of SH and CP Note 12: TYP is the case of f RS = 2.0 MHz. Note 13: Load resistance is 100 k. 8 2002-01-31 TCD2950D Typical Spectral Response Spectral response 1.0 Ta = 25C Red Relative response 0.8 Green Blue 0.6 0.4 0.2 0 400 450 500 550 Wave length 9 600 650 700 (nm) 2002-01-31 TCD2950D Typical Drive Circuit +5 V 0.1 F/25 V 12 V 1A3 1A4 0.1 F/25 V 2A3 2A4 10 F/25 V CP IC1 22 21 20 19 18 17 16 15 14 13 12 OS2 OS1 OD CP SS 1A4 2A4 2A3 1A3 SH1 SH2 +5 V 0.1 F/25 V TCD2950D OS3 SS 1 2 RS SS 3 4 NC 1A1 2A1 2A2 1A2 SH3 5 6 7 8 9 10 SS 11 SH1 SH2 SH3 RS +12 V 0.1 F/25 V R1 R1 10 F/25 V TR1 OS1 R1 R1 R1 IC2 R1 +5 V 0.1 F/25 V TR2 OS2 1A2 TR3 OS3 R2 R2 2A2 R2 2A1 1A1 IC1, 2: TC74AC04P TR1, 2, 3: 2SC1815-Y R1: 150 R2: 1500 IC3 10 2002-01-31 TCD2950D Caution 1. Window Glass The dust and stain on the glass window of the package degrade optical performance of CCD sensor. Keep the glass window clean by saturating a cotton swab in alcohol and lightly wiping the surface, and allow the glass to dry, by blowing with filtered dry N2. Care should be taken to avoid mechanical or thermal shock because the glass window is easily to damage. 2. Electrostatic Breakdown Store in shorting clip or in conductive foam to avoid electrostatic breakdown. CCD Image Sensor is protected against static electricity, but interior puncture mode device due to static electricity is sometimes detected. In handing the device, it is necessary to execute the following static electricity preventive measures, in order to prevent the trouble rate increase of the manufacturing system due to static electricity. a. Prevent the generation of static electricity due to friction by making the work with bare hands or by putting on cotton gloves and non-charging working clothes. b. Discharge the static electricity by providing earth plate or earth wire on the floor, door or stand of the work room. c. Ground the tools such as soldering iron, radio cutting pliers of or pincer. It is not necessarily required to execute all precaution items for static electricity. It is all right to mitigate the precautions by confirming that the trouble rate within the prescribed range. 3. Incident Light CCD sensor is sensitive to infrared light. Note that infrared light component degrades resolution and PRNU of CCD sensor. 4. Lead Frame Forming Since this package is not strong against mechanical stress, you should not reform the lead frame. We recommend to use a IC-inserter when you assemble to PCB. 5. Soldering Soldering by the solder flow method cannot be guaranteed because this method may have deleterious effects on prevention of window glass soiling and heat resistance. Using a soldering iron, complete soldering within ten seconds for lead temperatures of up to 260C, or within three seconds for lead temperatures of up to 350C. 11 2002-01-31 TCD2950D Package Dimensions (Note1): (Note2): (Note3): TOP OF CHIP TO BOTTOM OF PACKAGE GLASS THICKNESS (n = 1.5) No.1 SENSOR ELEMENT (S1) TO CENTER OF No.1 PIN. Weight: 5.2 g (typ.) 12 2002-01-31 TCD2950D RESTRICTIONS ON PRODUCT USE 000707EBA * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice. 13 2002-01-31