LM2660MX - National Semiconductor

LM2660

January 24, 2012

Switched Capacitor Voltage Converter

General Description

The LM2660 CMOS charge-pump voltage converter is a ver-

satile unregulated switched capacitor inverter or doubler. Op-

erating from a wide 1.5V to 5.5V supply voltage, the LM2660

uses two low-cost capacitors to provide 100 mA of output

current without the cost, size and EMI related to inductor-

based converters. With an operating current of only 120 µA

and operating efficiency greater than 90% at most loads, the

LM2660 provides ideal performance for battery-powered sys-

tems. LM2660 devices can be operated directly in parallel to

lower output impedance, thus providing more current at a giv-

en voltage.

The FC (frequency control) pin selects between a nominal 10

kHz or 80 kHz oscillator frequency. The oscillator frequency

can be lowered by adding an external capacitor to the OSC

pin. Also, the OSC pin may be used to drive the LM2660 with

an external clock up to 150 kHz. Through these methods,

output ripple frequency and harmonics may be controlled.

Additionally, the LM2660 may be configured to divide a pos-

itive input voltage precisely in half. In this mode, input voltages

as high as 11V may be used.

Features

■Inverts or doubles input supply voltage

■Narrow SO-8 and Mini SO-8 Package

■6.5Ω typical output resistance

■88% typical conversion efficiency at 100 mA

■Selectable oscillator frequency: 10 kHz/80 kHz

■Optional external oscillator input

Applications

■Laptop computers

■Cellular phones

■Medical instruments

■Operational amplifier power supplies

■Interface power supplies

■Handheld instruments

Basic Application Circuits

Voltage Inverter

1291103

Positive Voltage Doubler

1291104

Splitting VIN in Half

1291126

LM2660 Switched Capacitor Voltage Converter

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the Texas Instruments Sales Office/

Distributors for availability and specifications.

Supply Voltage (V+ to GND, or GND to OUT) 6V

LV (OUT − 0.3V) to (GND + 3V)

FC, OSC The least negative of (OUT − 0.3V)

or (V+ − 6V) to (V+ + 0.3V)

V+ and OUT Continuous Output Current 120 mA

Output Short-Circuit Duration to GND (Note 2) 1 sec.

Package

M MM

Power Dissipation

(TA = 25°C) (Note 3) 735 mW 500 mW

TJ Max (Note 3) 150°C 150°C

θJA (Note 3)170°C/W 250°C/W

Operating Junction

Temperature

Range −40°C to +85°C

Storage Temperature Range −65°C to +150°C

Lead Temperature 300°C

(Soldering, 10 seconds)

ESD Rating 2 kV

Electrical Characteristics

Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless

otherwise specified: V+ = 5V, FC = Open, C1 = C2 = 150 μF. (Note 4)

Symbol Parameter Condition Min Typ Max Units

V+ Supply Voltage RL = 1k

Inverter, LV = Open 3.5 5.5

Inverter, LV = GND 1.5 5.5 V

Doubler, LV = OUT 2.5 5.5

IQSupply Current No Load FC = Open 0.12 0.5 mA

LV = Open FC = V+ 1 3

ILOutput Current TA ≤ +85°C, OUT ≤ −4V 100 mA

TA > +85°C, OUT ≤ −3.8V 100

ROUT Output Resistance (Note 5)IL = 100 mA TA ≤ +85°C 6.5 10 Ω

TA > +85°C 12

fOSC Oscillator Frequency OSC = Open FC = Open 510 kHz

FC = V+ 40 80

fSW Switching Frequency (Note 6) OSC = Open FC = Open 2.5 5 kHz

FC = V+ 20 40

IOSC OSC Input Current FC = Open ±2 µA

FC = V+ ±16

PEFF Power Efficiency

RL (1k) between V+ and OUT 96 98

RL (500) between GND and OUT 92 96 %

IL = 100 mA to GND 88

VOEFF Voltage Conversion Efficiency No Load 99 99.96 %

Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device

beyond its rated operating conditions.

Note 2: OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and should be avoided. Also, for

temperatures above 85°C, OUT must not be shorted to GND or V+, or device may be damaged.

Note 3: The maximum allowable power dissipation is calculated by using PDMax = (TJMax − TA)/θJA, where TJMax is the maximum junction temperature, TA is the

ambient temperature, and θJA is the junction-to-ambient thermal resistance of the specified package.

Note 4: In the test circuit, capacitors C1 and C2 are 0.2Ω maximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce output

voltage and efficiency.

Note 5: Specified output resistance includes internal switch resistance and capacitor ESR.

Note 6: The output switches operate at one half of the oscillator frequency, fOSC = 2fSW.

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LM2660

Test Circuits

1291105

FIGURE 1. LM2660 Test Circuit

Typical Performance Characteristics (Circuit of Figure 1)

Supply Current vs

Supply Voltage

1291107

Supply Current vs

Oscillator Frequency

1291108

Output Source

Resistance vs Supply

Voltage

1291109

Output Source

Resistance vs

Temperature

1291110

Efficiency vs Load

Current

1291111

Output Voltage Drop

vs Load Current

1291112

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LM2660

Efficiency vs

Oscillator Frequency

1291113

Output Voltage vs

Oscillator Frequency

1291114

Oscillator Frequency

vs External

Capacitance

1291115

Oscillator Frequency

vs Supply Voltage

(FC = V+)

1291116

Oscillator Frequency

vs Supply Voltage

(FC = Open)

1291117

Oscillator Frequency

vs Temperature

(FC = V+)

1291118

Oscillator Frequency

vs Temperature

(FC = Open)

1291119

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LM2660

Connection Diagrams

8-Lead SO (M) or Mini SO (MM)

1291101

Top View

Order Number LM2660M/MX or LM2660MM

See NS Package Number M08A and MUA08A

Ordering Information

Order Number Package Number Package Marking Supplied As

LM2660M M08A

Datecode

Rail (95 units/rail)LM26

60M

LM2660MX M08A

Datecode

Tape and Reel (2500 units/rail)LM26

60M

LM2660MM MUA08A S01A (Note 7) Tape and Reel (1000 units/rail)

Note 7: The first letter “S” identifies the part as a switched capacitor converter. “01” specifies LM2660. The fourth letter “A” indicates the grade. Only one grade

is available. Larger quantity reels are available upon request.

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LM2660

Pin Description

Pin Name Function

Voltage Inverter Voltage Doubler

1 FC

Frequency control for internal oscillator:

Same as inverter.

FC = open, fOSC = 10 kHz (typ);

FC = V+, fOSC = 80 kHz (typ);

FC has no effect when OSC pin is driven externally.

2 CAP+ Connect this pin to the positive terminal of charge-pump

capacitor. Same as inverter.

3 GND Power supply ground input. Power supply positive voltage input.

4 CAP− Connect this pin to the negative terminal of charge-pump

capacitor. Same as inverter.

5 OUT Negative voltage output. Power supply ground input.

6 LV

Low-voltage operation input. Tie LV to GND when input

voltage is less than 3.5V. Above 3.5V, LV can be

connected to GND or left open. When driving OSC with an

external clock, LV must be connected to GND.

LV must be tied to OUT.

7 OSC

Oscillator control input. OSC is connected to an internal

15 pF capacitor. An external capacitor can be connected

to slow the oscillator. Also, an external clock can be used

to drive OSC.

Same as inverter except that OSC cannot be driven by

an external clock.

8 V+ Power supply positive voltage input. Positive voltage output.

Circuit Description

The LM2660 contains four large CMOS switches which are

switched in a sequence to invert the input supply voltage. En-

ergy transfer and storage are provided by external capacitors.

Figure 2 illustrates the voltage conversion scheme. When

S1 and S3 are closed, C1 charges to the supply voltage V+.

During this time interval switches S2 and S4 are open. In the

second time interval, S1 and S3 are open and S2 and S4 are

closed, C1 is charging C2. After a number of cycles, the volt-

age across C2 will be pumped to V+. Since the anode of C2

is connected to ground, the output at the cathode of C2 equals

−(V+) assuming no load on C2, no loss in the switches, and

no ESR in the capacitors. In reality, the charge transfer effi-

ciency depends on the switching frequency, the on-resistance

of the switches, and the ESR of the capacitors.

1291121

FIGURE 2. Voltage Inverting Principle

Application Information

SIMPLE NEGATIVE VOLTAGE CONVERTER

The main application of LM2660 is to generate a negative

supply voltage. The voltage inverter circuit uses only two ex-

ternal capacitors as shown in the Basic Application Circuits.

The range of the input supply voltage is 1.5V to 5.5V. For a

supply voltage less than 3.5V, the LV pin must be connected

to ground to bypass the internal regulator circuitry. This gives

the best performance in low voltage applications. If the supply

voltage is greater than 3.5V, LV may be connected to ground

or left open. The choice of leaving LV open simplifies the di-

rect substitution of the LM2660 for the LMC7660 Switched

Capacitor Voltage Converter.

The output characteristics of this circuit can be approximated

by an ideal voltage source in series with a resistor. The volt-

age source equals −(V+). The output resistance Rout is a

function of the ON resistance of the internal MOS switches,

the oscillator frequency, and the capacitance and ESR of C1

and C2. A good approximation is:

where RSW is the sum of the ON resistance of the internal

MOS switches shown in Figure 2.

High value, low ESR capacitors will reduce the output resis-

tance. Instead of increasing the capacitance, the oscillator

frequency can be increased to reduce the 2/(fosc × C1) term.

Once this term is trivial compared with RSW and ESRs, further

increasing in oscillator frequency and capacitance will be-

come ineffective.

The peak-to-peak output voltage ripple is determined by the

oscillator frequency, and the capacitance and ESR of the out-

put capacitor C2:

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LM2660

Again, using a low ESR capacitor will result in lower ripple.

POSITIVE VOLTAGE DOUBLER

The LM2660 can operate as a positive voltage doubler (as

shown in the Basic Application Circuits). The doubling func-

tion is achieved by reversing some of the connections to the

device. The input voltage is applied to the GND pin with an

allowable voltage from 2.5V to 5.5V. The V+ pin is used as

the output. The LV pin and OUT pin must be connected to

ground. The OSC pin can not be driven by an external clock

in this operation mode. The unloaded output voltage is twice

of the input voltage and is not reduced by the diode D1's for-

ward drop.

The Schottky diode D1 is only needed for start-up. The internal

oscillator circuit uses the V+ pin and the LV pin (connected to

ground in the voltage doubler circuit) as its power rails. Volt-

age across V+ and LV must be larger than 1.5V to insure the

operation of the oscillator. During startup, D1 is used to charge

up the voltage at V+ pin to start the oscillator; also, it protects

the device from turning-on its own parasitic diode and poten-

tially latching-up. Therefore, the Schottky diode D1 should

have enough current carrying capability to charge the output

capacitor at start-up, as well as a low forward voltage to pre-

vent the internal parasitic diode from turning-on. A Schottky

diode like 1N5817 can be used for most applications. If the

input voltage ramp is less than 10V/ms, a smaller Schottky

diode like MBR0520LT1 can be used to reduce the circuit

size.

SPLIT V+ IN HALF

Another interesting application shown in the Basic Application

Circuits is using the LM2660 as a precision voltage divider.

Since the off-voltage across each switch equals VIN/2, the in-

put voltage can be raised to +11V.

CHANGING OSCILLATOR FREQUENCY

The internal oscillator frequency can be selected using the

Frequency Control (FC) pin. When FC is open, the oscillator

frequency is 10 kHz; when FC is connected to V+, the fre-

quency increases to 80 kHz. A higher oscillator frequency

allows smaller capacitors to be used for equivalent output re-

sistance and ripple, but increases the typical supply current

from 0.12 mA to 1 mA.

The oscillator frequency can be lowered by adding an external

capacitor between OSC and GND. (See Typical Performance

Characteristics.) Also, in the inverter mode, an external clock

that swings within 100 mV of V+ and GND can be used to

drive OSC. Any CMOS logic gate is suitable for driving OSC.

LV must be grounded when driving OSC. The maximum ex-

ternal clock frequency is limited to 150 kHz.

The switching frequency of the converter (also called the

charge pump frequency) is half of the oscillator frequency.

Note: OSC cannot be driven by an external clock in the voltage-doubling

mode.

TABLE 1. LM2660 Oscillator Frequency Selection

FC OSC Oscillator

Open Open 10 kHz

V+ Open 80 kHz

Open or V+ External Capacitor See Typical

Performance

Characteristics

N/A External Clock External Clock

(inverter mode only) Frequency

CAPACITOR SELECTION

As discussed in the Simple Negative Voltage Converter sec-

tion, the output resistance and ripple voltage are dependent

on the capacitance and ESR values of the external capaci-

tors. The output voltage drop is the load current times the

output resistance, and the power efficiency is

Where IQ(V+) is the quiescent power loss of the IC device,

and IL2ROUT is the conversion loss associated with the switch

on-resistance, the two external capacitors and their ESRs.

Since the switching current charging and discharging C1 is

approximately twice as the output current, the effect of the

ESR of the pumping capacitor C1 is multiplied by four in the

output resistance. The output capacitor C2 is charging and

discharging at a current approximately equal to the output

current, therefore, its ESR only counts once in the output re-

sistance. However, the ESR of C2 directly affects the output

voltage ripple. Therefore, low ESR capacitors (Table 2) are

recommended for both capacitors to maximize efficiency, re-

duce the output voltage drop and voltage ripple. For conve-

nience, C1 and C2 are usually chosen to be the same.

The output resistance varies with the oscillator frequency and

the capacitors. In Figure 3, the output resistance vs. oscillator

frequency curves are drawn for three different tantalum ca-

pacitors. At very low frequency range, capacitance plays the

most important role in determining the output resistance.

Once the frequency is increased to some point (such as 20

kHz for the 150 μF capacitors), the output resistance is dom-

inated by the ON resistance of the internal switches and the

ESRs of the external capacitors. A low value, smaller size

capacitor usually has a higher ESR compared with a bigger

size capacitor of the same type. For lower ESR, use ceramic

capacitors.

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LM2660

1291132

FIGURE 3. Output Source Resistance vs Oscillator Frequency

TABLE 2. Low ESR Capacitor Manufacturers

Manufacturer Capacitor Type

Nichicon Corp. PL, PF series, through-hole aluminum electrolytic

AVX Corp. TPS series, surface-mount tantalum

Sprague 593D, 594D, 595D series, surface-mount tantalum

Sanyo OS-CON series, through-hole aluminum electrolytic

Other Applications

PARALLELING DEVICES

Any number of LM2660s can be paralleled to reduce the out-

put resistance. Each device must have its own pumping ca-

pacitor C1, while only one output capacitor Cout is needed as

shown in Figure 4. The composite output resistance is:

1291122

FIGURE 4. Lowering Output Resistance by Paralleling Devices

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LM2660

CASCADING DEVICES

Cascading the LM2660s is an easy way to produce a greater

negative voltage (as shown in Figure 5). If n is the integer

representing the number of devices cascaded, the unloaded

output voltage Vout is (−nVin). The effective output resistance

is equal to the weighted sum of each individual device:

A three-stage cascade circuit shown in Figure 6 generates

−3Vin, from Vin.

Cascading is also possible when devices are operating in

doubling mode. In Figure 7, two devices are cascaded to

generate 3Vin.

An example of using the circuit in Figure 6 or Figure 7 is gen-

erating +15V or −15V from a +5V input.

Note that, the number of n is practically limited since the in-

creasing of n significantly reduces the efficiency and increas-

es the output resistance and output voltage ripple.

1291123

FIGURE 5. Increasing Output Voltage by Cascading Devices

1291124

FIGURE 6. Generating −3Vin from +Vin

1291125

FIGURE 7. Generating +3Vin from +Vin

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LM2660

REGULATING Vout

It is possible to regulate the output of the LM2660 by use of

a low dropout regulator (such as LP2951). The whole con-

verter is depicted in Figure 8. This converter can give a

regulated output from −1.5V to −5.5V by choosing the proper

resistor ratio:

where, Vref = 1.235V

The error flag on pin 5 of the LP2951 goes low when the reg-

ulated output at pin 4 drops by about 5%. The LP2951 can be

shutdown by taking pin 3 high.

1291127

FIGURE 8. Combining LM2660 with LP2951 to Make a Negative Adjustable Regulator

Also, as shown in Figure 9 by operating LM2660 in voltage

doubling mode and adding a linear regulator (such as

LP2981) at the output, we can get +5V output from an input

as low as +3V.

1291128

FIGURE 9. Generating +5V from +3V Input Voltage

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LM2660

Physical Dimensions inches (millimeters) unless otherwise noted

8-Lead SO (M)

Order Number LM2660M or LM2660MX

NS Package Number M08A

8-Lead Mini SO (MM)

Order Number LM2660MM

NS Package Number MUA08A

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LM2660

Notes

LM2660 Switched Capacitor Voltage Converter

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