© Semiconductor Components Industries, LLC, 2013
May, 2013 − Rev. 3
1Publication Order Number:
NVMFS4841N/D
NVMFS4841N
Power MOSFET
30V, 7 mW, 89A, Single N−Channel SO8FL
Features
•Small Footprint (5x6 mm) for Compact Design
•Low RDS(on) to Minimize Conduction Losses
•Low QG and Capacitance to Minimize Driver Losses
•NVMFS4841NWF − Wettable Flanks Product
•AEC−Q101 Qualified and PPAP Capable
•These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS 30 V
Gate−to−Source Voltage VGS "20 V
Continuous Drain Cur-
rent RYJ−mb (Notes 1,
2, 3, 4) Steady
State
Tmb = 25°CID89 A
Tmb = 100°C 63
Power Dissipation
RYJ−mb (Notes 1, 2, 3)
Tmb = 25°CPD112 W
Tmb = 100°C 56
Continuous Drain Cur-
rent RqJA (Notes 1 &
3, 4) Steady
State
TA = 25°CID16 A
TA = 100°C11
Power Dissipation
RqJA (Notes 1, 3)
TA = 25°CPD3.7 W
TA = 100°C 1.8
Pulsed Drain Current TA = 25°C, tp = 10 msIDM 336 A
Current limited by package
(Note 4)
TA = 25°C IDmaxPkg 80 A
Operating Junction and Storage Temperature TJ, Tstg −55 to
175
°C
Source Current (Body Diode) IS51 A
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VDD = 24 V, VGS = 10 V,
IL(pk) = 19 A, L = 1.0 mH, RG = 25 W)
EAS 180 mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter Symbol Value Unit
Junction−to−Mounting Board (top) − Steady
State (Note 2, 3)
RYJ−mb 1.3 °C/W
Junction−to−Ambient − Steady State (Note 3) RqJA 41
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
MARKING
DIAGRAM
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A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
XXXXXX
AYWZZ
1
V(BR)DSS RDS(ON) MAX ID MAX
30 V 7.0 mW @ 10 V
89 A
11.4 mW @ 4.5 V
G (4)
S (1,2,3)
N−CHANNEL MOSFET
D (5,6)
S
S
S
G
D
D
D
D
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
NVMFS4841N
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2
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA30 V
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
25 mV/°C
Zero Gate Voltage Drain Current IDSS VGS = 0 V,
VDS = 30 V
TJ = 25 °C 1
mA
TJ = 125°C 10
Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±20 V ±100 nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA1.5 2.5 V
Negative Threshold Temperature Coefficient VGS(TH)/TJ5.6 mV/°C
Drain−to−Source On Resistance RDS(on) VGS = 10 V ID = 30 A 4.7 7.0
mW
VGS = 4.5 V ID = 30 A 9.2 11.4
Forward Transconductance gFS VDS = 15 V, ID = 15 A 16 S
CHARGES AND CAPACITANCES
Input Capacitance CISS
VGS = 0 V, f = 1 MHz, VDS = 12 V
1436
pF
Output Capacitance COSS 348
Reverse Transfer Capacitance CRSS 177
Total Gate Charge QG(TOT)
VGS = 4.5 V, VDS = 15 V; ID = 30 A
11.5 17
nC
Threshold Gate Charge QG(TH) 2.0
Gate−to−Source Charge QGS 5.0
Gate−to−Drain Charge QGD 5.1
Total Gate Charge QG(TOT) VGS = 10 V, VDS = 15 V,
ID = 30 A
25.4 nC
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time td(ON)
VGS = 4.5 V, VDS = 15 V, ID = 15 A,
RG = 3.0 W
13.5
ns
Rise Time tr66.5
Turn−Off Delay Time td(OFF) 15.5
Fall Time tf7.5
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V,
IS = 30 A
TJ = 25°C 0.9 1.2
V
TJ = 125°C 0.8
Reverse Recovery Time tRR
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
20.5
ns
Charge Time ta11.6
Discharge Time tb8.9
Reverse Recovery Charge QRR 10.7 nC
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
NVMFS4841N
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3
TYPICAL PERFORMANCE CURVES
4 V
5.5 V to 10 V
60
0.011
15
0.002
30
1.4
1.0
0.6
1000
10000
0
30
21
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
ID, DRAIN CURRENT (AMPS)
0
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
ID, DRAIN CURRENT (AMPS)
3
0.013
0.009
0.005 5
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
ID, DRAIN CURRENT (AMPS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
Figure 5. On−Resistance Variation with
Temperature
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
IDSS, LEAKAGE (nA)
−50 250−25 50 10075
23
1510 305
3
VDS = 10 V
TJ = 25°C
TJ = −55°C
TJ = 125°C
VGS = 4.5 V
150
VGS = 0 V
ID = 30 A
VGS = 10 V
50
TJ = 150°C
TJ = 25°C
40
045
TJ = 25°C
20
0.1
VGS = 5 V
1.9
100
41
620
0.005
25
4.5 V
3.4 V
3.6 V
3.8 V
40
10
20
30
20
10
50
ID = 30 A
TJ = 25°C
789
0.007
0.011
0.015
VGS = 10 V
125
10
TJ = 25°C
0.008
10
5
60
70
678
10 11
0.017
0.014
25
60
70
80
90
100
110
120
130
80
90
100
110
120
130
0.017
0.012
0.008
0.006
0.010
0.014
0.016
40 5545 5035
1.3
0.9
1.7
1.2
0.8
1.6
1.1
0.7
1.5
1
TJ = 125°C
175
0.018
4
1.8
NVMFS4841N
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4
TYPICAL PERFORMANCE CURVES
Crss
10 0 10 15 30
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
C, CAPACITANCE (pF)
Figure 7. Capacitance Variation
2000
0
VGS VDS
55
TJ = 25°C
Ciss
Coss
Crss
Ciss
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
0
2
0
QG, TOTAL GATE CHARGE (nC)
1
4
8
VDD = 15 V
VGS = 10 V
ID = 30 A
TJ = 25°C
QT
10
0
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
IS, SOURCE CURRENT (AMPS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
RG, GATE RESISTANCE (W)
1 10 100
1000
1
t, TIME (ns)
VGS = 0 V
Figure 10. Diode Forward Voltage vs. Current
100
0.6 0.7
5
10
15
tr
td(off)
td(on)
tf
10
VDD = 15 V
ID = 15 A
VGS = 10 V
0.8 0.9
20
30
25 TJ = 25°C
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
0.1 1 100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1000
ID, DRAIN CURRENT (AMPS)
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
10
10
VGS = 20 V
SINGLE PULSE
TC = 25°C
1 ms
100 ms
10 ms
dc
10 ms
20
1
100
0
25
TJ, STARTING JUNCTION TEMPERATURE (°C)
ID = 19 A
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
50 75
20
60
80
100 125
100
180
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
175
1000
40
25
2200
1800
1600
1400
1200
200
800
600
400
0.5 1.0
120
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
3
426 1614 2612
QGS
140
160
12
QGD
18 20 22
11
10
9
8
7
6
5
24
150
NVMFS4841N
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5
TYPICAL PERFORMANCE CURVES
Figure 13. FET Thermal Response
0.01
0.1
1
10
0.000001 0.00001 0.0001 0.001 0.01 0.1 1000
t, PULSE TIME (s)
RqJ(t) (°C/W) EFFECTIVE TRANSIENT
THERMAL RESISTANCE
0.02
0.2
0.01
0.05
Duty Cycle = 0.5
SINGLE PULSE
0.1
1 10 100
100
DEVICE ORDERING INFORMATION
Device Marking Package Shipping†
NVMFS4841NT1G V4841 DFN5
(Pb−Free)
1500 / Tape & Reel
NVMFS4841NWFT1G 4841WF DFN5
(Pb−Free)
1500 / Tape & Reel
NVMFS4841NT3G V4841 DFN5
(Pb−Free)
5000 / Tape & Reel
NVMFS4841NWFT3G 4841WF DFN5
(Pb−Free)
5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NVMFS4841N
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6
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE H
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
1.270
2X
0.750
1.000
0.905
0.475
4.530
1.530
4.560
0.495
3.200
1.330
0.965
2X
2X
3X 4X
4X
M3.00 3.40
q0 −−−
_
3.80
12
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
1234
TOP VIEW
SIDE VIEW
BOTTOM VIEW
D1
E1 q
D
E
2
2
B
A
0.20 C
0.20 C
2 X
2 X
DIM MIN NOM
MILLIMETERS
A0.90 1.00
A1 0.00 −−−
b0.33 0.41
c0.23 0.28
D5.15 BSC
D1 4.70 4.90
D2 3.80 4.00
E6.15 BSC
E1 5.70 5.90
E2 3.45 3.65
e1.27 BSC
G0.51 0.61
K1.20 1.35
L0.51 0.61
L1 0.05 0.17
A
0.10 C
0.10 C
DETAIL A
14
L1
e/2
8X
D2
G
E2
K
b
A0.10 BC
0.05 cL
DETAIL A
A1
e
3 X
c
4 X
C
SEATING
PLANE
MAX
1.10
0.05
0.51
0.33
5.10
4.20
6.10
3.85
0.71
1.50
0.71
0.20
M
PIN 5
(EXPOSED PAD)
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Phone: 421 33 790 2910
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Phone: 81−3−5817−1050
NVMFS4841N/D
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