VTM48Ex480y006A00
VTM™ Current Multiplier
High Efficiency, Sine Amplitude Converter™
VTM™ Current Multiplier Rev 1.5
Page 1 of 19 03/2019
S
NRTL
CUS
Features & Benefits
• 48VDC to 48VDC 6.3A current multiplier
Operating from standard 48V or 24V PRM™ Regulators
• High efficiency (>96%) reduces system power
consumption
• High density (21.8A/in3)
• “Full Chip” VI Chip® package enables surface mount,
low impedance interconnect to system board
• Contains built-in protection features against:
Overvoltage Lockout
Overcurrent
Short Circuit
Overtemperature
• Provides enable / disable control,
internal temperature monitoring
• ZVS / ZCS resonant Sine Amplitude Converter topology
• Less than 50ºC temperature rise at full load
in typical applications
Typical Applications
• High-End Computing Systems
• Automated Test Equipment
• High-Density Power Supplies
• Communications Systems
Product Description
The VI Chip® current multiplier is a high efficiency (>96%)
Sine Amplitude Converter™ (SAC) operating from a 26 to 55VDC
primary bus to deliver an isolated output. The Sine Amplitude
Converter offers a low AC impedance beyond the bandwidth
of most downstream regulators; therefore capacitance normally
at the load can be located at the input to the Sine Amplitude
Converter. Since the K factor of the VTM48EF480T006A00 is 1,
the capacitance value can be reduced by a factor of 1, resulting in
savings of board area, materials and total system cost.
The VTM48EF480T006A00 is provided in a VI Chip package
compatible with standard pick-and-place and surface mount
assembly processes. The co-molded VI Chip package provides
enhanced thermal management due to a large thermal interface
area and superior thermal conductivity. The high conversion
efficiency of the VTM48EF480T006A00 increases overall
system efficiency and lowers operating costs compared to
conventional approaches.
The VTM48EF480T006A00 enables the utilization of Factorized
Power Architecture™ which provides efficiency and size benefits
by lowering conversion and distribution losses and promoting high
density point-of-load conversion.
VIN
L
O
A
D
PR
PC
VC
TM
IL
OS
SG
PRM™
Regulator
CD
-OUT
+OUT
-IN
+IN
PC
VC
TM
-OUT
+OUT
-IN
+IN
Regulator Voltage Transformer
Factorized Power ArchitectureTM
VTM™
Transformer
(See Application Note AN:024)
For Storage and Operating Temperatures see General Characteristics Section
Typical Application
Product Ratings
VIN = 26 – 55V IOUT = 6.3A (Nominal)
VOUT = 26 – 55V (No Load) K = 1
Product Number Package Style (x) Product Grade (y)
VTM48Ex480y006A00 F = J-Lead T = –40 to 125°C
T = Through hole M = –55 to 125°C
Part Numbering
VTM™ Current Multiplier Rev 1.5
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VTM48Ex480y006A00
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter Comments Min Max Unit
+IN to –IN –1.0 60 VDC
PC to –IN –0.3 20 VDC
TM to –IN –0.3 7 VDC
VC to –IN –0.3 20 VDC
+IN / –IN to +OUT / –OUT (hipot) 2250 VDC
+OUT to –OUT –0.5 60 VDC
Electrical Specifications
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C < TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
Attribute Symbol Conditions / Notes Min Typ Max Unit
Powertrain
Input Voltage Range VIN
No external VC applied 26 55 VDC
VC applied 0 55
VIN Slew Rate dVIN / dt 1V / µs
VIN UV Turn Off VIN_UV Module latched shutdown, No external VC applied,
IOUT = 6.3A 24 26 V
No Load Power Dissipation PNL
VIN = 48V 2.3 10.0
W
VIN = 26 – 55V 11
VIN = 48V, TC = 25ºC 3.4 4.5
VIN = 26 – 55V, TC = 25ºC 7
Inrush Current Peak IINRP VC enable, VIN = 48V, COUT = 100µF,
RLOAD = 7443mΩ 16.5 24 A
DC Input Current IIN_DC 6.4 A
Transfer Ratio K K = VOUT / VIN, IOUT = 0A 1 V / V
Output Voltage VOUT VOUT = VIN • K – IOUT • ROUT V
Output Current (Average) IOUT_AVG 6.3 A
Output Current (Peak) IOUT_PK tPEAK < 10ms, IOUT_AVG ≤ 6.3A 7.9 A
Output Power (Average) POUT_AVG IOUT_AVG ≤ 6.3A 300 W
Efficiency (Ambient) ηAMB
VIN = 48V, IOUT = 6.3A 95.0 96.2
%VIN = 26 – 55V, IOUT = 6.3A 93.3
VIN = 48V, IOUT = 3.15A 95.5 96.4
Efficiency (Hot) ηHOT VIN = 48V, TC = 100°C, IOUT = 6.3A 94.4 95.6 %
Efficiency (Over Load Range) η20% 1.26A < IOUT < 6.3A 80.0 %
VTM™ Current Multiplier Rev 1.5
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VTM48Ex480y006A00
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C < TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
Attribute Symbol Conditions / Notes Min Typ Max Unit
Powertrain (Cont.)
Output Resistance (Cold) ROUT_COLD TC = –40°C, IOUT = 6.3A 98.0 133.0 170.0 mΩ
Output Resistance (Ambient) ROUT_AMB TC = 25°C, IOUT = 6.3A 120 176.0 250.0 mΩ
Output Resistance (Hot) ROUT_HOT TC = 100°C, IOUT = 6.3A 180.0 230.0 280.0 mΩ
Switching Frequency FSW 1.64 1.67 1.70 MHz
Output Ripple Frequency FSW_RP 3.28 3.34 3.40 MHz
Output Voltage Ripple VOUT_PP Cout = 0F, Iout = 6.3A, Vin = 48V, 20MHz BW, 360 500 mV
Output Inductance (Parasitic) LOUT_PAR Frequency up to 30MHz, Simulated J-lead model 600 pH
Output Capacitance (Internal) COUT_INT Effective Value at 48Vout 3.5 µF
Output Capacitance (External) COUT_EXT VTM Standalone Operation. Vin pre-applied, VC enable 100 µF
Protection
Overvoltage Lockout VIN_OVLO+ Module latched shutdown 55.1 58.5 60.0 V
Overvoltage Lockout Response
Time Constant tOVLO Effective internal RC filter 8 µs
Output Overcurrent Trip IOCP 6.4 10 15 A
Short Circuit Protection Trip Current ISCP 16 A
Output Overcurrent Response
Time Constant tOCP Effective internal RC filter (Integrative) 3.8 ms
Short Circuit Protection
Response Time tSCP From detection to cessation of switching
(Instantaneous) 1 µs
Thermal Shutdown Set Point TJ_OTP 125 130 135 °C
Reverse Inrush Current Protection Reverse Inrush protection is enabled for this product
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VTM48Ex480y006A00
Signal Characteristics
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
VTM Control: VC
• Used to wake up powertrain circuit.
• A minimum of 11.5V must be applied indefinitely for Vin < 26V to ensure normal operation.
• VC slew rate must be within range for a successful start.
• PRM™ VC can be used as valid wake-up signal source.
• Internal Resistance used in “Adaptive Loop” compensation.
• VC voltage may be continuously applied.
Signal Type State Attribute Symbol Conditions / Notes Min Typ Max Unit
ANALOG
INPUT
Steady
External VC Voltage VVC_EXT Required for start up and operation
below 26V. 11.5 16.5 V
VC Current Draw IVC
VC = 11.5V, VIN = 0V 150 200
mA
VC = 11.5V, VIN > 26V 0
VC = 16.5V, VIN > 26V 0
Fault mode. VC > 11.5V 60
VC Internal Diode Rating DVC_INT 100 V
VC Internal Resistor RVC-INT 0.51 kΩ
VC Internal Resistor
Temperature Coefficient TVC_COEFF 3900 ppm/°C
Start Up
VC Start-Up Pulse VVC_SP tPEAK < 18ms 20 V
VC Slew Rate dVC/dt Required for proper start up 0.02 0.25 V / µs
VC Inrush Current IINR_VC VC = 16.5V, dVC/dt = 0.25V/μs 1A
Transitional
VC to VOUT Turn-On Delay tON VIN pre-applied, PC floating,
VC enable, CPC = 0μF 500 µs
VC to PC Delay tVC_PC VC = 11.5V to PC high, VIN = 0V,
dVC/dt = 0.25V/μs 75 125 µs
Internal VC Capacitance CVC_INT VC = 0V 3.2 µF
Primary Control: PC
• The PC pin enables and disables the VTM module. When held below 2V, the VTM module will be disabled.
• PC pin outputs 5V during normal operation. PC pin is equal to 2.5V during fault mode given Vin > 26V or VC > 11.5V.
• After successful start up and under no fault condition, PC can be used as a 5V regulated voltage source with a 2mA maximum current.
• Module will shutdown when pulled low with an impedance less than 400Ω.
• In an array of VTM modules, connect PC pin to synchronize start up.
• PC pin cannot sink current and will not disable other modules during fault mode.
Signal Type State Attribute Symbol Conditions / Notes Min Typ Max Unit
ANALOG
OUTPUT
Steady
PC Voltage VPC 4.7 5.0 5.3 V
PC Source Current IPC_OP 2 mA
PC Resistance (Internal) RPC_INT Internal pull-down resistor 50 150 400 kΩ
Start Up
PC Source Current IPC_EN 50 100 300 µA
PC Capacitance (Internal) CPC_INT 0pF
PC Resistance (External) RPC_S 60 kΩ
DIGITAL
INPUT /
OUTPUT
Enable PC Voltage VPC_EN 22.5 3V
Disable
PC Voltage (Disable) VPC_DIS 2V
PC Pull-Down Current IPC_PD 5.1 mA
Transitional
PC Disable Time tPC_DIS_t 5 µs
PC Fault Response Time tFR_PC From fault to PC = 2V 100 µs
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VTM48Ex480y006A00
Temperature Monitor: TM
• The TM pin monitors the internal temperature of the VTM controller IC within an accuracy of ±5°C.
• Can be used as a “Power Good” flag to verify that the VTM module is operating.
• The TM pin has a room-temperature set point of 3V and approximate gain of 10mV/°C.
• Output drives Temperature Shutdown comparator.
Signal Type State Attribute Symbol Conditions / Notes Min Typ Max Unit
ANALOG
OUTPUT Steady
TM Voltage VTM_AMB TJ controller = 27°C 2.95 3.00 3.05 V
TM Source Current ITM 100 µA
TM Gain ATM 10 mV/°C
TM Voltage Ripple VTM_PP CTM = 0F, VIN = 48V, IOUT = 6.3A 120 200 mV
DIGITAL
OUTPUT
(FAULT FLAG)
Disable TM Voltage VTM_DIS 0 V
Transitional
TM Resistance (Internal) RTM_INT Internal pull-down resistor 25 40 50 kΩ
TM Capacitance (External) CTM_EXT 50 pF
TM Fault Response Time tFR_TM From fault to TM = 1.5V 10 µs
Signal Characteristics (Cont.)
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
VTM™ Current Multiplier Rev 1.5
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VTM48Ex480y006A00
Timing Diagram
12
7
VPRI
1. Initiated VC pulse
2. Controller start
3. VPRI ramp up
4. VPRI = VOVLO
5. VPRI ramp down no VC pulse
6. Overcurrent, Secondary
7. Start up on short circuit
8. PC driven low
VSEC
PC
3V
VC
NL
5V
VOVLO
TM
VTM-AMB
c
Notes:
– Timing and voltage is not to scale
– Error pulse width is load dependent
a: VC slew rate (dVC/dt)
b: Minimum VC pulse rate
c: tOVLO_PIN
d: tOCP_SEC
e: Secondary turn on delay (tON)
f: PC disable time (tPC_DIS_t)
g: VC to PC delay (tVC_PC)
d
ISEC
ISEC
ISEC
VVC-EXT
345
6
a
b
8
g
ef
≥ 26V
VTM™ Current Multiplier Rev 1.5
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VTM48Ex480y006A00
Input Voltage (V)
Power Dissipation (W)
-40°C 25°C 100°C
T :
CASE
1
2
3
4
5
6
7
26 29 32 35 38 41 43 46 49 52 55
Case Temperature (C)
Full Load Efficiency (%)
26V 48V 55V
V :
IN
92
94
96
98
-40 -20 0 20 40 60 80 100
Load Current (A)
Efficiency (%)
V :
IN 26V 48V 55V
80
82
84
86
88
90
92
94
96
98
0 1 2 3 4 5 6 7
Load Current (A)
V :
IN 26V 48V 55V
Power Dissipation (W)
0
3
6
9
12
15
18
21
24
27
0 1 2 3 4 5 6 7
Figure 1 — No load power dissipation vs. Vin Figure 2 — Full load efficiency vs. temperature
Figure 3 — Efficiency at –40°C Figure 4 — Power dissipation at –40°C
Application Characteristics
The following values, typical of an application environment, are collected at TC = 25ºC unless otherwise noted. See associated figures for general trend data.
Attribute Symbol Conditions / Notes Typ Unit
Powertrain
No Load Power Dissipation PNL VIN = 48V, PC enabled 3.2 W
Efficiency (Ambient) ηAMB VIN = 48V, IOUT = 6.3A 96.0 %
Efficiency (Hot) ηHOT VIN = 48V, IOUT = 6.3A, TC = 100ºC 95.6 %
Output Resistance (Cold) ROUT_COLD VIN = 48V, IOUT = 6.3A, TC = –40ºC 172.6 mΩ
Output Resistance (Ambient) ROUT_AMB VIN = 48V, IOUT = 6.3A 241.1 mΩ
Output Resistance (Hot) ROUT_HOT VIN = 48V, IOUT = 6.3A, TC = 100ºC 282.0 mΩ
Output Voltage Ripple VOUT_PP COUT = 0F, IOUT = 6.3A, VIN = 48V, 20MHz BW 257 mV
VOUT Transient (Positive) VOUT_TRAN+ IOUT_STEP = 0 – 6.3A, VIN = 48V, ISLEW = 19A/µs 2300 mV
VOUT Transient (Negative) VOUT_TRAN– IOUT_STEP = 6.3 – 0A, VIN = 48V, ISLEW = 85A/µs 2300 mV
VTM™ Current Multiplier Rev 1.5
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VTM48Ex480y006A00
Load Current (A)
26V 48V 55V
V :
IN
VRipple (mVPK-PK)
25
75
125
175
225
275
325
375
0 1 2 3 4 5 6 7
Figure 10 — Vripple vs. Iout; No external Cout. Board mounted
module, scope setting: 20MHz analog BW
Load Current (A)
V :
IN 26V 48V 55V
Efficiency (%)
80
82
84
86
88
90
92
94
96
98
0 1 2 3 4 5 6 7
Load Current (A)
V :
IN 26V 48V 55V
Power Dissipation (W)
0
3
6
9
12
15
18
21
24
27
0 1 2 3 4 5 6 7
R
OUT
(m
W)
Case Temperature (C)
Full Load
100
125
150
175
200
225
250
275
300
-40 -20 0 20 40 60 80 100
Figure 7 — Efficiency at 100°C Figure 8 — Power dissipation at 100°C
Figure 9 — Rout vs. temperature
Load Current (A)
Efficiency (%)
V :
IN 26V 48V 55V
80
82
84
86
88
90
92
94
96
98
0 1 2 3 4 5 6 7
Load Current (A)
V :
IN 26V 48V 55V
Power Dissipation (W)
0
3
6
9
12
15
18
21
24
27
0 1 2 3 4 5 6 7
Figure 5 — Efficiency at 25°C Figure 6 — Power dissipation at 25°C
Application Characteristics
The following values, typical of an application environment, are collected at TC = 25ºC unless otherwise noted. See associated figures for general trend data.
VTM™ Current Multiplier Rev 1.5
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VTM48Ex480y006A00
Figure 13 — Start up from application of Vin;
VC pre-applied Cout = 100µF
Output Voltage (V)
Output Current (A)
0
1
2
3
4
5
6
7
8
9
0 10 20 30 40 50 60
Continuous
10ms Max
Figure 11 — Safe operating area Figure 12 — Full load ripple, 100µF Cin; No external Cout. Board
mounted module, scope setting: 20MHz analog BW
Figure 16 — Full load – 0A transient response:
Cin = 100µF, no external Cout
Figure 15 — 0A – Full load transient response:
Cin = 100µF, no external Cout
Figure 14 — Start up from application of VC;
Vin pre-applied Cout = 100µF
Application Characteristics
The following values, typical of an application environment, are collected at TC = 25ºC unless otherwise noted. See associated figures for general trend data.
VTM™ Current Multiplier Rev 1.5
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VTM48Ex480y006A00
General Characteristics
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40ºC < TJ < 125 ºC (T-Grade). All Other specifications are at TJ = 25°C unless otherwise noted.
Attribute Symbol Conditions / Notes Min Typ Max Unit
Mechanical
Length L 32.25 [1.270] 32.5 [1.280] 32.75 [1.289] mm [in]
Width W 21.75 [0.856] 22.0 [0.866] 22.25 [0.876] mm [in]
Height H 6.48 [0.255] 6.73 [0.265] 6.98 [0.275] mm [in]
Volume Vol No heat sink 4.81 [0.294] cm3 [in3]
Weight W 15.0 [0.53] g [oz]
Lead Finish
Nickel 0.51 2.03
µmPalladium 0.02 0.15
Gold 0.003 0.051
Thermal
Operating Temperature TJ
VTM48EF480T006A00 (T-Grade) –40 125
°C
VTM48EF480M006A00 (M-Grade) –55 125
VTM48ET480T006A00 (T-Grade) –40 125
VTM48ET480M006A00 (M-Grade) –55 125
Thermal Resistance θJC
Isothermal heat sink and isothermal
internal PCB 1 °C / W
Thermal Capacity 5 Ws / °C
Assembly
Peak Compressive Force
Applied to Case (Z-Axis) Supported by J-Lead only 6 lbs
5.41 lbs / in2
Storage Temperature TST
VTM48EF480T006A00 (T-Grade) –40 125
°C
VTM48EF480M006A00 (M-Grade) –65 125
VTM48ET480T006A00 (T-Grade) –40 125
VTM48ET480M006A00 (M-Grade) –65 125
ESD Withstand
ESDHBM Human Body Model,
JEDEC JESD 22-A114-F 1000
VDC
ESDCDM Charge Device Model,
JEDEC JESD 22-C101-D 400
Soldering
Peak Temperature During Reflow MSL 4 (Datecode 1528 and later) 245 °C
Peak Time Above 217°C 60 90 s
Peak Heating Rate During Reflow 1.5 3 °C / s
Peak Cooling Rate Post Reflow 1.5 6 °C / s
Safety
Isolation Voltage (Hipot) VHIPOT 2250 VDC
Isolation Capacitance CIN_OUT Unpowered unit 2500 3200 3800 pF
Isolation Resistance RIN_OUT 10 MΩ
MTBF
MIL-HDBK-217 Plus Parts Count;
25ºC Ground Benign, Stationary,
Indoors / Computer Profile
3.8 MHrs
Telcordia Issue 2 - Method I Case 1;
Ground Benign, Controlled 5.6 MHrs
Agency Approvals / Standards cTÜVus
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
VTM™ Current Multiplier Rev 1.5
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VTM48Ex480y006A00
Using the Control Signals VC, PC, TM
The VTM Control (VC) pin is an input pin which powers the
internal VCC circuitry when within the specified voltage range of
11.5 – 16.5V. This voltage is required for VTM current multiplier
start up and must be applied as long as the input is below 26V. In
order to ensure a proper start, the slew rate of the applied voltage
must be within the specified range.
Some additional notes on the using the VC pin:
In most applications, the VTM module will be powered by an
upstream PRM™ regulator which provides a 10ms VC pulse
during start up. In these applications the VC pins of the PRM
regulator and VTM current multiplier should be tied together.
The VC voltage can be applied indefinitely allowing for
continuous operation down to 0VIN.
The fault response of the VTM module is latching. A
positive edge on VC is required in order to restart the unit. If VC
is continuously applied the PC pin may be toggled to restart the
VTM module.
Primary Control (PC) pin can be used to accomplish the
following functions:
Delayed start: Upon the application of VC, the PC pin will
source a constant 100µA current to the internal RC network.
Adding an external capacitor will allow further delay in reaching
the 2.5V threshold for module start.
Auxiliary voltage source: Once enabled in regular operational
conditions (no fault), each VTM PC provides a regulated 5V,
2mA voltage source.
Output disable: PC pin can be actively pulled down in order
to disable the module. Pull-down impedance shall be lower
than 400Ω.
Fault detection flag: The PC 5V voltage source is internally
turned off as soon as a fault is detected. It is important to notice
that PC doesn’t have current sink capability. Therefore, in an
array, PC line will not be capable of disabling neighboring
modules if a fault is detected.
Fault reset: PC may be toggled to restart the unit if VC is
continuously applied.
Temperature Monitor (TM) pin provides a voltage proportional
to the absolute temperature of the converter control IC.
It can be used to accomplish the following functions:
Monitor the control IC temperature: The temperature in
Kelvin is equal to the voltage on the TM pin scaled by 100.
(i.e., 3.0V = 300K = 27ºC). If a heat sink is applied, TM can be
used to thermally protect the system.
Fault detection flag: The TM voltage source is internally turned
off as soon as a fault is detected. For system monitoring
purposes (microcontroller interface) faults are detected on falling
edges of TM signal.
Start-Up Behavior
Depending on the sequencing of the VC with respect to the input
voltage, the behavior during start up will vary as follows:
Normal operation (VC applied prior to Vin ): In this case the
controller is active prior to ramping the input. When the input
voltage is applied, the VTM module output voltage will track
the input (See Figure 13). The inrush current is determined by
the input voltage rate of rise and output capacitance. If the VC
voltage is removed prior to the input reaching 26V, the VTM may
shut down.
Stand-alone operation (VC applied after Vin ): In this case
the VTM output will begin to rise upon the application of the VC
voltage (See Figure 14). The Adaptive Soft-Start Circuit may vary
the output rate of rise in order to limit the inrush current to its
maximum level. When starting into high capacitance or a short,
the output current will be limited for a maximum of 1200 µs.
After this period, the Adaptive Soft-Start Circuit will time out and
the VTM module may shut down. No restart will be attempted
until VC is re-applied or PC is toggled. The maximum output
capacitance is limited to 100µF in this mode of operation to
ensure a successful start.
Thermal Considerations
VI Chip® products are multi-chip modules whose temperature
distribution varies greatly for each part number as well as with the
input / output conditions, thermal management and environmental
conditions. Maintaining the top of the VTM48EF480T006A00 case
to less than 100ºC will keep all junctions within the VI Chip module
below 125ºC for most applications.
The percent of total heat dissipated through the top surface
versus through the J-lead is entirely dependent on the particular
mechanical and thermal environment. The heat dissipated through
the top surface is typically 60%. The heat dissipated through
the J-lead onto the PCB board surface is typically 40%. Use
100% top surface dissipation when designing for a conservative
cooling solution.
It is not recommended to use a VI Chip module for an extended
period of time at full load without proper heat sinking.
VTM™ Current Multiplier Rev 1.5
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VTM48Ex480y006A00
At no load:
K represents the “turns ratio” of the SAC.
Rearranging Equation 1:
In the presence of load, VOUT is represented by:
and IOUT is represented by:
ROUT represents the impedance of the SAC, and is a function of the
RDSON of the input and output MOSFETs and the winding resistance
of the power transformer. IQ represents the quiescent current of the
SAC control and gate drive circuitry.
The use of DC voltage transformation provides additional
interesting attributes. Assuming that ROUT = 0Ω and IQ = 0A,
Equation 3 now becomes Equation 1 and is essentially load
independent, resistor R is now placed in series with VIN as
shown in Figure 18.
The relationship between VIN and VOUT becomes:
Substituting the simplified version of Equation 4
(IQ is assumed = 0A) into Equation 5 yields:
Sine Amplitude Converter™ Point-of-Load Conversion
The Sine Amplitude Converter (SAC) uses a high-frequency
resonant tank to move energy from input to output. (The resonant
tank is formed by Cr and leakage inductance Lr in the power
transformer windings.) The resonant LC tank, operated at high
frequency, is amplitude modulated as a function of input voltage
and output current. A small amount of capacitance embedded
in the input and output stages of the module is sufficient for full
functionality and is key to achieving power density.
The VTM48EF480T006A00 SAC can be simplified into the
following model:
Figure 18 — K = 1/32 Sine Amplitude Converter™
with series input resistor
Figure 17 — VI Chip® module AC model
+
–
+
–
VOUT
COUT
VIN
V•I
K
+
–
+
–
CIN
IOUT
RCOUT
IQ
ROUT
RCIN
IQ
71mA
1 • IOUT
RCIN
0.57mΩ
17000pH
0.5ΩRCOUT
850µΩ
LOUT = 600pH
LIN = 5.8nH IOUT
ROUT
176.0mΩ
VIN VOUT
COUT
3.5µF
CIN
2µF
1 • VIN
RIN
SAC™
K = 1/32
VIN
VOUT
+
–
V
OUT
= V
IN
• K(1)
K =
V
OUT
VIN
(2)
V
OUT
= V
IN
• K – I
OUT
• R
OUT
(3)
IOUT =
I
IN
– I
Q
K(4)
V
OUT
= (V
IN
– I
IN
• R) • K(5)
V
OUT
= V
IN
• K – I
OUT
• R • K
2
(6)
VTM™ Current Multiplier Rev 1.5
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VTM48Ex480y006A00
This is similar in form to Equation 3, where ROUT is used to
represent the characteristic impedance of the SAC™. However, in
this case a real R on the input side of the SAC is effectively scaled
by K2 with respect to the output.
Assuming that R = 1Ω, the effective R as seen from the secondary
side is 0.98mΩ, with K = 1/32 as shown in Figure 18.
A similar exercise should be performed with the additon of a
capacitor or shunt impedance at the input to the SAC. A switch in
series with VIN is added to the circuit. This is depicted in Figure 19.
A change in VIN with the switch closed would result in a change in
capacitor current according to the following equation:
Assume that with the capacitor charged to VIN, the switch is
opened and the capacitor is discharged through the idealized
SAC. In this case,
Substituting Equations 1 and 8 into Equation 7 reveals:
The equation in terms of the output has yielded a K2 scaling factor
for C, specified in the denominator of the equation. A K factor less
than unity results in an effectively larger capacitance on the output
when expressed in terms of the input. With a K = 1/32 as shown
in Figure 19, C = 1µF would appear as C = 1024µF when viewed
from the output.
Low impedance is a key requirement for powering a high-current,
low-voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a SAC
between the regulation stage and the point-of-load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, the benefits are
not useful if the series impedance of the SAC is too high. The
impedance of the SAC must be low, i.e., well beyond the crossover
frequency of the system.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low-loss core
material at high frequencies also reduces core losses.
The two main terms of power loss in the VTM module are:
No load power dissipation (PNL): defined as the power used to
power up the module with an enabled powertrain at no load.
Resistive loss (ROUT): refers to the power loss across the VTM
modeled as pure resistive impedance.
Therefore,
The above relations can be combined to calculate the overall
module efficiency:
C
S
SAC™
K = 1/32
VIN
VOUT
+
–
Figure 19 — Sine Amplitude Converter™ with input capacitor
IC (t) = C
dV
IN
dt (7)
I
C
= I
OUT
• K(8)
IOUT = (9)
C
K
2
dV
OUT
dt
•
P
DISSIPATED
= P
NL
+ P
ROUT
(10)
P
OUT
= P
IN
– P
DISSIPATED
= P
IN
– P
NL
– P
ROUT
(11)
P
OUT
PIN
P
IN
– P
NL
– P
ROUT
PIN
VIN • IIN – PNL – (IOUT)2 • ROUT
VIN • IIN
PNL + (IOUT)2 • ROUT
VIN • IIN
= 1 –
η =
=
=(
12)
()
VTM™ Current Multiplier Rev 1.5
Page 14 of 19 03/2019
VTM48Ex480y006A00
Input and Output Filter Design
A major advantage of a SAC system versus a conventional PWM
converter is that the former does not require large functional
filters. The resonant LC tank, operated at extreme high frequency,
is amplitude modulated as a function of input voltage and output
current and efficiently transfers charge through the isolation
transformer. A small amount of capacitance embedded in the input
and output stages of the module is sufficient for full functionality
and is key to achieving high power density.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
Guarantee low source impedance:
To take full advantage of the VTM module dynamic response,
the impedance presented to its input terminals must be low
from DC to approximately 5MHz. Input capacitance may be
added to improve transient performance or compensate for high
source impedance.
Further reduce input and/or output voltage ripple
without sacrificing dynamic response:
Given the wide bandwidth of the VTM module, the source
response is generally the limiting factor in the overall system
response. Anomalies in the response of the source will appear at
the output of the VTM module multiplied by its K factor.
Protect the module from overvoltage transients
imposed by the system that would exceed maximum
ratings and cause failures:
The VI Chip® module input/output voltage ranges must not be
exceeded. An internal overvoltage lockout function prevents
operation outside of the normal operating input range. Even
during this condition, the powertrain is exposed to the applied
voltage and power MOSFETs must withstand it.
Capacitive Filtering Considerations
for a Sine Amplitude Converter™
It is important to consider the impact of adding input and output
capacitance to a Sine Amplitude Converter on the system as a
whole. Both the capacitance value and the effective impedance of
the capacitor must be considered.
A Sine Amplitude Converter has a DC ROUT value which has
already been discussed on Page 12. The AC ROUT of the SAC
contains several terms:
Resonant tank impedance
Input lead inductance and internal capacitance
Output lead inductance and internal capacitance
The values of these terms are shown in the behavioral model on
Page 12. It is important to note on which side of the transformer
these impedances appear and how they reflect across the
transformer given the K factor.
The overall AC impedance varies from model to model. For most
models it is dominated by DC ROUT value from DC to beyond
500kHz. The behavioral model on Page 12 should be used to
approximate the AC impedance of the specific model.
Any capacitors placed at the output of the VTM module reflect
back to the input of the module by the square of the K factor
(Equation 9) with the impedance of the module appearing in series.
It is very important to keep this in mind when using a PRM™
regulator to power the VTM module. Most PRM modules have a
limit on the maximum amount of capacitance that can be applied
to the output. This capacitance includes both the PRM output
capacitance and the VTM module output capacitance reflected
back to the input. In PRM module remote-sense applications,
it is important to consider the reflected value of VTM module
output capacitance when designing and compensating the PRM
module control loop.
Capacitance placed at the input of the VTM module appear to
the load reflected by the K factor with the impedance of the VTM
module in series. In step-down ratios, the effective capacitance
is increased by the K factor. The effective ESR of the capacitor is
decreased by the square of the K factor, but the impedance of the
module appears in series. Still, in most step-down VTM modules
an electrolytic capacitor placed at the input of the module will
have a lower effective impedance compared to an electrolytic
capacitor placed at the output. This is important to consider when
placing capacitors at the output of the module. Even though the
capacitor may be placed at the output, the majority of the AC
current will be sourced from the lower impedance, which in most
cases will be the module. This should be studied carefully in any
system design using a module. In most cases, it should be clear that
electrolytic output capacitors are not necessary to design a stable,
well-bypassed system.
VTM™ Current Multiplier Rev 1.5
Page 15 of 19 03/2019
VTM48Ex480y006A00
Current Sharing
The SAC™ topology bases its performance on efficient transfer
of energy through a transformer without the need of closed
loop control. For this reason, the transfer characteristic can be
approximated by an ideal transformer with some resistive drop and
positive temperature coefficient.
This type of characteristic is close to the impedance characteristic
of a DC power distribution system, both in behavior (AC dynamic)
and absolute value (DC dynamic).
When connected in an array with the same K factor, the VTM
module will inherently share the load current (typically 5%) with
parallel units according to the equivalent impedance divider that
the system implements from the power source to the point of load.
Some general recommendations to achieve matched
array impedances:
Dedicate common copper planes within the PCB to deliver and
return the current to the modules.
Provide the PCB layout as symmetric as possible.
Apply same input / output filters (if present) to each unit.
For further details see:
AN:016 Using BCM® Bus Converters in High Power Arrays.
Fuse Selection
In order to provide flexibility in configuring power systems
VI Chip® products are not internally fused. Input line fusing
of VI Chip products is recommended at system level to provide
thermal protection in case of catastrophic failure.
The fuse shall be selected by closely matching system
requirements with the following characteristics:
Current rating
(usually greater than maximum current of VTM module)
Maximum voltage rating
(usually greater than the maximum possible input voltage)
Ambient temperature
Nominal melting I2t
Reverse Operation
The VTM48EF480T006A00 is capable of reverse operation. If
a voltage is present at the output which satisfies the condition
VOUT > VIN • K at the time the VC voltage is applied, or after the
unit has started, then energy will be transferred from secondary
to primary. The input-to-output ratio will be maintained. The
VTM48EF480T006A00 will continue to operate in reverse as
long as the input and output are within the specified limits. The
VTM48EF480T006A00 has not been qualified for continuous
operation (>10ms) in the reverse direction.
VIN VOUT
+
–DC
ZIN_EQ1
ZIN_EQ2
ZOUT_EQ1
ZOUT_EQ2
Load
VTM1
RO_1
VTM2
RO_2
VTMn
RO_n
ZOUT_EQn
ZIN_EQn
Figure 20 — VTM module array
VTM™ Current Multiplier Rev 1.5
Page 16 of 19 03/2019
VTM48Ex480y006A00
inch
mm
NOTES:
.
DIMENSIONS ARE .
2.
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3.
PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
4
inch
mm .
DIMENSIONS ARE .
2.
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3.
PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
4
inch
mm
NOTES:
.
DIMENSIONS ARE .
2.
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3.
PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
4
inch
mm .
DIMENSIONS ARE .
2.
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3.
PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
4
J-Lead Package Recommended Land Pattern
J-Lead Package Mechanical Drawing
mm [inch]
VTM™ Current Multiplier Rev 1.5
Page 17 of 19 03/2019
VTM48Ex480y006A00
inch
mm
NOTES:
.
DIMENSIONS ARE .
2.
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3.
PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
4
inch
mm .
DIMENSIONS ARE .
2.
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3.
PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
4
inch
mm
NOTES:
.
DIMENSIONS ARE .
2.
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3.
PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
4
inch
mm .
DIMENSIONS ARE .
2.
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3.
PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
4
Through-Hole Package Recommended Land Pattern
Through-Hole Package Mechanical Drawing
mm [inch]
VTM™ Current Multiplier Rev 1.5
Page 18 of 19 03/2019
VTM48Ex480y006A00
Notes:
1. Maintain 3.50 [0.138] Dia. keep-out zone
free of copper, all PCB layers.
2. (A) Minimum recommended pitch is 39.50 (1.555).
This provides 7.00 [0.275] component
edge-to-edge spacing, and 0.50 [0.020]
clearance between Vicor heat sinks.
(B) Minimum recommended pitch is 41.00 [1.614].
This provides 8.50 [0.334] component
edge-to-edge spacing, and 2.00 [0.079]
clearance between Vicor heat sinks.
3. VI Chip® module land pattern shown for reference
only; actual land pattern may differ.
Dimensions from edges of land pattern
to push–pin holes will be the same for
all full-size VI Chip® products.
4. RoHS compliant per CST–0001 latest revision.
(NO GROUNDING CLIPS) (WITH GROUNDING CLIPS)
5. Unless otherwise specified:
Dimensions are mm [inches]
tolerances are:
x.x (x.xx) = ±0.3 [0.01]
x.xx (x.xxx) = ±0.13 [0.005]
6. Plated through holes for grounding clips (33855)
shown for reference, heat sink orientation and
device pitch will dictate final grounding solution.
Recommended Heat Sink Push Pin Location
PC
VC
TM
–OUT
–OUT
+OUT
+OUT +IN
–IN
Bottom View
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
4 3 2 1
A
B
C
D
E
H
J
K
L
M
N
P
R
T
VTM Module Pin Configuration
Signal Name Pin Number
+IN A1-E1, A2-E2
–IN L1-T1, L2-T2
TM H1, H2
VC J1, J2
PC K1, K2
+OUT A3-D3, A4-D4, J3-M3, J4-M4
–OUT E3-H3, E4-H4, N3-T3, N4-T4
VTM™ Current Multiplier Rev 1.5
Page 19 of 19 03/2019
VTM48Ex480y006A00
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Andover, MA, USA 01810
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www.vicorpower.com
email
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Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and
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Visit http://www.vicorpower.com/dc-dc-converters-board-mount/vtm for the latest product information.
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