BA823F - ROHM Co., Ltd. - Datasheet.Live

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Serial-in / Parallel-out Driver Series

Serial-Parallel

3-input Driver

BA823F

●Description

BA823F are an 8-bit serial-to-parallel-output driver, applicable for thermal printer heads or LED character display drivers.

●Features

1) Capable of driving a maximum of 200mA.

2) Non-driving current consumption can be reduced by controlling the strobe timing pulse.

3) Output data terminal can be used for a cascade configuration.

4) Digital ground and power ground are separated.

5) TTL and CMOS allow driving.

●Applications

Driver for thermal print head

Driver for LED character display

●Absolute maximum ratings (Ta=25℃) ●Thermal derating curve

Parameter Symbol Limits Unit

Power supply voltage Vcc 7.0＊1 V

Power

dissipation BA823F Pd 500＊3 mW

Input voltage VIN MAX +0.3 to +6.0 V

Operating temperature Topr -20 to +75 ℃

Storage temperature Tstg -55 to +125 ℃

*1 Voltage of O0~O7 terminals is 34V (Max.)

*2 Reduced by 5.5 mW/C over 25C.

*3 Reduced by 5.0 mW/C over 25C.

Fig.1

125

250

375

500

625

750

875

-25 0 25 50 75 100 125 150

Ambient temperature　Ta　(℃)

Power dissipation 　Pd　(mW)

BA823

70℃

BA823F

No.09051EAT01

BA823F

Technical Note

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●Electrical characteristics (Unless otherwise specified, Ta=25℃,Vcc=+5.0V)

Parameter Symbol Min. Typ. Max. Unit Conditions Test Circuit

Power supply VCC 4.5 5.0 5.5 V VCC terminal Fig.2

Current dissipation(no load)1 IO1 - 4 6 mA @All outputs = “0” Fig.2

Current dissipation(no load)2 IO2 - 8 11 mA @All outputs = “0” Fig.2

Input low level voltage VIL - - 0.8 V - Fig.2

Input high level voltage VIH 2 - - V - Fig.2

Input low level current IIL - - 0.4 mA VIN=4.5V Fig.2

Input high level current IIH - - 100 μA VIN=2.0V Fig.3

Maximum output voltage VO OFF - - 21.8 V Ō 0 to Ō 7, Io=10μA Fig.3

Output saturation voltage VO ON - 0.8 1.3 V @Io=100mA sink Fig.3

Output current IOL - - 207 mA External voltage = 11.8V Fig.3

“H” output voltage VDOH 2.4 - - V RL=10kΩ Fig.3

“L” output voltage VDOL - - 0.8 V - Fig.3

Minimum set up time t1 - - 300 ns VIH=2.0V,VIL=0.8V -

Minimum shift clock width T2 - - 1 μs VIH=2.0V,VIL=0.8V -

Minimum timing pulse width T3 - - 1 μs VIH=2.0V,VIL=0.8V -

Maximum transfer time fMax 500 - - kHz VIH=2.0V,VIL=0.8V -

●Usage conditions range

Fig.2 Power supply voltage and

current usage conditions

Fig.2: Conditions to use supply voltage and output current (per circuit)

Maximum conditions of use in the diagram to the left, show the

absolute maximum supply voltage and IC output current.

This product should not exceed the usage conditions range.

0 10 20

100

200

SUPPLY VOLTAGE : Vcc (V)

OUTPUT CURRENT : IOUT (mA)

Max usage conditions

Usage condition

ran

BA823F

Technical Note

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●Block diagram

●Pin descriptions

Pin No. Pin Name Symbol Function

2 SHIFT PULSE C Shift pulse of shift register

15 DATA INPUT D1 Data input of shift register is stored during the shift pulse rise time.

1 STROBE S When “1” is effective, the content of shift register is outputted.

12 OUTPUT Ō 0 “0” is effective when the content of register is “1” on the 1st bit is outputted.

11 OUTPUT Ō 1 “0” is effective when the content of register is “1” on the 2nd bit is outputted.

10 OUTPUT Ō 2 “0” is effective when the content of register is “1” on the 3rd bit is outputted.

9 OUTPUT Ō 3 “0” is effective when the content of register is “1” on the 4th bit is outputted.

8 OUTPUT Ō 4 “0” is effective when the content of register is “1” on the 5th bit is outputted.

7 OUTPUT Ō 5 “0” is effective when the content of register is “1” on the 6tht bit is outputted.

6 OUTPUT Ō 6 “0” is effective when the content of register is “1” on the 7tht bit is outputted.

5 OUTPUT Ō7 “0” is effective when the content of register is “1” on the 8th bit is outputted.

3 DATA OUTPUT Do Data having passed through the output circuit of Ō7 becomes the input of the next stage

16 VCC VCC 5.0V .is used normally (±10%)

13 GND GND1 Especially, GND of the output circuit of Ō 0~ Ō 3

4 GND GND2 Especially, GND of the output circuit of Ō 4~ Ō7

14 GND GND(Dig) Especially, GND of the logic circuit

●Description of operation

BA823 is configured internally as shown in the block diagram. Terminals of clock C, data D1, and strobe S are used as input.

Data input is synchronized with the clock, read serially during the rise time and latched at the rise time edge of the shifted

shift register. The content of the set shift register appears on the output terminal of Ō0~ Ō7 when the strobe is input, as

shown in the time chart of Fig.5. Pulse width is the same as that of the strobe input pulse.

Data output terminal D0, is a terminal used for cascade connection of the IC, where the output of the final stage of the shift

register has appeared, and is connected to the next data input terminal D1. In this case, when the clock and the strobe are

used in conjunction, output terminal can be increased by 8 bits at a time.

12 11 10 987 6 5

DATA OUTPUT DO

GND1

GND2

GND

(Dig)

VCC

STROBE INPUT S

DATA INPUT D4

SHIFT PULSE C

Ō 0 Ō 1 Ō 2 Ō 3 Ō 4 Ō 5 Ō 6 Ō 7

BA823F

Technical Note

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●Measurement circuits

Item SW1 SW2

ICC 1 1

IIH 2 1～3

Fig.3 Icc 1st measurement circuit

Item SW1 SW2 SW3

VO ON 1 1～8 1

IOL 1 1～8 1

VO OFF 2 1～8 2

IO = 10μA when VO OFF is measured

VA = 30V when IO ON is measured

Fig.4 Vo ON, Vo OFF, IOL measurement circuit

●Input conditions

Fig.5

Data should be left “0”.

Vcc=5.0V

VIN=4.5V

SW2

SW1

After 8 pulses have elapsed.

BA823F

VCC=5.0V

2 SW1

SW2

SW3

82Ω

100mA

BA823F

After 8 pulses have elapsed.

t1t2

Data input

Shift pulse

Print pulse

BA823F

Technical Note

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●Timing chart

Fig.6

●Application example

Fig.7

Example: Print head using the strobe function Use for thermal printer (when the timing is 1 phase) example

Disabling the high current while the heating

element is switched off is advantageous.

Clock input C

DATA in

ut D1

Strobe in

ut S

DATA output DO

Ō0

Ō 1

Ō 2

Ō 3

Ō 4

Ō 5

Ō 6

Ō 7

BA823F

VCC

GND1

GND2

Ō0

Ō1

Ō2

Ō3

Ō4

Ō5

Ō6

Ō7

DATA signal

Shift pulse

Power supply 5V

Print pulse

10V

BA823F

VCC

GND1

GND2

BA823F

VCC

GND1

GND2

Ō0

Ō1

Ō2

Ō3

Ō4

Ō5

Ō6

Ō7

Ō0

Ō1

Ō2

Ō3

Ō4

Ō5

Ō6

Ō7

BA823F

Technical Note

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●Interfaces

(a) Input (b) Output

Fig.8

●Thermal derating curve

At repetition frequency 1Hz or higher

Fig.9 Output conditions

10kΩ

1,2,15pin

20kΩ

100Ω

10kΩ

5kΩ

VCC

200Ω

500Ω

3pin

0 20 40 60 80 100

OUTPUT DUTY CYCLE(ALL BIT “ON”)(%)

120

160

200

MAXIMUM OUTPUT CURENT : low(mA)

13% 30%

48mA

42mA

22mA

18mA

BA823

Ta=2 5℃

34%

BA823F

Ta= 75℃

15%

1.0kΩ

5.5kΩ

VCC

5,6,7,8,9,10,11,12pin

12kΩ

BA823F

Technical Note

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●Notes for use

1. Absolute maximum ratings

An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can

break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit.

If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices,

such as fuses.

2. Connecting the power supply connector backward

Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply

lines. An external direction diode can be added.

3. Power supply lines

Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line,

separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals

to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the

circuit, not that capacitance characteristic values are reduced at low temperatures.

4. GND voltage

The potential of GND pin must be minimum potential in all operating conditions.

5. Inter-pin shorts and mounting errors

Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any

connection error or if pins are shorted together.

6. Actions in strong electromagnetic field

Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to

malfunction.

7. Testing on application boards

When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.

Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or

removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic

measure. Use similar precaution when transporting or storing the IC.

8. Regarding input pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.

P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode

or transistor. For example, the relation between each potential is as follows:

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes

operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.

9. Ground Wiring Pattern

When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,

placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage

variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the

GND wiring pattern of any external components, either.

Resistor Transistor (NPN)

N N P+ P

P substrate

GND

Parasitic element

Pin A

N P+ P+

P substrate

GND

Parasitic element

Pin B C B

GND

Pin A

aras

iti

element

Pin B

Other adjacent elements

B C

GND

aras

iti

element

Fig.10 Example of IC structure

BA823F

Technical Note

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www.rohm.com 2009.06 - Rev.A

●Ordering part number

B D 8 2 3 F - E 2

Part No. Part No.

Package

F: SOP16

Packaging and forming specification

E2: Embossed tape and reel

(Unit : mm)

SOP16

0.1

1.27

0.11

0.3MIN

10±0.2

0.15±0.1

0.4±0.1

1.5±0.1 6.2±0.3

4.4±0.2

(MAX 10.35 include BURR)

∗

Order quantity needs to be multiple of the minimum quantity.

Embossed carrier tapeTape

Quantity

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

2500pcs

()

Direction of feed

Reel 1pin

R0039

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