Data Sheet No. PD60252 revA IRS2184/IRS21844(S)PbF HALF-BRIDGE DRIVER Features * * * * * * * * * * * Floating channel designed for bootstrap operation Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V to 20 V Undervoltage lockout for both channels 3.3 V and 5 V input logic compatible Matched propagation delay for both channels Logic and power ground +/- 5 V offset Lower di/dt gate driver for better noise immunity Output source/sink current capability 1.4 A/1.8 A RoHS compliant Packages 8-Lead PDIP IRS2184 14-Lead PDIP IRS21844 14-Lead SOIC IRS21844S 8-Lead SOIC IRS2184S Description The IRS2184/IRS21844 are high voltage, high speed power MOSFET and Feature Comparison CrossIGBT drivers with dependent high- and ton/toff Deadtime Input conduction Ground Pins Part low-side referenced output channels. logic prevention (ns) (ns) logic Proprietary HVIC and latch immune 2181 COM HIN/LIN no none 180/220 CMOS technologies enable ruggedized 21814 VSS/COM monolithic construction. The logic in2183 Internal 400 COM HIN/LIN yes 180/220 21834 Program 400-5000 VSS/COM put is compatible with standard CMOS 2184 Internal 400 COM IN/SD yes 680/270 or LSTTL output, down to 3.3 V logic. The 21844 Program 400-5000 VSS/COM output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. Typical Connection up to 600 V VCC VCC VB IN IN HO SD SD VS COM LO TO LOAD up to 600 V IRS2184 (Refer to Lead Assignments for correct configuration).These diagrams show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. HO VCC VCC VB IN IN VS SD SD IRS21844 TO LOAD DT VSS RDT VSS COM LO www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 1 IRS2184/IRS21844(S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. VB High-side floating absolute voltage -0.3 620 (Note 1) VS High-side floating supply offset voltage VB - 20 VB + 0.3 VHO High-side floating output voltage VS - 0.3 VB + 0.3 VCC Low-side and logic fixed supply voltage -0.3 20 (Note 1) VLO Low-side output voltage -0.3 VCC + 0.3 DT Programmable dead-time pin voltage (IRS21844 only) VSS - 0.3 VCC + 0.3 VIN Logic input voltage (IN & SD) VSS - 0.3 VCC + 0.3 VSS Logic ground (IRS21844 only) VCC - 20 VCC + 0.3 dVS/dt PD RthJA Allowable offset supply voltage transient Package power dissipation @ TA +25 C Thermal resistance, junction to ambient -- 50 (8-lead PDIP) -- 1.0 (8-lead SOIC) -- 0.625 (14-lead PDIP) -- 1.6 (14-lead SOIC) -- 1.0 (8-lead PDIP) -- 125 (8-lead SOIC) -- 200 (14-lead PDIP) -- 75 (14-lead SOIC) -- 120 TJ Junction temperature -- 150 TS Storage temperature -50 150 TL Lead temperature (soldering, 10 seconds) -- 300 Units V V/ns W C/W C Note 1: All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply. www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 2 IRS2184/IRS21844(S)PbF Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at a 15 V differential. Symbol Definition VB High-side floating supply absolute voltage VS High-side floating supply offset voltage VSt Transient high-side floating supply offset voltage VHO Min. Max. VS + 10 VS + 20 COM -8 (Note 2) 600 -50 (Note 3) 600 High-side floating output voltage VS VB VCC Low-side and logic fixed supply voltage 10 20 VLO Low-side output voltage 0 VCC VIN Logic input voltage (IN & SD) VSS VCC VCC DT Programmable deadtime pin voltage (IRS21844 only) VSS VSS Logic ground (IRS21844 only) -5 5 TA Ambient temperature -40 125 Units V C Note 2: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip DT97-3 for more details). Note 3: Operational for transient negative VS of COM - 50 V with a 50 ns pulse width. Guaranteed by design. Refer to the Application Information section of this datasheet for more details. Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15 V, VSS = COM, CL = 1000 pF, TA = 25 C, DT = VSS unless otherwise specified. Symbol Definition Min. Typ. Max. Units Test Conditions ton Turn-on propagation delay -- 680 900 VS = 0 V toff Turn-off propagation delay -- 270 400 VS = 0 V or 600 V tsd Shut-down propagation delay -- 180 270 MTon Delay matching, HS & LS turn-on -- 0 90 MToff Delay matching, HS & LS turn-off -- 0 40 tr Turn-on rise time -- 40 60 tf Turn-off fall time -- 20 35 280 400 520 4 5 6 ms -- 0 50 ns -- 0 600 DT MDT Deadtime: LO turn-off to HO turn-on(DTLO-HO) & HO turn-off to LO turn-on (DTHO-LO) Deadtime matching = DTLO - HO - DTHO-LO www.irf.com PDF created with pdfFactory trial version www.pdffactory.com ns VS = 0 V RDT= 0 W RDT = 200 kW RDT=0 W RDT = 200 kW 3 IRS2184/IRS21844(S)PbF Static Electrical Characteristics VBIAS (VCC , VBS) = 15 V, VSS = COM, DT= V SS and TA = 25 C unless otherwise specified. The VIL, VIH, and IIN parameters are referenced to VSS /COM and are applicable to the respective input leads: IN and SD. The VO, IO, and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol VIH VIL Definition Logic "1" input voltage for HO & logic "0" for LO Min. Typ. Max. Units Test Conditions 2.5 -- -- Logic "0" input voltage for HO & logic "1" for LO -- -- 0.8 VSD,TH+ SD input positive going threshold 2.5 -- -- VSD,TH- SD input negative going threshold -- -- 0.8 VOH High level output voltage, VBIAS - VO -- -- 1.4 IO = 0 A VOL Low level output voltage, VO -- -- 0.2 IO = 20 mA ILK Offset supply leakage current -- -- 50 IQBS Quiescent VBS supply current 20 60 150 IQCC Quiescent VCC supply current 0.4 1.0 1.6 IIN+ Logic "1" input bias current -- 25 60 IIN- Logic "0" input bias current -- -- 5.0 8.0 8.9 9.8 7.4 8.2 9.0 Hysteresis 0.3 0.7 -- IO+ Output high short circuit pulsed current 1.4 1.9 -- IO- Output low short circuit pulsed current 1.8 2.3 -- VCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH VCC and VBS supply undervoltage positive going threshold VCC and VBS supply undervoltage negative going threshold VCC = 10 V to 20 V V A mA A VB = VS = 600 V VIN = 0 V or 5 V IN = 5 V, SD = 0 V IN = 0 V, SD = 5 V V www.irf.com PDF created with pdfFactory trial version www.pdffactory.com VO = 0 V, A PW 10 s VO = 15 V, PW 10 s 4 IRS2184/IRS21844(S)PbF Functional Block Diagrams VB 2184 UV DETECT HO R VSS/COM LEVEL SHIFT IN HV LEVEL SHIFTER R PULSE FILTER Q S VS PULSE GENERATOR VCC DEADTIME UV DETECT +5V VSS/COM LEVEL SHIFT SD LO DELAY COM VB 21844 UV DETECT HO R VSS/COM LEVEL SHIFT IN HV LEVEL SHIFTER R PULSE FILTER S VS PULSE GENERATOR VCC DEADTIME DT UV DETECT +5V SD Q VSS/COM LEVEL SHIFT LO DELAY COM VSS www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 5 IRS2184/IRS21844(S)PbF Lead Definitions Symbol Description IN Logic input for high-side and low-side gate driver outputs (HO and LO), in phase with HO (referenced to COM for IRS2184 and VSS for IRS21844) SD DT Logic input for shutdown (referenced to COM for IRS2184 and VSS for IRS21844) VSS Logic ground (IRS21844 only) VB High-side floating supply HO High-side gate drive output VS High-side floating supply return VCC Low-side and logic fixed supply LO Low-side gate drive output COM Low-side return Programmable deadtime lead, referenced to VSS. (IRS21844 only) Lead Assignments IN VB 2 SD HO 7 3 COM VS 6 4 LO VCC 5 1 8 IN VB 8 2 SD HO 7 3 COM VS 6 4 LO VCC 5 1 8-Lead PDIP 8-Lead SOIC IRS2184PbF IRS2184SPbF 14 1 IN 2 SD VB 13 2 3 VSS HO 12 4 DT VS 1 14 IN SD VB 13 3 VSS HO 12 11 4 DT VS 11 5 COM 10 5 COM 10 6 LO 9 6 LO 9 7 VCC 8 7 VCC 8 14-Lead PDIP 14-Lead SOIC IRS21844PbF IRS21844SPbF www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 6 IRS2184/IRS21844(S)PbF IN(LO) IN 50% 50% SD IN(HO) ton toff tr 90% HO LO HO LO Figure 1. Input/Output Timing Diagram tf 90% 10% 10% Figure 2. Switching Time Waveform Definitions 50% 50% IN 90% SD DT LO-HO HO 50% LO DTHO-LO 90% tsd HO LO 10% 10% 90% MDT= Figure 3. Shutdown Waveform Definitions DTLO-HO - DT HO-LO Figure 4. Deadtime Waveform Definitions IN (LO) 50% 50% IN (HO) LO HO 10% MT MT 90% LO HO Figure 5. Delay Matching Waveform Definitions www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 7 IRS2184/IRS21844(S)PbF Tolerant to Negative VS Transients A common problem in today's high-power switching converters is the transient response of the switch node's voltage as the power switches transition on and off quickly while carrying a large current. A typical half bridge circuit is shown in Figure 6; here we define the power switches and diodes of the inverter. If the high-side switch (e.g., Q1 in Figures 7 and 8) switches off, while the phase current is flowing to a load, a current commutation occurs from high-side switch (Q1) to the diode (D2) in parallel with the lowside switch of the same inverter leg. At the same instance, the voltage node VS1, swings from the positive DC bus voltage to the negative DC bus voltage. DC+ BUS Q1 D1 Input Voltage To Load VS Q2 D2 DC- BUS Figure 6: Half Bridge Circuit DC+ BUS Q1 ON DC+ BUS Q1 OFF D1 IU VS 1 VS1 IU Q2 OFF D2 DC- BUS Figure 7: Q1 conducting Q2 OFF D2 DC- BUS Figure 8: D2 conducting Also when the phase current flows from the load back to the inverter (see Figures 9 and 10), and Q4 switches on, the current commutation occurs from D3 to Q4. At the same instance, the voltage node, VS2, swings from the positive DC bus voltage to the negative DC bus voltage. www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 8 IRS2184/IRS21844(S)PbF The circuit shown in Figure 11 depicts a half bridge circuit with parasitic elements shown; Figures 12 and 13 show a simplified illustration of the commutation of the current between Q1 and D2. The parasitic inductances in the power circuit from the die bonding to the PCB tracks are lumped together in LC and LE for each switch. When the high-side switch is on, VS1 is below the DC+ voltage by the voltage drops associated with the power switch and the parasitic elements of the circuit. When the high-side power switch turns off, the load current can momentarily flow in the low-side freewheeling diode due to the inductive load connected to VS1, for instance (the load is not shown in these figures). This current flows from the DC- bus (which is connected to the COM pin of the HVIC) to the load and a negative voltage between VS1 and the DC- Bus is induced (i.e., the COM pin of the HVIC is at a higher potential than the VS pin). DC+ BUS DC+ BUS DC+ BUS + V LC1 L C1 D1 Q1 - + L E1 VLE1 VS 1 VS1 IU - V S1 D2 - VLC 2 L C2 Q2 D1 Q1 OFF Q1 ON + Q2 OFF D2 IU - Q2 OFF V D2 + - VLE 2 L E2 DC- BUS Figure 9: Parasitic Elements + DC- BUS Figure 10: Vs positive DC- BUS Figure 11: Vs negative In a typical power circuit, dV/dt is typically designed to be in the range of 1-5 V/ns. The negative VS transient voltage can exceed this range during some events such as short circuit and over-current shutdown, when di/dt is greater than in normal operation. International Rectifier's HVICs have been designed for the robustness required in many of today's demanding applications. An indication of the IRS2184(4)'s robustness can be seen in Figure 14, where there is represented the IRS2184(4) Safe Operating Area at VBS=15V based on repetitive negative VS spikes. A negative VS transient voltage falling in the grey area (outside SOA) may lead to IC permanent damage; viceversa unwanted functional anomalies or permanent damage to the IC do not appear if negative Vs transients fall inside SOA. www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 9 IRS2184/IRS21844(S)PbF Figure 12: Negative VS transient SOA for IRS2184 @ VBS=15V Even though the IRS2184(4) has been shown able to handle these large negative VS transient conditions, it is highly recommended that the circuit designer always limit the negative VS transients as much as possible by careful PCB layout and component use. www.irf.com DF created with pdfFactory trial version www.pdffactory.com 10 Turn-on Propagation Delay (ns)) SD Propagation Delay (ns)) IRS2184/IRS21844(S)PbF 500 400 300 Max. 200 Typ. 100 0 -50 -25 0 25 50 75 100 1400 1200 Max. 1000 Typ. 800 600 400 125 10 12 o Temperature ( C) 600 500 400 Max. 300 Typ. 200 0 25 50 18 20 Figure 13B. Turn-On Propagation Delay Time vs. Supply Voltage Turn-off Propagation Delay (ns)) Turn-off Propagation Delay (ns)) 700 -25 16 Supply Voltage (V) Figure 13A. Turn-On Propagation Delay Time vs. Temperature 100 -50 14 75 100 125 700 600 500 Max. 400 Typ. 300 200 100 10 Temperature (oC) Figure 14A. Turn-Off Propagation Delay Time vs. Temperature 12 14 16 18 20 Supply Voltage (V) Figure 14B. Turn-Off Propagation Delay Time vs. Supply Voltage www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 11 IRS2184/IRS21844(S)PbF 500 SD Propagation Delay (ns) SD Propagation Delay (ns) 500 400 300 Max. 200 Typ. 100 0 400 Max. 300 Typ. 200 100 0 -50 -25 0 25 50 75 100 125 10 12 Temperature ( C) Figure 15A. SD Propagation Delay vs. Temperature Turn-On Rise Time (ns) Turn-On Rise Time (ns) 18 20 120 100 80 60 20 16 Figure 15B. SD Propagation Delay vs. Supply Voltage 120 40 14 Supply Voltage (V) o Max Typ. 0 -50 -25 0 25 50 75 100 125 100 Max. 80 60 Typ. 40 20 0 10 o Temperature ( C) Figure 16A. Turn on Rise Time vs. Temperature www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 12 14 16 18 20 Supply Voltage (V) Figure 16B. Turn on Rise Time vs. Supply Voltage 12 IRS2184/IRS21844(S)PbF 80 Turn-off Fall Time (ns) Turn-off Fall Time (ns) 80 60 40 Max. Typ 20 0 -50 -25 0 25 50 75 100 60 Max. 40 Typ. 20 0 125 10 12 14 o Temperature ( C) 1100 900 900 Deadtime (ns)) Deadtime (ns)) 20 Figure 17B. Turn-Off Fall Time vs. Supply Voltage 1100 700 Max. Typ. Min. 700 Max. 500 Typ. Min. 300 100 -50 18 Supply Voltage (V) Figure 17A. Turn-Off Fall Time vs. Temperature 500 16 300 100 -25 0 25 50 75 100 125 Temperature ( oC) Figure 18A. Deadtime vs. Temperature www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 10 12 14 16 18 20 Supply Voltage (V) Figure 18B. Deadtime vs. Supply Voltage 13 IRS2184/IRS21844(S)PbF 6 6 Max. 5 Typ. 4 Min. 5 Input Voltage (V) Deadtime m ( s) 7 3 2 1 4 3 Min. 2 1 0 0 50 100 150 0 200 -50 -25 0 RDT (KW) 75 100 125 Temperature ( C) Figure 19A. Logic "1" Input Voltage vs. Temperature Logic "0" Input Voltage (V) 6 Input Voltage (V) 50 o Figure 18C. Deadtime vs. RDT 5 4 3 25 Max. 2 1 0 6 5 4 3 2 Max. 1 0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 V BAIS Supply Voltage (V) Temperature (oC) Figure 19B. Logic "1" Input Voltage vs. Supply Voltage Figure 20A. Logic "0" Input Voltage vs. Temperature www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 125 14 IRS2184/IRS21844(S)PbF 6 SD Input threshold (+) (V)) Logic "0" Input Voltage (V)) 6 5 4 3 2 Max. 1 5 4 3 2 1 -50 0 10 12 14 16 18 Max. 20 -25 0 Supply Voltage (V) Max. 2 1 16 18 20 V CC Supply Voltage (V) Figure 21B. SD Input Positive Going Threshold (+) vs. Supply Voltage SD Input Negative Going Threshold (V) SD Input threshold (+) (V)) 4 14 100 125 Figure 21A. SD Input Positive Going Threshold (+) vs. Temperature 5 12 75 Temperature ( C) 6 10 50 o Figure 20B. Logic "0" Input Voltage vs. Supply Voltage 3 25 5 4 3 2 1 Max. 0 -50 -25 0 25 50 75 100 125 o Temperature ( C) Figure 22A. SD Input Negative Going Threshold vs. Temperature www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 15 5 High Level Output Voltage (V)) SD Input Negative Going Threshold (V) IRS2184/IRS21844(S)PbF 4 3 2 1 Max. 0 10 12 14 16 18 20 5.0 4.0 3.0 2.0 M ax. 1.0 0.0 -50 Supply Voltage (V) 0 25 50 75 100 125 Temperature (oC) Figure 22B. SD Input Negative Going Threshold vs. Supply Voltage Figure 23A. High Level Output Voltage vs. Temperature (Io = 0 mA) 0.5 5.0 Low Level Output (V) High Level Output Voltage (V)) -25 4.0 3.0 2.0 Max 1.0 0.4 0.3 Max. 0.2 0.1 0.0 0.0 10 12 14 16 18 20 -50 VBIAS Supply Voltage (V) Figure 23B. High Level Output Voltage vs. Supply Voltage (Io = 0 mA) www.irf.com PDF created with pdfFactory trial version www.pdffactory.com -25 0 25 50 75 100 125 o Temperature ( C) Figure 24A. Low Level Output vs. Temperature 16 Low Level Output (V) 0.5 0.4 0.3 Max. 0.2 0.1 0.0 10 12 14 16 18 20 Offset Supply Leakage Current m( A) IRS2184/IRS21844(S)PbF 500 400 300 200 100 Max. 0 -50 -25 25 50 75 100 125 Temperature ( oC) Supply Voltage (V) Figure 24B. Low Level Output vs. Supply Voltage Figure 25A. Offset Supply Leakage Current vs. Temperature 500 250 V BS Supply Current (mA) Offset Supply Leakage Current m( A) 0 400 300 200 100 Max. 200 Max. 150 100 Typ. 50 Min. 0 0 100 200 300 400 500 600 -50 V B Boost Voltage (V) Figure 25B. Offset Supply Leakage Current vs. VB Boost Voltage www.irf.com PDF created with pdfFactory trial version www.pdffactory.com -25 0 25 50 75 100 125 Temperature ( oC) Figure 26A. VBS Supply Current vs. Temperature 17 IRS2184/IRS21844(S)PbF 5 ) V CC Supply Current (mA) V BS Supply Current (mA) 250 200 150 Max. 100 Typ. 50 Min. 12 14 16 18 20 Max. Typ. 1 Min. -25 0 25 50 75 100 V BS Floating Supply Voltage (V) Temperature ( C) Figure 26B. VBS Supply Current vs. VBS Supply Voltage Figure 27A. VCC Supply Current vs. Temperature Logic "1" Input Bias Current m(A) V CC Supply Current (mA)) 2 4 3 Max. 2 Typ. 1 Min 0 12 14 16 18 20 120 100 80 60 Max. 40 Typ. 20 0 -50 -25 0 25 50 75 100 125 Temperature ( oC) V CC Supply Voltage (V) Figure 27B. VCC Supply Current vs. VCC Supply Voltage 125 o 5 10 3 0 -50 0 10 4 Figure 28A. Logic "1" Input Bias Current vs. Temperature www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 18 120 100 80 60 Max. 40 Typ. 20 0 10 12 14 16 18 20 Logic "0" Input Bias Current (A) Logic "1" Input Bias Current m(A) IRS2184/IRS21844(S)PbF 6 5 Max 4 3 2 1 0 -50 -25 0 Supply Voltage (V) V CC and VBS UV Threshold (+) (V) Logic "0" Input Bias C urrent (A) Max 4 3 2 1 0 12 14 16 75 100 125 Figure 29A. Logic "0" Input Bias Current vs. Temperature 6 10 50 Temperature (C) Figure 28B. Logic "1" Input Bias Current vs. Supply Voltage 5 25 18 12 11 10 9 Max. Typ. Min. 8 7 6 -50 20 -25 0 25 50 75 100 125 o Temperature ( C) Supply Voltage (V) F i gur e 20B. Lo gic "0" I nput Bias C ur r ent Figure 29B. Logic "0" Input Bias Current vs. Supply Voltage Figure 30. VCC and VBS Undervoltage Threshold (+) vs. Temperature www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 19 12 5 Output Source Current (A) V CC and VBS UVThreshold (-) (V) IRS2184/IRS21844(S)PbF 11 10 Max. 9 Typ. 8 Mi n. 7 6 -50 -25 0 25 50 75 100 4 3 Typ. 2 Mi n. 1 0 -50 125 -25 Temperature ( oC) 25 50 75 100 125 o Temperature ( C) Figure 32A. Output Source Current vs. Temperature Figure 31. VCC and VBS Undervoltage Threshold (-) vs. Temperature 5.0 Output Sink Current (A)) 5 Output Source Current (A) 0 4 3 2 Typ. 1 Mi n. 4.0 3.0 Typ. 2.0 Mi n. 1.0 0 10 12 14 16 18 20 -50 Supply Voltage (V) Figure 32B. Output Source Current vs. Supply Voltage www.irf.com PDF created with pdfFactory trial version www.pdffactory.com -25 0 25 50 75 100 125 o Temperature ( C) Figure 33A. Output Sink Current vs. Temperature 20 5 140 4 120 Temprature (oC) Output Sink Current (A) ) IRS2184/IRS21844(S)PbF 3 2 Typ. 1 100 80 140v 70v 60 0v 40 Mi n. 20 0 10 12 14 16 18 20 1 Supply Voltage (V) 120 120 100 140v 70v 0v 60 Temperature o(C) Temperature o(C) 140 100 140v 80 40 20 20 100 0v 1 1000 10 100 1000 Frequency (kHz) Frequency (kHz) Figure 35. IRS2184 vs. Frequency (IRFBC30), Rgate = 22W, Vcc = 15V 70v 60 40 10 1000 Figure 34. IRS2184 vs. Frequency (IRFBC20), Rgate = 33W, Vcc = 15V 140 1 100 Frequency (kHz) Figure 33B. Output Sink Current vs. Supply Voltage 80 10 Figure 36. IRS2184 vs. Frequency (IRFBC40), Rgate = 15W, Vcc = 15V www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 21 IRS2184/IRS21844(S)PbF 140v 140 140 70v 0v 120 Temperature o(C) Temperature (oC) 120 100 80 60 40 100 80 60 140v 70v 0v 40 20 20 1 10 100 1000 1 Frequency (kHz) 1000 Figure 38. IRS21844 vs. Frequency (IRFBC20), Rgate = 33W, Vcc = 15V 140 140 120 120 100 80 140v 70v 0v 40 Temperature o( C) Temperature o( C) 100 Frequency (kHz) Figure 37. IRS2184 vs. Frequency (IRFBC50), Rgate = 10W, Vcc = 15V 60 10 100 140v 80 70v 60 0v 40 20 20 1 10 100 1000 1 Frequency (kHz) Figure 39. IRS21844 vs. Frequency (IRFBC30), Rgate = 22W, Vcc = 15V 10 100 1000 Frequency (kHz) Figure 40. IRS21844 vs. Frequency (IRFBC40), Rgate = 15W, Vcc = 15V www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 22 IRS2184/IRS21844(S)PbF 140v 140 120 70v 100 0v 120 Temperature (oC) Temperature o(C) 140 80 60 100 80 60 70v 0v 40 40 20 20 1 10 100 1 1000 10 100 1000 Frequency (kHz) Frequency (kHz) Figure 42. IRS2184s vs. Frequency (IRFBC20), Rgate = 33W, Vcc = 15V Figure 41. IRS21844 vs. Frequency (IRFBC50), Rgate = 10W, Vcc = 15V 140 140v 70v 140 120 140v 100 70v 80 0v 60 Temperature o(C) 120 Temperature (oC) 140v 0v 100 80 60 40 40 20 20 1 10 100 1 1000 100 1000 Frequency (kHz) Frequency (kHz) Figure 43. IRS2184s vs. Frequency (IRFBC30), Rgate = 22W, Vcc = 15V 10 Figure 44. IRS2184s vs. Frequency (IRFBC40), Rgate = 15W, Vcc = 15V www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 23 IRS2184/IRS21844(S)PbF 140V 70V 0V 140 140 120 Temperature o(C) Tempreture (oC) 120 100 80 60 40 100 80 60 140v 70v 0v 40 20 1 10 100 20 1000 1 Frequency (kHz) 10 100 1000 Frequency (kHz) Figure 45. IRS2184s vs. Frequency (IRFBC50), Rgate = 10W, Vcc = 15V Figure 46. IRS21844s vs. Frequency (IRFBC20), Rgate = 33W, Vcc = 15V 140 120 120 100 80 140v 60 70v 0v Temperature o(C) 140 100 140v 80 70v 0v 60 40 40 20 20 1 10 100 1 1000 100 1000 Frequency (kHz) Frequency (kHz) Figure 47. IRS21844s vs. Frequency (IRFBC30), Rgate = 22W, Vcc = 15V 10 Figure 48. IRS21844s vs. Frequency (IRFBC40), Rgate = 15W, Vcc = 15V www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 24 IRS2184/IRS21844(S)PbF 140v 70v 140 0v Temperature (oC) 120 100 80 60 40 20 1 10 100 1000 Frequency (kHz) Figure 49. IRS21844s vs. Frequency (IRFBC50), Rgate = 10W, Vcc = 15V www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 25 IRS2184/IRS21844(S)PbF Cast Outlines 01-6014 01-3003 01 (MS-001AB) 8-Lead PDIP D DIM B 5 A FOOTPRINT 8 7 6 5 6 H E 0.25 [.010] 1 2 3 A 4 6.46 [.255] 6X e 3X 1.27 [.050] 8X 1.78 [.070] MILLIMETERS MAX MIN .0532 .0688 1.35 1.75 A1 .0040 .0098 0.10 0.25 b .013 .020 0.33 0.51 c .0075 .0098 0.19 0.25 D .189 .1968 4.80 5.00 E .1497 .1574 3.80 4.00 e .050 BASIC 1.27 BASIC e1 A 8X 0.72 [.028] INCHES MIN MAX .025 BASIC 0.635 BASIC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 y 0 8 0 8 K x 45 e1 A C y 0.10 [.004] 8X b 0.25 [.010] A1 8X L 8X c 7 C A B 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. NOTES: 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE. 8-Lead SOIC www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 01-6027 01-0021 11 (MS-012AA) 26 IRS2184/IRS21844(S)PbF 14-Lead PDIP 14-Lead SOIC (narrow body) www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 01-6010 01-3002 03 (MS-001AC) 01-6019 01-3063 00 (MS-012AB) 27 IRS2184/IRS21844(S)PbF Tape & Reel 8-lead SOIC LOAD ED TA PE FEED DIRECTION A B H D F C N OT E : CO NTROLLING D IM ENSION IN M M E G C A R R I E R T A P E D IM E N S I O N F O R 8 S O I C N M e tr ic Im p e r i a l Co d e M in M ax M in M ax A 7 .9 0 8.1 0 0. 3 1 1 0 .3 1 8 B 3 .9 0 4.1 0 0. 1 5 3 0 .1 6 1 C 1 1 .7 0 1 2. 30 0 .4 6 0 .4 8 4 D 5 .4 5 5.5 5 0. 2 1 4 0 .2 1 8 E 6 .3 0 6.5 0 0. 2 4 8 0 .2 5 5 F 5 .1 0 5.3 0 0. 2 0 0 0 .2 0 8 G 1 .5 0 n/ a 0. 0 5 9 n/ a H 1 .5 0 1.6 0 0. 0 5 9 0 .0 6 2 F D C B A E G H R E E L D IM E N S I O N S F O R 8 S O IC N M e tr ic Im p e r i a l Co d e M in M ax M in M ax A 32 9. 60 3 30 .2 5 1 2 .9 7 6 1 3 .0 0 1 B 2 0 .9 5 2 1. 45 0. 8 2 4 0 .8 4 4 C 1 2 .8 0 1 3. 20 0. 5 0 3 0 .5 1 9 D 1 .9 5 2.4 5 0. 7 6 7 0 .0 9 6 E 9 8 .0 0 1 02 .0 0 3. 8 5 8 4 .0 1 5 F n /a 1 8. 40 n /a 0 .7 2 4 G 1 4 .5 0 1 7. 10 0. 5 7 0 0 .6 7 3 H 1 2 .4 0 1 4. 40 0. 4 8 8 0 .5 6 6 www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 28 IRS2184/IRS21844(S)PbF Tape & Reel 14-lead SOIC LOAD ED TA PE FEED DIRECTION A B H D F C N OT E : CO NTROLLING D IM ENSION IN M M E G C A R R I E R T A P E D IM E N S I O N F O R 1 4 S O IC N M e tr ic Im p e r i a l Co d e M in M ax M in M ax A 7 .9 0 8.1 0 0. 3 1 1 0 .3 1 8 B 3 .9 0 4.1 0 0. 1 5 3 0 .1 6 1 C 1 5 .7 0 1 6. 30 0. 6 1 8 0 .6 4 1 D 7 .4 0 7.6 0 0. 2 9 1 0 .2 9 9 E 6 .4 0 6.6 0 0. 2 5 2 0 .2 6 0 F 9 .4 0 9.6 0 0. 3 7 0 0 .3 7 8 G 1 .5 0 n/ a 0. 0 5 9 n/ a H 1 .5 0 1.6 0 0. 0 5 9 0 .0 6 2 F D C B A E G H R E E L D IM E N S I O N S F O R 1 4 S O IC N M e tr ic Im p e r i a l Co d e M in M ax M in M ax A 32 9. 60 3 30 .2 5 1 2 .9 7 6 1 3 .0 0 1 B 2 0 .9 5 2 1. 45 0. 8 2 4 0 .8 4 4 C 1 2 .8 0 1 3. 20 0. 5 0 3 0 .5 1 9 D 1 .9 5 2.4 5 0. 7 6 7 0 .0 9 6 E 9 8 .0 0 1 02 .0 0 3. 8 5 8 4 .0 1 5 F n /a 2 2. 40 n /a 0 .8 8 1 G 1 8 .5 0 2 1. 10 0. 7 2 8 0 .8 3 0 H 1 6 .4 0 1 8. 40 0. 6 4 5 0 .7 2 4 www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 29 IRS2184/IRS21844(S)PbF LEADFREE PART MARKING INFORMATION Part number Date code IRSxxxxx YWW? ?XXXX Pin 1 Identifier ? P IR logo Lot Code (Prod mode - 4 digit SPN code) MARKING CODE Lead Free Released Non-Lead Free Released Assembly site code Per SCOP 200-002 ORDER INFORMATION 8-Lead PDIP IRS2184PbF 8-Lead SOIC IRS2184SPbF 8-Lead SOIC Tape & Reel IRS2184STRPbF 14-Lead PDIP IR2S1844PbF 14-Lead SOIC IRS21844SPbF 14-Lead SOIC Tape & Reel IRS21844STRPbF SOIC8 &14 are MSL2 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at www.irf.com IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 12/1/2006 www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 30