_______________General Description
The MAX801/MAX808 microprocessor (µP) supervisory
circuits monitor and control the activities of +5V µPs by
providing backup-battery switchover, low-line indica-
tion, and µP reset. Additional features include a watch-
dog for the MAX801 and CMOS RAM write protection
for the MAX808.
The MAX801/MAX808 offer a choice of reset-threshold
voltage (denoted by suffix letter): 4.675V (L), 4.575V
(N), and 4.425V (M). These devices are available in
8-pin DIP and SO packages.
________________________Applications
Computers
Controllers
Intelligent Instruments
Critical µP Power Monitoring
Portable/Battery-Powered Equipment
Embedded Systems
____________________________Features
♦Precision Voltage Monitoring, ±1.5% Reset
Accuracy
♦200ms Power-OK/Reset Time Delay
♦RESET Output (MAX808)
RESET and RESET Outputs (MAX801)
♦Watchdog Timer (MAX801)
♦On-Board Gating of Chip-Enable Signals (MAX808):
Memory Write-Cycle Completion
3ns CE Gate Propagation Delay
♦1µA Standby Current
♦Power Switching:
250mA in VCC Mode
20mA in Battery-Backup Mode
♦MaxCap™/SuperCap™ Compatible
♦RESET Guaranteed Valid to VCC = 1V
♦Low-Line Threshold 52mV Above Reset
Threshold
MAX801L/M/N, MAX808L/M/N
8-Pin µP Supervisory Circuits
with ±1.5% Reset Accuracy
________________________________________________________________
Maxim Integrated Products
1
0.1µF0.1µF
0.1µF
µP
POWER
POWER FOR
CMOS RAM
NMI
BATT
VCC OUT
+5V
GND
RESET
FROM I/O SYSTEM OR
ADDRESS DECODER
TO CMOS RAM
CE IN
CE OUT
LOWLINE
RESET
MAX808 µP SYSTEM
__________Typical Operating Circuit
19-1086; Rev 0; 6/96
PART*
MAX801_CPA
MAX801_CSA
MAX801_EPA -40°C to +85°C
0°C to +70°C
0°C to +70°C
TEMP. RANGE PIN-PACKAGE
8 Plastic DIP
8 SO
8 Plastic DIP
______________Ordering Information
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
MaxCap is a trademark of The Carborundum Corp.
SuperCap is a trademark of Baknor Industries.
Pin Configurations appear at end of data sheet.
MAX801_ESA
MAX801_MJA
MAX808_CPA 0°C to +70°C
-55°C to +125°C
-40°C to +85°C 8 SO
8 CERDIP**
8 Plastic DIP
MAX808_CSA 0°C to +70°C 8 SO
MAX808_EPA
MAX808_ESA
MAX808_MJA -55°C to +125°C
-40°C to +85°C
-40°C to +85°C 8 Plastic DIP
8 SO
8 CERDIP**
* These parts offer a choice of reset threshold voltage. From the
table below, select the suffix corresponding to the desired
threshold and insert it into the blank to complete the part number.
**Contact factory for availability and processing to MIL-STD-883.
RESET THRESHOLD (V)
L 4.60 4.675
N 4.50
4.75
M 4.35
4.575 4.65
4.425 4.50
MIN MAX
SUFFIX TYP
MAX801L/M/N, MAX808L/M/N
8-Pin µP Supervisory Circuits
with ±1.5% Reset Accuracy
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = 4.6V to 5.5V for the MAX80_L, VCC = 4.5V to 5.5V for the MAX80_N, VCC = 4.35V to 5.5V for the MAX80_M; VBATT = 2.8V;
TA= TMIN to TMAX. Typical values are at VCC = 5V and TA= +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Input Voltage (with respect to GND)
VCC.......................................................................-0.3V to +6V
VBATT....................................................................-0.3V to +6V
All Other Pins........................................-0.3V to (VOUT + 0.3V)
Input Current
VCC Peak ..........................................................................1.0A
VCC Continuous ............................................................500mA
IBATT Peak.....................................................................250mA
IBATT Continuous ............................................................50mA
GND................................................................................50mA
All Other Inputs...............................................................50mA
Output Current
OUT Peak..........................................................................1.0A
OUT Continuous............................................................500mA
All Other Outputs ............................................................50mA
Continuous Power Dissipation (TA= +70°C)
Plastic DIP (derate 9.09mW/°C above +70°C) ............727mW
SO (derate 5.88mW/°C above +70°C).........................471mW
CERDIP (derate 8.00mW/°C above +70°C).................640mW
Operating Temperature Ranges
MAX801_C_A/MAX808_C_A...............................0°C to +70°C
MAX801_E_A/MAX808_E_A ............................-40°C to +85°C
MAX801_MJA/MAX808_MJA.........................-55°C to +125°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10sec).............................+300°C
MAX808
MAX801
VCC = 0V,
VBATT = 2.8V
CONDITIONS
µA
48 90
Supply Current in Normal
Operating Mode
(excludes IOUT)
68 110
V0 X 5.5
Operating Voltage Range
VCC, BATT (Note 1)
0.4 1
5µA
50
Supply Current in Battery-
Backup Mode (excludes
IOUT) (Note 2)
UNITSMIN TYP MAXSYMBOLPARAMETER
IOUT = 25mA VCC - 0.02
IOUT = 250mA, MAX80_C/E
IOUT = 250mA, MAX80_M VCC - 0.45
VCC = 4.5V VCC - 0.38 VCC - 0.25
VCC = 3V, VBATT = 2.8V, IOUT = 100mA 1.0 1.5
V
VCC - 0.25 VCC - 0.12
VOUT in Normal Operating
Mode
1.8
VCC = 3V, IOUT = 100mA Ω
1.2 2.5
VCC to OUT
On-Resistance
VBATT = 2.8V, IOUT = 10mA VBATT - 0.25 VBATT - 0.12
VBATT = 4.5V, IOUT = 20mA VBATT - 0.16
VBATT = 2.0V, IOUT = 5mA
VCC = 0V V
VBATT - 0.20 VBATT - 0.08
VOUT in Battery-Backup
Mode
VBATT = 2.8V, IOUT = 10mA 12 25
VBATT = 4.5V, IOUT = 20mA 8
VBATT = 2.0V, IOUT = 5mA
VCC = 0V Ω
16 40
BATT to OUT
On-Resistance
TA= +25°C
TA= TMIN
to TMAX MAX80_C/E
MAX80_M
TA= +25°C
TA= TMIN to TMAX
VBATT + 0.2V
≤VCC -0.1 0.1
-1.0 1.0 µA
BATT Standby Current
(Note 3)
Power-up
Power-down
VBATT = 2.8V VBATT + 0.05
VBATT V
Battery-Switchover
Threshold
50 mV
Battery-Switchover
Hysteresis
MAX80_C/E
VCC = 4.5V,
IOUT = 250mA MAX80_M
MAX801L/M/N, MAX808L/M/N
8-Pin µP Supervisory Circuits
with ±1.5% Reset Accuracy
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 4.6V to 5.5V for the MAX80_L, VCC = 4.5V to 5.5V for the MAX80_N, VCC = 4.35V to 5.5V for the MAX80_M; VBATT = 2.8V;
TA= TMIN to TMAX. Typical values are at VCC = 5V and TA= +25°C, unless otherwise noted.)
VCC rising
and falling
VCC rising
VCC falling at 1mV/µs
ISINK = 50µA,
VBATT = 0V,
VCC falling
VCC falling at 1mV/µs
MAX80_M
VCC falling
MAX80_L
MAX80_N
CONDITIONS
0.1 0.4
RESET Output Voltage 0.3
0.3
V
4.350 4.425 4.500
VRST
Reset Threshold
ms140 200 280tRP
RESET Active Timeout
Period
µs17tLL
VCC to LOWLINE Delay µs17tRD
VCC to RESET Delay
V
4.48 4.56
VLL
LOWLINE Threshold,
VCC Rising
mV13Reset-Threshold Hysteresis
mV30 52 70VLR
LOWLINE to RESET
Threshold Voltage
4.73 4.81
4.63 4.71
UNITSMIN TYP MAXSYMBOLPARAMETER
MAX80_L
MAX80_N 4.500 4.575 4.650
4.600 4.675 4.750
MAX80_M
ISOURCE = 0.1mA VCC - 1.5 VCC - 0.1
V
ISINK = 3.2mA
ISOURCE = 5mA, VCC = 4.25V 0.4 V
VCC - 1.5
RESET Output Voltage
(MAX801)
Output sink current
Output source current, VCC = 4.25V
ISINK = 3.2mA, VCC = 4.25V
ISOURCE = 5mA, VCC = 4.25V 0.4 V
VCC - 1.5
LOWLINE Output Voltage
55 mA
15
ISC
RESET Output Short-
Circuit Current (MAX801)
Output sink current, VCC = 4.25V
Output source current 40 mA
20
ISC
LOWLINE Output
Short-Circuit Current
VCC = 1.0V, MAX80_C
VCC = 1.2V, MAX80_E/M
ISINK = 3.2mA, VCC = 4.25V
Output sink current, VCC = 4.25V
Output source current 40 mA
1.6
ISC
RESET Output
Short-Circuit Current
1.12 1.6 2.24 sec
0.75 x VCC
tWD
Watchdog Timeout Period
VIH V
RESET deasserted, WDI = 0V 0.8
-50 -10
VIL
WDI Threshold Voltage
(Note 4)
µA
RESET deasserted, WDI = VCC 16 50
WDI Input Current
VIL = 0.8V, VIH = 0.75V x VCC 100 ns
Minimum Watchdog Input
Pulse Width
RESET AND LOW-LINE
WATCHDOG TIMER (MAX801)
40 -55 -15 65
VCC SUPPLY CURRENT vs. TEMPERATURE
(NORMAL OPERATING MODE)
50
MAX801/808-01
TEMPERATURE (°C)
VCC SUPPLY CURRENT (µA)
25 105
-35 45 1255 85
70
60
45
55
75
65
MAX808
MAX801
3.0
2.5
2.0
1.5
1.0
0.5
0-60 -20 60 140
BATTERY SUPPLY CURRENT vs.
TEMPERATURE (BATTERY-BACKUP MODE)
MAX801/808-02
TEMPERATURE (°C)
BATTERY SUPPLY CURRENT (µA)
20 100-40 40 120080
6
5
4
3
2
1
0
-60 -20 60 140
MAX808
CHIP-ENABLE PROPAGATION DELAY
vs. TEMPERATURE
MAX801/808-03
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
20 100-40 40 120080
MAX801L/M/N, MAX808L/M/N
8-Pin µP Supervisory Circuits
with ±1.5% Reset Accuracy
4 _______________________________________________________________________________________
Note 1: Either VCC or VBATT can go to 0V if the other is greater than 2V.
Note 2: The supply current drawn by the MAX80_ from the battery (excluding IOUT) typically goes to 15µA when (VBATT - 0.1V) <
VCC < VBATT. In most applications, this is a brief period as VCC falls through this region (see
Typical Operating
Characteristics
).
Note 3: “+” = battery-discharging current, “-” = battery-charging current.
Note 4: WDI is internally connected to a voltage divider between VCC and GND. If unconnected, WDI is typically driven to 1.8V,
disabling the watchdog function.
Note 5: The chip-enable resistance is tested with VCE IN = VCC / 2 and ICE IN = 1mA.
Note 6: The chip-enable propagation delay is measured from the 50% point at CE IN to the 50% point at CE OUT.
Note 7: If CE IN goes high, CE OUT goes high immediately and stays high until reset is deasserted and CE IN is low.
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 4.6V to 5.5V for the MAX80_L, VCC = 4.5V to 5.5V for the MAX80_N, VCC = 4.35V to 5.5V for the MAX80_M; VBATT = 2.8V;
TA= TMIN to TMAX. Typical values are at VCC = 5V and TA= +25°C, unless otherwise noted.)
CONDITIONS
Enabled mode, VCC = VRST(max) Ω75 150
CE IN to CE OUT
Resistance (Note 5)
UNITSMIN TYP MAXSYMBOLPARAMETER
VCC = 4.25V, CE OUT = 0V mA15
CE OUT Short-Circuit
Current (RESET Active)
VCC = 5V, CLOAD = 50pF,
50Ωsource-impedance driver ns38
CE IN to CE OUT
Propagation Delay (Note 6)
VCC = 4.25V, IOUT = 2mA V
3.5
CE OUT Output Voltage
High (RESET Active)
VCC falling, CE IN = 0V µs18
RESET to CE OUT Delay
(Note 7)
VCC = 4.25V ±0.00002 ±1 µA
CE IN Leakage Current
VCC = 0V, IOUT = 10µA VBATT - 0.1 VBATT
CHIP-ENABLE GATING (MAX808)CHIP-ENABLE GATING (MAX808)
__________________________________________Typical Operating Characteristics
(VCC = 5V, VBATT = 2.8V, no load, TA= +25°C, unless otherwise noted.)
MAX801L/M/N, MAX808L/M/N
8-Pin µP Supervisory Circuits
with ±1.5% Reset Accuracy
_______________________________________________________________________________________
5
0
50Ω DRIVER
2
4
6
8
0 50 100
MAX808
CHIP-ENABLE PROPAGATION DELAY
vs. CE OUT LOAD CAPACITANCE
MAX801/808-04
CLOAD (pF)
PROPAGATION DELAY (ns)
4.70
4.65
4.60
4.55
4.50
4.45
4.40 -60 -20 60 140
RESET THRESHOLD
vs. TEMPERATURE
MAX801/808-07
TEMPERATURE (°C)
RESET THRESHOLD (V)
20 100-40 40 120080
MAX80_L
MAX80_N
MAX80_M
30
5-60 -20 60 140
BATT to OUT ON-RESISTANCE
vs. TEMPERATURE
10
25
MAX801/808-05
TEMPERATURE (°C)
VBATT TO VOUT ON-RESISTANCE (Ω)
20 100-40 40 120080
20
15
VBATT = 2.0V
VBATT = 2.8V
VBATT = 4.5V
VCC = 0V
IOUT = 10mA
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7 -60 -20 60 140
VCC to OUT ON-RESISTANCE
vs. TEMPERATURE
MAX801/808-06
TEMPERATURE (°C)
VCC TO VOUT ON-RESISTANCE (Ω)
20 100-40 40 120080
I
OUT = 250mA
280
260
240
220
200
180
160
140 -60 -20 60 140
RESET TIMEOUT PERIOD
vs. TEMPERATURE (VCC RISING)
MAX801/808-08
TEMPERATURE (°C)
RESET TIMEOUT PERIOD (ms)
20 100-40 40 120080 0
10
20
30
40
50
60
70
80
-60 -20 60 140
LOWLINE to RESET THRESHOLD
vs. TEMPERATURE (VCC FALLING)
MAX801/808-09
TEMPERATURE (°C)
LOWLINE TO RESET THRESHOLD (mV)
20 100-40 40 120080
____________________________Typical Operating Characteristics (continued)
(VCC = 5V, VBATT = 2.8V, no load, TA= +25°C, unless otherwise noted.)
4.75
4.80
4.70
4.65
4.60
4.55
4.50
4.45
4.40 -60 -20 60 140
LOWLINE THRESHOLD
vs. TEMPERATURE (VCC RISING)
MAX801/808-10
TEMPERATURE (°C)
LOWLINE THRESHOLD (V)
20 100-40 40 120080
MAX80_L
MAX80_N
MAX80_M
0
5
10
15
20
25
30
35
40
-60 -20 60 140
LOWLINE COMPARATOR PROPAGATION
DELAY vs. TEMPERATURE (VCC FALLING)
MAX801/808-11
TEMPERATURE (°C)
PROPAGATION DELAY (µs)
20 100-40 40 120080
V
CC FALLING AT 1mV/µs
0
5
10
15
20
25
30
35
40
-60 -20 60 140
RESET COMPARATOR PROPAGATION
DELAY vs. TEMPERATURE (VCC FALLING)
MAX801/808-12
TEMPERATURE (°C)
PROPAGATION DELAY (µs)
20 100-40 40 120080
V
CC FALLING AT 1mV/µs
MAX801L/M/N, MAX808L/M/N
8-Pin µP Supervisory Circuits
with ±1.5% Reset Accuracy
6 _______________________________________________________________________________________
0
2
4
6
8
10
12
14
16
2.5 2.6 2.7 2.8 2.9 3.0
BATTERY CURRENT
vs. INPUT SUPPLY VOLTAGE
MAX801/808-13
VCC (V)
BATTERY CURRENT (µA)
1000
100
10
11 10010 1000
VCC to OUT VOLTAGE vs.
OUTPUT CURRENT
MAX801/808-15
IOUT (mA)
VCC TO VOUT VOLTAGE (mV)
SLOPE = 1.0Ω
1000
100
10 1 10 100
BATT to OUT VOLTAGE vs.
OUTPUT CURRENT
MAX801/808-14
IOUT (mA)
VBATT TO VOUT VOLTAGE (mV)
VCC = 0V
SLOPE = 12Ω
1000
100
10
11 10010 1000
MAXIMUM TRANSIENT DURATION vs.
RESET THRESHOLD OVERDRIVE
MAX801/808-16
RESET THRESHOLD OVERDRIVE (mV)
MAXIMUM TRANSIENT DURATION (µs)
RESET OCCURS
____________________________Typical Operating Characteristics (continued)
(VCC = 5V, VBATT = 2.8V, no load, TA= +25°C, unless otherwise noted.)
______________________________________________________________Pin Description
RESET
LOWLINE
VCC
Active-Low Reset Output. RESET is triggered and stays low when VCC is below the reset
threshold (or during a watchdog timeout for the MAX801). It remains low 200ms after
VCC rises above the reset threshold (or 200ms after the watchdog timeout occurs).
RESET has a strong pull-down but a relatively weak pull-up, and can be wire-OR con-
nected to logic gates. Valid for VCC ≥1V. RESET swings between VCC and GND.
33
NAME
Low-Line Comparator Output. This CMOS-logic output goes low when VCC falls to 52mV
above the reset threshold. Use LOWLINE to generate an NMI, initiating an orderly shut-
down routine when VCC is falling. LOWLINE swings between VCC and GND.
22
Input Supply Voltage, nominally +5V. Bypass with a 0.1µF capacitor to GND.11
MAX801 MAX808 FUNCTION
PIN
GND Ground44
MAX801L/M/N, MAX808L/M/N
8-Pin µP Supervisory Circuits
with ±1.5% Reset Accuracy
_______________________________________________________________________________________ 7
_________________________________________________Pin Description (continued)
Active-High Reset Output. RESET is the inverse of RESET. It is a CMOS output that
sources and sinks current. RESET swings between VCC and GND.
—5
Chip-Enable Output. Output to the chip-enable gating circuit. CE OUT is pulled up to
the higher of VCC or VBATT when the chip-enable gate is disabled.
5—
Watchdog Input. If WDI remains high or low longer than the watchdog timeout period
(typically 1.6sec), RESET will be asserted for 200ms. Leave unconnected to disable the
watchdog function.
—6
Chip-Enable Input6—
RESET
CE OUT
WDI
CE IN
BATT
OUT
Backup-Battery Input. When VCC falls below the reset threshold and VBATT, OUT switch-
es from VCC to BATT. VBATT may exceed VCC. The battery can be removed while the
MAX801/MAX808 is powered up, provided BATT is bypassed with a 0.1µF capacitor to
GND. If no battery is used, connect BATT to ground and VCC to OUT.
77
Output Supply Voltage to CMOS RAM. When VCC exceeds the reset threshold or VBATT,
OUT connects to VCC. When VCC falls below the reset threshold and VBATT, OUT con-
nects to BATT. Bypass OUT with a 0.1µF capacitor to GND.
88
NAME
MAX801 MAX808 FUNCTION
PIN
MAX801
MAX808
CE IN
GND
VCC
BATT
THE HIGHER
OF VCC
OR VBATT
MAX801 ONLY
MAX808 ONLY
BATTERY-BACKUP
COMPARATOR
RESET
COMPARATOR
LOW-LINE
COMPARATOR
2.275V
OUT
LOWLINE
WDI
RESET (MAX801 ONLY)
RESET
CE OUT
P
P
N
WATCHDOG
TRANSITION
DETECTOR
STATE
MACHINE
OSCILLATOR
Figure 1. Functional Diagram
MAX801L/M/N, MAX808L/M/N
8-Pin µP Supervisory Circuits
with ±1.5% Reset Accuracy
8 _______________________________________________________________________________________
_______________Detailed Description
The MAX801/MAX808 microprocessor (µP) supervisory
circuits provide power-supply monitoring and backup-
battery switchover in µP systems. The MAX801 also
provides program-execution watchdog functions
(Figure 1). Use of BiCMOS technology results in an
improved, 1.5% reset-threshold precision while keeping
supply currents typically at 68µA (48µA for the
MAX808). The MAX801/MAX808 are intended for bat-
tery-powered applications that require high reset-
threshold precision, allowing a wide power-supply
operating range while preventing the system from oper-
ating below its specified voltage range.
RESET
and RESET Outputs
The MAX801/MAX808’s RESET output ensures that the
µP powers up in a known state, and prevents code-
execution errors during power-down and brownout
conditions. It does this by resetting the µP, terminating
program execution when VCC dips below the reset
threshold. Each time RESET is asserted, it stays low for
at least the 200ms reset timeout period (set by an inter-
nal timer) to ensure the µP has adequate time to return
to an initial state. The internal timer restarts any time
VCC goes below the reset threshold (VRST) before the
reset timeout period is completed. The watchdog timer
on the MAX801 can also initiate a reset (see the
MAX801 Watchdog Timer
section).
The RESET output is active low, and is implemented with
a strong pull-down/relatively weak pull-up structure. It is
guaranteed to be a logic low for 0V < VCC < VRST, pro-
vided VBATT is greater than 2V. Without a backup bat-
tery, RESET is guaranteed valid for VCC ≥1V.
The RESET output is the inverse of the RESET output; it
both sources and sinks current and cannot be wire-OR
connected.
Low-Line Comparator
The low-line comparator monitors VCC with a threshold
voltage typically 52mV above the reset threshold, with
13mV of hysteresis. Use LOWLINE to provide a non-
maskable interrupt (NMI) to the µP when power begins
to fall, initiating an orderly software shutdown routine. In
most battery-operated portable systems, reserve ener-
gy in the battery provides ample time to complete the
shutdown routine once the low-line warning is encoun-
tered and before reset asserts. If the system must con-
tend with a more rapid VCC fall time (such as when the
main battery is disconnected, when a DC-DC converter
shuts down, or when a high-side switch is opened dur-
ing normal operation), use capacitance on the VCC line
to provide time to execute the shutdown routine (Figure
3). First calculate the worst-case time required for the
system to perform its shutdown routine. Then, with
worst-case shutdown time, worst-case load current,
and minimum low-line to reset threshold (VLR(min)),
VRESET
VLOWLINE
VCC
VRESET
(MAX801)
VCE OUT
(MAX808)
VRST VLL
tRP
tRP
VBATT
SHOWN FOR VCC = 0V to 5V, VBATT = 2.8V, CE IN = GND
Figure 2a. Timing Diagram, V
CC
Rising
VRESET
VLOWLINE
VCC
VRESET
(MAX801)
VCE OUT
(MAX808)
VRST
VRST + VLR
VBATT
tRCE
tRD
tRD
tLL
SHOWN FOR VCC = 5V to 0V, VBATT = 2.8V, CE IN = GND
Figure 2b. Timing Diagram, V
CC
Falling
calculate the amount of capacitance required to allow
the shutdown routine to complete before reset is
asserted:
CHOLD = (ILOAD x tSHDN) / (VLR(min))
where tSHDN is the time required for the system to com-
plete the shutdown routine (including the VCC to low-
line propagation delay), ILOAD is the current being
drained from the capacitor, and VLR is the low-line to
reset threshold.
Output Supply Voltage
The output supply (OUT) transfers power from VCC or
BATT to the µP, RAM, and other external circuitry. At
the maximum source current of 250mA, VOUT will typi-
cally be 220mV below VCC. Decouple OUT with a 0.1µF
capacitor to ground.
Battery-Backup Mode
Battery-backup mode preserves the contents of RAM in
the event of a brownout or power failure. With a backup
battery installed at BATT, the MAX801/MAX808 automati-
cally switches RAM to backup power when VCC falls.
Two conditions are required for switchover to battery-
backup mode: 1) V CC must be below the reset threshold;
2) VCC must be below VBATT. Table 1 lists the status of
inputs and outputs during battery-backup mode.
BATT is designed to conduct up to 20mA to OUT dur-
ing battery backup. The PMOS switch on-resistance is
approximately 12Ω. Figure 4 shows the two series pass
elements (between the BATT input and OUT) that
facilitate UL recognition. VBATT can exceed VCC during
normal operation without causing a reset.
MAX801L/M/N, MAX808L/M/N
8-Pin µP Supervisory Circuits
with ±1.5% Reset Accuracy
_______________________________________________________________________________________ 9
GND
VCC TO µP NMI
CHOLD
CHOLD > ILOAD x tSHDN
VLR
4.5V to 5.5V LOWLINE
MAX801
MAX808
REGULATOR
Figure 3. Using LOWLINE to Provide a Power-Fail Warning to
the µP
MAX801
MAX808
P
PP
OUT
VCC
BATT
0.1µF
CONTROL
CIRCUITRY
Figure 4. V
CC
and BATT to OUT Switch
RESET Logic low33
RESET Logic high; the open-circuit
voltage is equal to VCC.
—
VCC
PIN
5
GND
LOWLINE
Ground—0V reference for
all signals
44
WDI WDI is ignored and goes
high impedance.
—6
BATT Supply current is 1µA max for
VBATT ≤2.8V.
77
CE IN
CE OUT
High impedance (MAX808)6—
Logic high. The open-circuit
output voltage is equal to
VBATT (MAX808).
5—
OUT OUT is connected to BATT
through two internal PMOS
switches in series.
NAME
88
Battery switchover
comparator monitors VCC
for active switchover.
11
Logic low22
MAX801 MAX808 STATUS
Table 1. Input and Output Status in
Battery-Backup Mode
MAX801L/M/N, MAX808L/M/N
MAX801 Watchdog Timer
The watchdog monitors the µP’s activity. If the µP does
not toggle the watchdog input (WDI) within 1.6sec,
reset asserts for the reset timeout period. The internal
1.6sec timer is cleared when reset asserts or when a
transition (low-to-high or high-to-low) occurs at WDI
while reset is not asserted. The timer remains cleared
and does not count as long as reset is asserted. It
starts counting as soon as reset is released (Figure 5).
Supply current is typically reduced by 10µA when WDI
is at a valid logic level. To disable the watchdog func-
tion, leave WDI unconnected. An internal voltage
divider sets WDI to about mid-supply, disabling the
watchdog timer/counter.
MAX808 Chip-Enable Gating
The MAX808 provides internal gating of chip-enable
(CE) signals to prevent erroneous data from corrupting
CMOS RAM in the event of a power failure. During nor-
mal operation, the CE gate is enabled and passes all
CE transitions. When reset is asserted, this path
becomes disabled, preventing erroneous data from
corrupting the CMOS RAM. The MAX808 uses a series
transmission gate from the chip-enable input (CE IN) to
the chip-enable output (CE OUT) (Figure 1). The 8ns
max chip-enable propagation from CE IN to CE OUT
enables the MAX808 to be used with most µPs.
The MAX808 also features write-cycle-completion cir-
cuitry. If VCC falls below the reset threshold while the
µP is writing to RAM, the MAX808 holds the CE gate
enabled for 18µs to allow the µP to complete the write
instruction. If the write cycle has not completed by the
end of the 18µs period, the CE transmission gate turns
off and CE OUT goes high. If the µP completes the
write instruction during the 18µs period, the CE gate
turns off (high impedance) and CE OUT goes high as
soon as the µP pulls CE IN high. CE OUT remains high,
even if CE IN falls low for any reason (Figure 6).
Chip-Enable Input
CE IN is high impedance (disabled mode) while reset is
asserted. During a power-down sequence when VCC
passes the reset threshold, the CE transmission gate
disables. CE IN becomes high impedance 18µs after
reset asserts, provided CE IN is still low. If the µP com-
pletes the write instruction during the 18µs period, the
CE gate turns off. CE IN becomes high impedance as
soon as the µP pulls CE IN high. CE IN remains high
impedance even if the signal at CE IN falls low (Figure
6). During a power-up sequence, CE IN remains high
impedance (regardless of CE IN activity) until reset is
deasserted following the reset timeout period.
In high-impedance mode, the leakage currents into this
input are ±1µA max over temperature. In low-imped-
ance mode, the impedance of CE IN appears as a 75Ω
resistor in series with the load at CE OUT.
The propagation delay through the CE transmission
gate depends on both the source impedance of the
drive to CE IN and the capacitive loading on CE OUT
(see the Chip-Enable Propagation Delay vs. CE OUT
Load Capacitance graph in the
Typical Operating
Characteristics
). The CE propagation delay is produc-
tion tested from the 50% point on CE IN to the 50%
point on CE OUT using a 50Ωdriver and 50pF of load
capacitance (Figure 7). For minimum propagation
delay, minimize the capacitive load at CE OUT and use
a low-output-impedance driver.
8-Pin µP Supervisory Circuits
with ±1.5% Reset Accuracy
10 ______________________________________________________________________________________
VCC
RESET
WDI
tRP
tRP tWD
Figure 5. Watchdog Timing
VCC
CE IN
RESET
THRESHOLD
CE OUT
RESET
17µs
18µs18µs
17µs
Figure 6. Chip-Enable Timing
Chip-Enable Output
In enabled mode, CE OUT’s impedance is equivalent to
75Ωin series with the source driving CE IN. In disabled
mode, the 75Ωtransmission gate is off and CE OUT is
actively pulled to the higher of VCC or VBATT. The
source turns off when the transmission gate is enabled.
__________Applications Information
The MAX801/MAX808 are not short-circuit protected.
Shorting OUT to ground, other than power-up transients
such as charging a decoupling capacitor, may destroy
the device. If long leads connect to the IC’s inputs,
ensure that these lines are free from ringing and other
conditions that would forward bias the IC’s protection
diodes. Bypass OUT, VCC, and BATT with 0.1µF
capacitors to GND.
The MAX801/MAX808 operate in two distinct modes:
1) Normal Operating Mode, with all circuitry powered
up. Typical supply current from VCC is 68µA (48µA
for the MAX808), while only leakage currents flow
from the battery.
2) Battery-Backup Mode, where VCC is below VBATT
and VRST. The supply current from the battery is typ-
ically less than 1µA.
Using SuperCaps™ or MaxCaps™
with the MAX801/MAX808
BATT has the same operating voltage range as VCC, and
the battery-switchover threshold voltage is typically
VBATT when VCC is decreasing or VBATT + 0.05V when
VCC is increasing. This hysteresis allows use of a
SuperCap (e.g., around 0.47F) and a simple charging
circuit as a backup source (Figure 8). Since VBATT can
exceed VCC while VCC is above the reset threshold, no
special precautions are needed when using these µP
supervisors with a SuperCap.
Backup-Battery Replacement
The backup battery can be disconnected while VCC is
above the reset threshold, provided BATT is bypassed
with a 0.1µF capacitor to ground. No precautions are
necessary to avoid spurious reset pulses.
Negative-Going V
CC
Transients
While issuing resets to the µP during power-up, power-
down, and brownout conditions, these supervisors are
relatively immune to short-duration, negative-going VCC
transients (glitches). It is usually undesirable to reset
the µP when VCC experiences only small glitches.
The
Typical Operating Characteristics
show a graph of
Maximum Transient Duration vs. Reset Threshold
Overdrive, for which reset pulses are not generated.
The graph was produced using negative-going VCC
pulses, starting at 5V and ending below the reset
threshold by the magnitude indicated (reset compara-
tor overdrive). The graph shows the maximum pulse
width that a negative-going VCC transient may typically
have without causing a reset pulse to be issued. As the
amplitude of the transient increases (i.e., goes farther
below the reset threshold), the maximum allowable
pulse width decreases. Typically, a VCC transient that
goes 40mV below the reset threshold and lasts for 3µs
or less will not cause a reset pulse to be issued. A
0.1µF bypass capacitor mounted close to the VCC pin
provides additional transient immunity.
MAX801L/M/N, MAX808L/M/N
8-Pin µP Supervisory Circuits
with ±1.5% Reset Accuracy
______________________________________________________________________________________ 11
MAX808
CE IN
50pF CLOAD
CE OUT
GND
VRST(max)
50Ω DRIVER
VCC
Figure 7. MAX808 CE Gate Test Circuit
MAX801
MAX808
0.47F
1N4148
+5V
VCC
GND
BATT OUT
Figure 8. Using the MAX801/MAX808 with a SuperCap
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12
__________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600
© 1996 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
MAX801L/M/N, MAX808L/M/N
8-Pin µP Supervisory Circuits
with ±1.5% Reset Accuracy
Watchdog Software Considerations
To help the watchdog timer keep a closer watch on
software execution, you can set and reset the watch-
dog input at different points in the program, rather than
“pulsing” the watchdog input high-low-high or low-high-
low. This technique avoids a “stuck” loop, where the
watchdog timer continues to be reset within the loop,
keeping the watchdog from timing out.
Figure 9 shows a sample flow diagram where the I/O
driving the watchdog input is set high at the beginning
of the program, low at the beginning of every subrou-
tine or loop, then high again when the program returns
to the beginning. If the program should “hang” in any
subroutine, the I/O would be continually set low and the
watchdog timer would be allowed to time out, causing a
reset or interrupt to be issued.
Maximum V
CC
Fall Time
The VCC fall time is limited by the propagation delay of
the battery switchover comparator and should not
exceed 0.03V/µs. A standard rule for filter capacitance
on most regulators is around 100µF per Ampere of cur-
rent. When the power supply is shut off or the main bat-
tery is disconnected, the associated initial VCC fall rate
is just the inverse, or 1A/100µF = 0.01V/µs.
START
SET
WDI
LOW
SUBROUTINE
OR PROGRAM LOOP,
SET WDI
HIGH
RETURN
END
Figure 9. Watchdog Flow Diagram
_________________Pin Configurations
WDI
RESET
RESET
GND
1
2
8
7
OUT
BATT
LOWLINE
VCC
MAX801
DIP/SO
3
4
6
5
CE IN
RESET
CE OUT
GND
1
2
8
7
OUT
BATT
LOWLINE
VCC
MAX808
DIP/SO
TOP VIEW
3
4
6
5
___________________Chip Information
TRANSISTOR COUNT: 922
