54F169LMQB. - NATIONAL SEMICONDUCTOR

54F169,74F169

54F169 74F169 4-Stage Synchronous Bidirectional Counter

Literature Number: SNOS161A

TL/F/9488

54F/74F169 4-Stage Synchronous Bidirectional Counter

November 1994

54F/74F169

4-Stage Synchronous Bidirectional Counter

General Description

The ’F169 is a fully synchronous 4-stage up/down counter.

The ’F169 is a modulo-16 binary counter. Features a preset

capability for programmable operation, carry lookahead for

easy cascading and a U/D input to control the direction of

counting. All state changes, whether in counting or parallel

loading, are initiated by the LOW-to-HIGH transition of the

clock.

Features

YAsynchronous counting and loading

YBuilt-in lookahead carry capability

YPresettable for programmable operation

Commercial Military Package Package Description

Number

74F169PC N16E 16-Lead (0.300×Wide) Molded Dual-In-Line

54F169DM (Note 2) J16A 16-Lead Ceramic Dual-In-Line

74F169SC (Note 1) M16A 16-Lead (0.150×Wide) Molded Small Outline, JEDEC

74F169SJ (Note 1) M16D 16-Lead (0.300×Wide) Molded Small Outline, EIAJ

Note 1: Devices also available in 13×reel. Use suffix eSCX and SJX.

Note 2: Military grade device with environmental and burn-in processing. Use suffix eDMQB.

Logic Symbols

TL/F/9488–3

IEEE/IEC

’F169

TL/F/9488–9

TRI-STATEÉis a registered trademark of National Semiconductor Corporation.

C1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

Obsolete

Connection Diagrams

Pin Assignment for

DIP, SOIC and Flatpak

TL/F/9488–1

Pin Assignment

for LCC

TL/F/9488–2

Unit Loading/Fan Out

54F/74F

Pin Names Description U.L. Input IIH/IIL

HIGH/LOW Output IOH/IOL

CEP Count Enable Parallel Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA

CET Count Enable Trickle Input (Active LOW) 1.0/2.0 20 mA/b1.2 mA

CP Clock Pulse Input (Active Rising Edge) 1.0/1.0 20 mA/b0.6 mA

P0–P3Parallel Data Inputs 1.0/1.0 20 mA/b0.6 mA

PE Parallel Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA

U/D Up-Down Count Control Input 1.0/1.0 20 mA/b0.6 mA

Q0–Q3Flip-Flop Outputs 50/33.3 b1 mA/20 mA

TC Terminal Count Output (Active LOW) 50/33.3 b1 mA/20 mA

Functional Description

The ’F169 uses edge-triggered J-K type flip-flops and has

no constraints on changing the control or data input signals

in either state of the clock. The only requirement is that the

various inputs attain the desired state at least a setup time

before the rising edge of the clock and remain valid for the

recommended hold time thereafter. The parallel load opera-

tion takes precedence over other operations, as indicated in

the Mode Select Table. When PE is LOW, the data on the

P0–P3inputs enters the flip-flops on the next rising edge of

the clock. In order for counting to occur, both CEP and CET

must be LOW and PE must be HIGH; the U/D input then

determines the direction of counting. The Terminal Count

(TC) output is normally HIGH and goes LOW, provided that

CET is LOW, when a counter reaches zero in the Count

Down mode or reaches 15 for the ’F169 in the Count Up

mode. The TC output state is not a function of the Count

Enable Parallel (CEP) input level. Since the TC signal is de-

rived by decoding the flip-flop states, there exists the possi-

bility of decoding spikes on TC. For this reason the use of

TC as a clock signal is not recommended (see logic equa-

tions below).

1) Count Enable eCEP #CET #PE

2) Up: (’F169): TC eQ0#Q1#Q2#Q3#(Up) #CET

3) Down: TC eQ0#Q1#Q2#Q3#(Down) #CET

Obsolete

Logic Diagram

’F169

TL/F/9488–5

Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Mode Select Table

PE CEP CET U/D Action on Rising

Clock Edge

HeHIGH Voltage Level

L X X X Load (Pn

Qn)LeLOW Voltage Level

H L L H Count Up (Increment) XeImmaterial

H L L L Count Down (Decrement)

H H X X No Change (Hold)

H X H X No Change (Hold)

State Diagram

’F169

TL/F/9488–7

Obsolete

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales

Office/Distributors for availability and specifications.

Storage Temperature b65§Ctoa

150§C

Ambient Temperature under Bias b55§Ctoa

125§C

Junction Temperature under Bias b55§Ctoa

175§C

Plastic b55§Ctoa

150§C

VCC Pin Potential to

Ground Pin b0.5V to a7.0V

Input Voltage (Note 2) b0.5V to a7.0V

Input Current (Note 2) b30 mA to a5.0 mA

Voltage Applied to Output

in HIGH State (with VCC e0V)

Standard Output b0.5V to VCC

TRI-STATEÉOutput b0.5V to a5.5V

Current Applied to Output

in LOW State (Max) twice the rated IOL (mA)

Note 1: Absolute maximum ratings are values beyond which the device may

be damaged or have its useful life impaired. Functional operation under

these conditions is not implied.

Note 2: Either voltage limit or current limit is sufficient to protect inputs.

Recommended Operating

Conditions

Free Air Ambient Temperature

Military b55§Ctoa

125§C

Commercial 0§Ctoa

70§C

Supply Voltage

Military a4.5V to a5.5V

Commercial a4.5V to a5.5V

DC Electrical Characteristics

Symbol Parameter 54F/74F Units VCC Conditions

Min Typ Max

VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal

VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal

VCD Input Clamp Diode Voltage b1.2 V Min IIN eb

18 mA

VOH Output HIGH 54F 10% VCC 2.5 IOH eb

1mA

Voltage 74F 10% VCC 2.5 V Min IOH eb

1mA

74F 5% VCC 2.7 IOH eb

1mA

OL Output LOW 54F 10% VCC 0.5 V Min IOL e20 mA

Voltage 74F 10% VCC 0.5 IOL e20 mA

IIH Input HIGH 54F 20.0

mA Max VIN e2.7V

Current 74F 5.0

IBVI Input HIGH Current 54F 100

mA Max VIN e7.0V

Breakdown Test 74F 7.0

ICEX Output HIGH 54F 250

mA Max VOUT eVCC

Leakage Current 74F 50

VID Input Leakage 74F 4.75 V 0.0 IID e1.9 mA

Test All Other Pins Grounded

IOD Output Leakage 74F 3.75 mA 0.0 VIOD e150 mV

Circuit Current All Other Pins Grounded

IIL Input LOW Current b0.6 mA Max VIN e0.5V (except CET)

b1.2 VIN e0.5V (CET)

IOS Output Short-Circuit Current b60 b150 mA Max VOUT e0V

ICCL Power Supply Current 35 52 mA Max VOeLOW

Obsolete

’F169

AC Electrical Characteristics

74F 54F 74F

TAea

25§CTA,V

CC eMil TA,V

CC eCom

Symbol Parameter VCC ea

5.0V CLe50 pF CLe50 pF Units

CLe50 pF

Min Typ Max Min Max Min Max

fmax Maximum Count Frequency 90 60 70 MHz

tPLH Propagation Delay 3.0 6.5 8.5 3.0 12.0 3.0 9.5 ns

tPHL CP to Qn(PE HIGH or LOW) 4.0 9.0 11.5 4.0 16.0 4.0 13.0

tPLH Propagation Delay 5.5 12.0 15.5 5.5 20.0 5.5 17.5 ns

tPHL CP to TC 4.0 8.5 12.5 4.0 15.0 4.0 13.0

tPLH Propagation Delay 2.5 4.5 6.5 2.5 9.0 2.5 7.0 ns

tPHL CET to TC 2.5 8.5 11.0 2.5 12.0 2.5 12.0

tPLH Propagation Delay 3.5 8.5 11.5 3.5 16.0 3.5 12.5 ns

tPHL U/D to TC 4.0 8.0 12.0 4.0 14.0 4.0 13.0

AC Operating Requirements

74F 54F 74F

Symbol Parameter TAea

25§CTA,V

CC eMil TA,V

CC eCom Units

VCC ea

5.0V

Min Max Min Max Min Max

ts(H) Setup Time, HIGH or LOW 4.0 4.5 4.5

ts(L) Pnto CP 4.0 4.5 4.5 ns

th(H) Hold Time, HIGH or LOW 3.0 3.5 3.5

th(L) Pnto CP 3.0 3.5 3.5

ts(H) Setup Time, HIGH or LOW 7.0 8.0 8.0

ts(L) CEP or CET to CP 5.0 8.0 6.5 ns

th(H) Hold Time, HIGH or LOW 0 0 0

th(L) CEP or CET to CP 0.5 1.0 0.5

ts(H) Setup Time, HIGH or LOW 8.0 10.0 9.0

ts(L) PE to CP 8.0 10.0 9.0 ns

th(H) Hold Time, HIGH or LOW 1.0 1.0 1.0

th(L) PE to CP 0 0 0

ts(H) Setup Time, HIGH or LOW 11.0 14.0 12.5

ts(L) U/D to CP 7.0 12.0 8.5 ns

th(H) Hold Time, HIGH or LOW 0 0 0

th(L) U/D to CP 0 0 0

tw(H) CP Pulse Width 4.0 6.0 4.5 ns

tw(L) HIGH or LOW 7.0 9.0 8.0

Obsolete

Ordering Information

The device number is used to form part of a simplified purchasing code where the package type and temperature range are

defined as follows:

74F 169 S C X

Temperature Range Family Special Variations

74F eCommercial X eDevices shipped in 13×reels

54F eMilitary QB eMilitary grade device with

environmental and burn-in

Device Type processing shipped in tubes

Package Code Temperature Range

PePlastic DIP CeCommercial (0§Ctoa

70§C)

DeCeramic DIP MeMilitary (b55§Ctoa

125§C)

SeSmall Outline Package SOIC JEDEC

SJ eSmall Outline SOIC EIAJ

Physical Dimensions inches (millimeters)

16-Lead Ceramic Dual-In-Line Package (D)

NS Package Number J16A

Obsolete

Physical Dimensions inches (millimeters) (Continued)

16-Lead (0.150×Wide) Molded Small Outline Package, JEDEC (S)

NS Package Number M16A

16-Lead (0.300×Wide) Molded Dual-In-Line Package (P)

NS Package Number N16E

Obsolete

54F/74F169 4-Stage Synchronous Bidirectional Counter

Physical Dimensions inches (millimeters) (Continued)

16-Lead (0.300×Wide) Molded Small Outline Package, EIAJ (SJ)

NS Package Number M16D

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Obsolete

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