PIC SERIES MICRO- COMPUTER OPTIONS EXTENDED TEMPERATURE RANGE PIC series microcomputers are available in two temperature ranges. The preceding data sheets describe the commercial grade device, 0C to 70C centigrade. An industrial/automotive temperature range version is available. The 40 to 85 centigrade option is specified with the addition of a suffix, |, to the part number. The specifications for these devices differ from their commercial grade counterparts in a few electrical parameters, typically interface voltage/current levels. Refer to the data sheets for detaiis. OPEN DRAIN OPTIONS PIC1650A, PIC 1670 Open-Drain 1/0 Ports Any or alt of the 1/0 lines may be specified by the customer to be open drain, thatis, the internal pull-up device will be removed. This enables the outputs to be pulled up to +10.0V maximum with an external pull-up resistor, allowing easy interface to external devi- ces requiring a logic one level greater than Vpp of the PIC. In the logic one state, the leakage current of the I/O port is + 5yA, maximum. The customer shall specify on the PIC Series Order Form the pin number and port name (e.g., RB3") of each port required to be open drain. PIC1655A, PIC 1656 Open Drain I/O, Input and Output Ports Any or all of the I/O, input only or output only lines may be specified by the customer to be open drain, that is, the internal pull-up device will be removed. This enables the outputs to be putled up to +10.0V maximum with an external pull-up register, allowing easy interface to external devices requiring a logic one level greater than Vpp of the PIC. In the logic one state, the leakage current of the I/O port is t5yA, maximum. The customer shall specify on the PIC Series Order Form the pin number and port name (e.g., "RB3) of each port required to be open drain. PIC16C55 Input-only, Output-onily and I/O Ports Any or all of the input-only and I/O lines may be specified to have an internal pull-up resistor inserted via a mask option. This allows easy interface to an external transistor or switch without the need for an external pull-up resistor. Furthermore, any or all of the output-only or I/O pull-down transistors can be specified to be removed via a mask option. This facilitates interfacing with exter- nal circuitry which has signal swings below Vgg. In this case the maximum voltage permitted to be applied to the pin is 12V with respect to Vop. PIC1654 Optional Internal Connection to RTCC A mask option wiil allow an internal clock signal whose period is equal to the instruction execution time to drive the real time clock/counter register. In this mode, transitions in the RTCC pin will be disregarded. PIC1655XT Prescaler Division Ratio A mask option will allow the division ratio of the RTCC prescaler to be selected as 1, 2, 4, 8 or 16. Consult the data sheet for the details. 4-139 AR US[a= wey ceed 2 a = cos) oO So = =) bs PIC1655A 8 Bit Microcomputer FEATURES w User programmable Intelligent controller for stand-alone applications 32 8-bit RAM registers 512 x 12-bit program ROM Arithmetic Logic Unit Real Time Clock/Counter Self-contained oscillator Access to RAM registers inherent in instruction Wide power supply operating range (4.5V to 7.0V) Available in two temperature ranges: 0 to 70C and 40 to 85C @ 4 inputs, 8 outputs, 8 bi-directional |/O lines @ 2 level stack for subroutine nesting DESCRIPTION The PIC1655A microcomputer is an MOS/LSI device containing RAM, \/O, and a central processing unit as well as customer- defined ROM on a single chip. This combination produces a low cost solution for applications which require sensing individual inputs and controlling individual outputs. Keyboard scanning, dis- play driving, and other system control functions can be done at the same time due to the power of the 8-bit CPU. The internal ROM contains a customer-defined program using the PICs powerful instruction set to specify the overall functional characteristics of the device. The 8-bit input/output registers provide latched lines for interfacing to a limitless variety of appli- cations. The PIC can be used to scan keyboards, drive displays, control electronic games and provide enhanced capabilities to vending machines, traffic jights, radios, television, consumer appliances, industrial timing and control applications. The 12-bit instruction word format provides a powerful yet easy to use instruction repertoire emphasizing single bit manipulation as well as logical and arithmetic operations using bytes. The PIC1655A is fabricated with N-Channel lon Implant technol- ogy resulting in a high performance product with proven retiabil- ity and production history. Only a single wide range power supply is required for operation, and an on-chip oscillator provides the operating clock with only an external RC network (or buffered crystal oscillator signal, for greater accuracy) to establish the frequency. Inputs and outputs are TTL-compatible. Extensive hardware and software support is available to aid the user in developing an application program and to verify perfor- mance before committing to mask tooling. Programs can be assembled into machine language using PICAL, eliminating the burden of cading with ones and zeros. PICAL is available in a Fortran {V version that can be run on many popular computer systems. Once the application program is developed several options are available to insure proper performance. The PICs operation can be verified in any hardware application by using the PIC1664. The PIC1664 is a ROM-less PIC microcomputer with additional pins to connect external PROM or RAM and to accept HALT commands. The PF01000 Field Demo System is available containing a PIC1664 with sockets for erasable CMOS PROMs. Finally, the PICES II (PIC In-Circuit Emulation System) provides the user with emulation and debugging capability in either a stand-alone mode or operation as a peripheral to a larger computer system. Easy program debugging and changing is facilitated because the user's program is stored in RAM. With these development tools, the user can quickly and confidently order the masking of the PICs ROM and bring his application into the market. APIC Series Microcomputer Data Manual is available which gives additional detailed data on PIC based system design. PICIGSSA BLOCK DIAGRAM GENERAL & FILE SELECT $ = 4 : Sf REGISTER < Ke-y4> Aro. ISTER W REGISTER rea) 7 FILES (F10-F37} 5 . Ae S ARITHMETIC ] 2 Locic oo (><> ABO-7 UNIT 9 c Ve 2 LEVEL STACK INSTRUCTION ATCC REG en | DECODE = STATUS REG (F3) r & ad 8 CONTROL RCO-7 9 al? w Cc CNTR. PROG. CNTR. (F2) ne 4 PROGRAM ROM 812 x 12 ATCC MCLA 4-38ARCHITECTURAL DESCRIPTION The firmware architecture of the PIC series microcomputer is based on a register file concept with simple yet powerful com- mands designed to emphasize bit, byte, and register transfer operations. The instruction set also supports computing functions as welt as these control and interface junctions. Internally, the PIC is composed of three functional elements can- nected together by a single bidirectional bus: the Register File composed of 32 addressable 8-bit registers, an Arithmetic Logic Unit, and a user-defined Program ROM composed of 512 words each 12 bits in width. The Register File is divided into two func- tional groups: operational registers and general registers. The operational registers include, among others, the Real Time Clock Counter Register, the Program Counter (PC), the Status Register, PIC1655A INSTROMENT and the I/O Registers. The general purpose registers are used for data and control information under command of the instructions. The Arithmetic Logic Unit contains one temporary working regis- ter or accumulator (W Register) and gating to perform Boolean functions between data held in the working register and any file register. The Program ROM contains the operational program for the rest of the logic within the controller. Sequencing of microinstructions is controlled via the Program Counter (PC) which automatically increments to execute in-line programs. Program control opera- tions can be performed by Bit Test and Skip instructions, Jump instructions, Call instructions, or by ioading computed addresses PIN FUNCTIONS into the PC. in addition, an on-chip two-level stack is employed to provide easy to use subroutine nesting. Activating the MCLR input on power up initializes the ROM program to address 777,. Signal Function OSC (input) Oscillator input. This signal can be driven by an external oscillator if a precise frequency of operation is required or an external RC network can be used to set the frequency of operation of the internal clock generator. This is a Schmitt trigger input. RTCC (input) Real Time Clock Counter. Used by the microprogram to keep track of elapsed time between RAO-3 (input) RBO-7 (output) RCO-7 (input/output) MCLR (input) CLK OUT (output) TEST events. The RTCC register increments on falling edges applied to this pin. This register can be loaded and read by the program. This is a Schmitt trigger input. 4 input lines. 8 output lines. 8 user programmable input/output lines. Master Clear. Used to initialize the internal ROM program to address 777s and latch all 1/O register high. Should be held low at least 1ms past the time when the power supply is valid. This is a Schmitt trigger input. A signal derived from the internat oscillator. Used by external devices to synchronize them- selves to PIC timing. Used for testing purposes only. Must be grounded for normal operation. Primary power supply. Output Buffer power supply. Used to enhance output current sinking capability. Ground PIN CONFIGURATION 28 LEAD DUAL IN LINE atcc de: 28 cin < Voo O (] 2 > Vy 43 26) cLKOUT > > ve, 4 250) Rc7 <> > test 5 24D ace<> > RAO 6 2310 ACh <> > Rai 7 22) Roa<> > RA2 8 210 racae> > Ras C9 20) rcz<> <- rBo 10 190) Ro1<e> < RABI 1 18) RCO <> < RB2 12 17D R87 > < Re3 13 160 ABs > < Res O14 15 Res > 4-39 oc uu ie ame a = pom] QoQ jou] fo ang 2 Psfom ud Ee a} = = i) {ae} oS oc = pi INSTRUMENT PIGI655A REGISTER FILE ARRANGEMENT File . (Octal) Function FO Not a physically implemented register. FO calls for the contents of the Fite Select Register (low order 5 bits) to be used to select a file register. FO is thus useful as an indirect address pointer. For example, W+F0-W will add the contents of the file register pointed to by the FSR (F4) to W and place the result in W. F1 Real Time Clock Counter Register. This register can be loaded and read by the microprogram. The RTCC register keeps counting up after zero is reached. The counter increments on the falling edge of the input RTCC. However, if data are being stored in the RTCC register simultaneously with a negative transition on the RTCC pin, the RTCC register will contain the new stored value and the external transition will be ignored by the microcomputer. F2 Program Counter (PC). The PC is automatically incremented during each instruction cycle, and can be written into under program control (MOVWF F2). The PC is nine bits wide, but only its tow order 8 bits can be read under program control. F3 Status Word Register. F3 can be altered under program control only via bit set, bit clear, or MOVWF F3 instruction. (7) (6) (5) (4) (3) (2) (1) (0) (a [rt [1 71 [ 1 [ z [oe |] c | C (Carry): For ADD and SUB instructions, this bit is set if there is a carry out from the most significant bit of the resuitant. For ROTATE instructions, this bit is loaded with either the high or low order bit of the source. DC (Digit Carry): For ADD and SUB instructions, this bit is set if there is a carry out from the 4th low order bit of the resultant. Z (Zero): Set if the result of an arithmetic operation is zero. Bits: 3-7 These bits are defined as logic ones. Fa File Select Register (FSR). Low order 5 bits only are used. The FSR is used in generating effective file register addresses under program control. When accessed as a directly addressed file, the upper 3 bits are read as ones. FS Input Register A (AO-A3) (A4-A7 defined as zeroes). F6 Output Register B (B0-B7) F7 I/O Register C (C0-C7) F10-F37 | General Purpose RegistersBasic Instruction Set Summary Each PIC instruction is a 12-bit word divided into an OP code which specifies the instruction type and one or more operands which further specify the operation of the instruction. The follow- ing PIC instruction summary lists byte-oriented, bit-oriented, and literal and controt operations. For byte-oriented instructions, f represents a file register designator and d represents a destination designator. The file register designator specifies which one of the 32 PIC file registers is to be utitized by the instruction. The destination designator specifies where the result of the operation performed by the instruction is to be placed. If d" is zero, the result is placed in the BYTE-ORIENTED FILE REGISTER OPERATIONS (11-6) OP CODE | | PICI655A | nt | PIC W register. If d is one, the result is returned to the file register specified in the instruction. For bit-oriented instructions, b represents a bit field designator which selects the number of the bit affected by the operation, while f represents the number of the file in which the bit is located. For literal and control operations, k represents an eight or nine bit constant or literal value. For an oscillator frequency of 1MHz the instruction execution time is 4 ysec, unless a conditional test is true or the program counter is changed as a result of an instruction. In these two cases, the instruction execution time is 8 ysec. (4-0) t (FILE #) | (5) For d = 0, f--W (PICAL accepts d = 0 or d = W in the mnemonic) d=1,f-~f (lf dis omitted, assembler assigns d = 1.) instruction-Binary (Octal) Name Mnemonic, Operands Operation Status Affected 000 000 000 000 (0000) No Operation NOP _ - None ooo ooo iff fff (0040) Move W to f (Note 1) MOVWF f W-f None 000 001 000 000 (0100) Clear W CLRW _ O-W Zz 000 001 ff fff (0140) Clear t CLRF f o-f _ Zz 000 010 dff fff (0200) Subtract W from ft SUBWF fd f - Wed [f+W+1-d] C,0C,2 000 O11 dff fff (0300) Decrement f DECF f,d f-1-d z 000 100 dff fff (0400) Inclusive OR W and f JORWF f,d WVf-d Zz 000 101 dff fff (0500) AND W and f ANDWF f,d Wef-d Zz 000 110 dftt tft (0600) Exclusive OR Wandt XORWF td Wet-d Zz 000 111 dff fff (0700) Add W and f ADDWF td W-+f-d C,0C.Z 001 O00 dff fff (1000) Move f MOVF f,d f-d Zz 001 001 diff fff (1100) Complement f COMF fd f-d Zz 001 O10 dftf fff (4200) Increment f INCF f,d t+1~d Zz 001 O11 dtf fff (1300) Decrement t, Skip if Zero DECFSZ td f- 1--d, skip if Zero None 001 100 dff fff (1400) Rotate Right f RRF f,d f(n)d(n-1), f(0)-C, C--d(7) c 001 101 dff fff (1500) Rotate Left f RLF f,d f(n)-d(n+1), f(7)-C, C--d (0) Cc 001 110 dff fff (1600) Swap halves f SWAPF f,d (0-3) (4-7)d None 001 111 dff fff (1700) Increment f, Skip if Zero INCFSZ f,d f+1d, skip if zero None BIT-ORIENTED (11-8) (7-5) (4-0) ec FILE REGISTER aod _ OPERATIONS op cope | b(BITs#)| 1 (FILE #) = instruction-Binary (Octal) Name Mnemonic, Operands Operation Status Affected = 010 Obb bff fff (2000) Bit Clear f BCF f,b O--f(b) None = 010 1bb bff fff (2400) Bit Setf BSF fb 1f(b) None S O11 Obb bff fff (3000) Bit Test f, Skip if Clear BTFSC f,b Bit Test f(b): skip if clear None = O11 1bb bff fff (3400) Bit Test f, Skip if Set BTFSS f,b Bit Test f(b): skip is set None (11-8) (7-0) LITERAL AND CONTROL [. OPERATIONS OP CODE k (LITERAL) Instruction-Binary (Octal) Name Mr ic, Op d Operati: Status Affected 100 Okk kkk kkk (4000) Return and place Literal in W RETLW k k-W, Stack~PC None 100 1kk kkk kkk (4400) Call subroutine (Note 1) CALL k PC+1 Stack, k PC None 101 kkk kkk kkk (5000) Go To address {k is 9 bits) GOTO k k~PC None 110 Okk kkk kkk (6000) Move Literal to W MOVLW k k-W None 110 tkk kkk kkk (6400) inclusive OR Literal and W 1ORLW k KVW-W z 111 Okk kkk kkk (7000) AND Literal and W ANDLW k keW-W Zz 1171 1kk Kkk kkk (7400) Exciusive OR Literal and W XORLW k kOW-W Zz NOTES: 1. The 9th bit of the program counter in the PIC is zero tor a CALL and a MOVWE F2. Therefore, subroutines must be located in program memory locations 0-377,. However, subroutines can be called from anywhere in the program memory since the Stack is 9 bits wide. 2. Whenan I/O register is modified as a function of itself, the value used will be that value present on the output pins. For example, an output pin which has been latched high but is driven low by an external device, will be relatched in the low state. 4-41[=a Lu om a. 4 fon] qo oe co =] Pd INsTROMENT PIC1655A SUPPLEMENTAL INSTRUCTION SET SUMMARY The following supplemental instructions summarized below represent specific applications of the basic PIC instructions. For example, the "CLEAR CARRY supplemental instruction is equiv- alent to the basic instruction BCF 3,0 (Bit Clear, File 3, Bit 0). These instruction mnemonics are recognized by the PIC Cross Assembler (PICAL). Mnemonic, Equivalent Status Instruction-Binary (Octal) Name Operands Operation(s) Affected 010 000 000 011 (2003) Clear Carry CLRC BCF 3, 0 - 010 100 000 011 (2403) Set Carry SETC BSF 3, 0 _ 010 000 100 011 (2043) Clear Digit Carry CLRDC BCF 3, 1 _ 010 100 100 011 (2443) Set Digit Carry SETOG BSF 3, 1 _ 010 001 000 0114 (2103) Clear Zero CLRZ BCF 3, 2 _ 010 101 000 011 (2503) Set Zero SETZ BSF 3, 2 O11 100 O00 011 (3403) Skip on Carry SKPC BTFSS 3, 0 _ 011 000 000 011 (3003) Skip on No Carry SKPNC BTFSC 3, 0 _ 011 100 100 011 (3443) Skip on Digit Carry SKPDC BTFSS 3, 1 _ 041 000 100 011 (3043) Skip on No Digit Carry SKPNDC BTFSC 3, 1 _ 011 101 000 011 (3503) Skip on Zero SKPZ BTFSS 3, 2 _ 011 001 000 011 (3103) Skip on No Zero SKPNZ BTFSC 3, 2 _ 001 000 1ff fff (1040) Test File TSTF f MOVF f, 1 001 000 Off fff (1000) Move Fite to W MOVFW f MOVF f, 0 001 OO1 1ff fff (1140) Negate File NEGF f,d COMF f, 1 001 O10 dff fff (1200) INCF f, d Zz 011 000 000 011 (3003) Add Carry to File ADOCF f, d BTFSC 3,0 001 010 dff fff (1200) INCF f, d Zz 011 000 060 011 (3003) Subtract Carry from File SUBCF f,d BTFSC 3,0 000 011 dff fff {0300) DECF f, d Zz 011 000 100 O11 (3043) Add Digit Carry to File ADDDCF fd BTFSG 3,1 001 010 dff fff (1200) INCF f,d 2 011 000.100 011 (3043) Subtract Digit Carry from File SUBDCF f.d BTFSC 3,1 000 O11 dff fff (0300) DECF fd Zz 101 kkk kkk kkk (5000) Branch Bk GOTO k _ 011 000 000 011 (3003) Branch on Carry BC k BTFSC 3,0 101 kkk kkk kkk (5000) GOTO k _ 011 100 000 011 (3403) Branch on No Carry BNC k BTFSS 3,0 101 kkk kkk kkk (5000) GOTO k _ 011 100 100 011 (3043) Branch on Digit Carry BDC k BTFSC 3,1 101 kkk kkk kkk (5000) GOTO k - 011 001 000 011 (3443) Branch on No Digit Carry BNDC k BTFSS 3,1 101 kkk kkk Kkk (5000) GOTO k 011 101 000 011 (3103) Branch on Zero BZ k BTFSC 3,2 101 kkk kkk kkk (5000) GOTO k _ 011 101 000 011 (3503) Branch on No Zero BNZ k BTFSS 3,2 101 kkk kkk kkk (5000) GOTO k 1/O Interfacing The equivalent circuit for an I/O port bit is shown below as it would interface with either the input of a TTL device (PIC is outputting) or the output of an open collector TTL device (PIC is inputting). Each 1/O port bit can be individually time multiplexed between input and output functions under software control. When output- ting thru a PIC 1/O Port, the data is latched at the port and the pin 4-42 can be connected directly toa TTL gate input. When inputting data thru an I/O Port, the port latch must first be set to a high level under program control. This turns off Q,, allowing the TTL open coilec- tor device to drive the pad, pulled up by Q,, which can source a minimum of 100uA. Care, however, should be exercised when using open collector devices due to the potentially high TTL teakage current which can exist in the high logic state.PIC1655A InstHOENT TYPICAL INTERFACE-BIDIRECTIONAL I/O LINE ll he a r ---- Vex Voo 1 y Vee Dy [e ly (INTERNAL D tot DATA BUS} WRITE QO | (INTERNAL cs tet --- staat) 0, |] Leese meu MCLA jbrmamccco = | 7~ | {_ IY 1) READ 1 oy (INTERNAL | | TTL DEVICE OUTPUT SIGNAL) PIGVOBIT} | (OPEN-COLLECTOR) Bidirectional I/O Ports The bidirectional ports may be used for both input and output operations. For input operations these ports are non-latching. Any input must be present until read by an input instruction. The outputs are latched and remain unchanged until the output latch is rewritten. For use as an input port the output latch must be set in the high state. Thus the external device inputs to the PIC circuit by forcing the latched output line to the low state or keeping the latched output high. This principie is the same whether operating on individual bits or the entire port. Some instructions operate internaily as input followed by output operations. The BCF and BSF instructions, for example, read the entire portinto the CPU, execute the bit operation, and re-output the result. Caution must be used wher using these instructions. Asan example a BSF operation on bit 5 of F7 {port AC) will cause all eight bits of F7 to be read into the CPU. Then the BSF opera- tion takes place on bit 5 and F7 is re-output to the output latches. If another bit of F7 is used as an input (say bit 0) then bit 0 must be latched high. If during the BSF instruction on bit 5 an externat device is forcing bit 0 to the low state then the input/output nature of the BSF instruction will leave bit 0 latched low after execution. In this state bit 0 cannot be used as an input until it is again latched high by the programmer. Refer ta the examples below. Input Only Port: (Port RA) The input only port of the PIC1655A consists of the four LSB's of F5 (port RA). An internal pull-up device is provided so that exter- nal pull-ups on open collector logic are unnecessary. The four MSBs of this port are always read as zeroes. Output operations to F5 are not defined. Note that the BTFSC and BTFSS instructions are input only operations and so can be used with F5. Also, file register instructions which leave the results in W can be used. Output Only Port: (Port RB) The output only port of the PIC1655A consists of F6 (port RB). This port contains no input circuitry and is therefore not capable of instructions requiring an input followed by an output opera- tion. The only instructions which can validly use F6 are MOVWF and CLRF. Successive Operations on Bidirectional I/O Ports Care must be exercised if successive instructions operate on the same I/O port. The sequence of instructions should be such to allow the pin voltage to stabilize (load dependent) before the next instruction which causes that file to be read into the CPU (MOVF, BIT SET, BIT CLEAR, and BIT TEST) is executed. Otherwise, the previous state of that pin may be read into the CPU rather than the new state. This will happen if t,g (See i/O Timing Diagram) is greater than %t,, (min). When in doubt, it is better to separate these instructions with a NOP or other instruction. EXAMPLE 1: _9 = Shhh Sa ee ace EXAMPLE 2: OUTPUT INPUT OUTPUT INPUT What is thought to be happening: What could happen if an input were low: BSF 7,5 BSF 7,5 Read into CPU: 000011711 Read into CPU: 00001110 Set bit 5: 00101914 Set bit 5: 00101110 Write to F7: 00101171 Write to F7: 00101110 If no inputs were low during the instruction execution, there would be no problem. In this case bit 0 is now latched low and is no longer useful as an input until set high again. PUA LidINSTRUMENT PICIES5A ELECTRICAL CHARACTERISTICS Maximum Ratings Ambient temperature Under Bias ..........00 0 ee eee ee eeeee 126C * Exceeding these ratings could cause permanent dam- Storage Temperature .... 0. . cece renee n eee es TOO ES to +150C age to the device. This is a stress rating only and func- Voltage on any pin with Respect to Veg... .. > teeee O,3V to +10,0V tional operation of this device at these conditions is not Power Dissipation (Note 1)... . eee eee eens 1000mW impliedoperating ranges are specified in Standard . Conditions. Exposure to absolute maximum rating con- Standard Conditions (unless otherwise stated): ditions for extended periods may affect device reliability. DC CHARACTERISTICS/PIC1655A Data labeled typical is presented for design guidance Operating Temperature T, = 0C to +70C only and is not guaranteed. Characteristic Sym Min Typt Max Units Conditions Primary Supply Voltage Vop 45 _ 7.0 v Output Buffer Supply Voltage Vax 45 _ 10.0 Vv (Note 2) Primary Supply Current lop _ 30 50 mA All 1/0 pins @ Vop Output Buffer Supply Current lex - 1 5 mA All 1/0 pins @ Vop (Note 3) Input Low Voltage Vi -02 _ 0.8 v Input High Voltage (except MCLR, RTCC & OSC) Vie 2.4 _ Voo Vv Input Low-to-High Threshold Voltage (MCLR, RTCS & OSC) Vin | Voo71 2.6 Voo v Output High Voltage Von 2.4 > Vop Vv low = 100uA (Note 4) 3.5 _ Vop Vv low = 0 Output Low Voltage (I/O only) Vou _ _ 0.45 Vv lo, = 1.6MA, Vyx = 4.5V _ _ 0.90 v lo. = 5.0MA, Vyy = 4.5V _ _ 0.90 v lor = 5.0MA, Vy, = 8.0V _ - 1.20 v lop = 10.0MA, Vyxx = 8.0V - - 2.0 v lo. = 20.0MA, Vy, = 8.0V (Note 5) Output Low Voltage (CLK OUT) Vow - _ 0.45 Vv lo, = 1.6mA (Note 5) Input Leakage Current (MCLR, RTCC) luc _ +56 vA Vsg <= Vin. Voo Output Leakage Current (open drain 1/0 pins) loue _ 10 pA Ves S Vein S 10V Input Low Current (all 1/O ports) Nie 0.2 0.6 -1.6 mA Vic = 0.4V internal pullup oc i Input High Current (ali 1/O ports) lie 0.1 0.4 1.4 mA Vin = 2.4V i) Wa {Typical data is at T, = 28C, Vop = 5.0V. = Roc (a) 1. Total power dissipation for the package is calculated as follows: 4. Positive current indicates current into pin. 2 Pp= (Yoo) (Ino) + 2 (Von Viv) (El) + 2 (Vo Vor) (Toui) + 2 (Vou) Tou)- Negative current indicates current out of pin. i] The term I/O refers to all interface pins; input, output or 1/0. 5. Total Ip, for all output pins (I/O ports plus ba 2. V,, supply drives only the I/O ports. CLK OUT) must not exceed 225mA. 3. The maximum I,, current will be drawn when all I/O ports are outputting a High 4-44PICIO5S5A nsOEN | DC CHARACTERISTICS/PICI655Al Operating Temperature T, = 40C ta +85C Characteristic Sym Min Typt Max Units Conditions Primary Supply Voltage Vop 45 _ 7.0 Vv Output Buffer Supply Voltage Vex 45 - 10.0 Vv (Note 2) Primary Supply Current lbp - 30 60 mA All /O pins @ Vop Output Buffer Supply Current Vx _ 1 5 mA All 1/0 pins @ Vop (Note 3) Input Low Voltage Vin 0.2 - 0.7 Vv tnput High Voltage (except MCLR, RTCC & OSC) Viet 2.4 _ Vop Vv Input Low-to-High Threshold Voltage (MCLR, RTCC & OSC) View Voo71 2.6 Voo Vv Output High Voltage Vou 2.4 _ Voo v lon = 100uA (Note 4) lon = 0 Output Low Voltage (i/O onty) Vou - - 0.45 Vv lop = 1.6MA, Vyy = 4.5V - - 0.90 V lo, = 5.0MA, Vyy = 4.5V _ - 0.90 V lo, = 5.0MA, Vyy = 8.0V _ - 1.20 Vv lot = 10.0MA, Vy = 8.0V - - 2.0 Vv lo, = 20.0MA, Vyx = 8.0V (Note 5) Output Low Voltage (CLK OUT) Vove _ _ 0.45 Vv lo, = 1.6mA (Note 5) Input Leakage Current (MCLR, RTCC) lic 5 _ +5 HA Ves S Vin S Vp Output Leakage Current (open drain 1/O pins) lotc ~ _ 10 HA Vss & Vein & 10V Input Low Current (all [/O ports) ir 0.2 -0.6 -1.8 mA Vi. = 0.4V internal pullup Input High Current (all 1/O ports) lin -0.1 0.4 -1.8 mA Vin = 2.4V tTypical data is at T, = 25C, Vop = 5.0V. NOTES: 1. Total power dissipation for the package is calculated as follows: 4. Positive current indicates current into pin. Po = (Vop) (lop) + (Von Vn) UI!) + (Von Vou) (Toul) + 2 (Vow) (Lou): Negative current indicates current out of pin. The term I/O refers to all interface pins; input, output or I/O. 5. Total Ig, for all output pins (I/O ports plus 2. Vxx supply drives only the I/O ports. CLK OUT) must not exceed 225mA. 3. The maximum 1,, current will be drawn when all /O ports are outputting a High. fora jes} _ Standard Conditions (unless otherwise stated): z AC CHARACTERISTICS/PIC1655A, PIC 1655Al 7 Operating Temperature T, = 0C to +70C (PIC1655A), T, = 40C to +85C (PIC1655Al) 4 co] Characteristic Sym Min Typt Max Units Conditions Instruction Cycie Time toy 4 - 20 US 0.2MHz 1.0MHz external time base = (Note 1) RTCC Input Period tar ttcey+O.2Qus| _ _ High Pulse Width tetH Yatar _ _ - Low Pulse Width tat. Yate - _ _ (Notes 2 and 3) VO Ports Data Input Setup Time ts - - Mtgy-125 | ns Data Input Hold Time th 0 - _ ns Data Output Propagation Delay toa - 600 1000 ns Capacitive load = S0pF OSC Input External Input Impedance High Roscr 120 800 3500 Q Vosc = 5V Applies to external External Input Impedance Low Rosco - 10 _ Q Vosc =0.4V | OSC drive only. tTypical data is at T, = 25C, Vop = 5.0. NOTES: 1. Instruction cycle period (ty) equals four times the input oscillator time base period. 2. Due to the synchronous timing nature between CLK OUT and the sampling circuit used on the RTCC input, CLK OUT may be directiy tied to the RTCC input. 3. The maximum frequency which may be input to the TCC pin is calculated as follows: fymaxy = =~. 5 . = = _ tar cminy tev min) +0.2u8 For example: if toy = 448, f nox) = Ths = 238KHz. ees 4-45cc jw} _ = a. = oS oQ ] io = 2 3 INSTRUMENT PICI655A VO TIMING CLK OUT ~~ /\ / Gate Va annmnennd INCREMENT EXECUTE {ANSWER WRITE j~a PC < TO ADDRESS ROM INSTRUCTION vO FOR NEXT INTERNAL INSTRUCTION BUS ey Ty b<- _ | NOTE: OUTPUT | VALID Rise and fall times | are load dependent | | | om T, \ o| T, | INPUT NXiestaste | oe, | CLK OUT TIMING CLK OUT RTCC TIMING RTCC ter 40 3.0 VryResHoLo: VOLTS 2.0 5.5 6.0 6.5 Vop, VOLTS SCHMITT TRIGGER CHARACTERISTICS (RTCC, MCLR and OSC PINS) T, = 25C (TYPICAL) NOTES: 1. Low-to-High Threshold Voltage (V+.,). 2. High-to-Low Threshold Voltage (Vr). 7.0 4-46PICI655A INSHECMTER PIC1655A OSCILLATOR OPTIONS (TYPICAL CIRCUITS) RC OPTION OPERATION Vpo R(ext) TO PIC1655A PIN #27 C(ext) T 30KQ 26KQ Vop = 8.0V 22KO C = 47pF Rexr T,= 25C 18KQ 14KQ 409 60 80 100 120 140 160 180 200 220 240 260 INSTRUCTION CYCLE TIME (kHz) Oscillator Frequency With Typical Unit To Unit Variance Unit to Unit Variation at Vpp = 5.0V, Ty = 25C is +25% Variation from Vop = 4.5V 7.0V referenced to 5V is 3%, +9% Variation from T, = 0C 70C. referenced to 25C is +3%, 5% BUFFERED CRYSTAL INPUT OPERATION XTAL a] R TO OSC PIN #27 c Cc 30% < DUTY CYCLE < 70% I Lt The buffer must be capable of driving 120M, min. (800Q, typ.) to 2.0V. However, it is recommended that the pull-down transistor on the OSC pin be removed (an option) if OSC is to be driven externally. EXTERNAL CLOCK INPUT OPERATION CLOCK FROM | > O > TO OSC PIN #27 EXT. SYSTEM s 4-47 joa ee rane = a. = ao aq ao Cc 2 bsInsteUHERT PICI655A MASTER CLEAR (TYPICAL CIRCUIT) Voo < R @ R< 100K > b> TO P1C1655A MCLR PIN #28 C 7 0.1uF Master Clear requires >1.0ms delay before activation after power is applied to the Vpp pin, for the oscillator to start up. To achieve this, an external RC configuration as shown can be used (assum- ING Vpp is applied as a step function). OUTPUT SINK CURRENT GRAPH Vyx = 10 40 30 lot (mA) 20 10 [oa [Ss re ma 1.0 2.0 3.0 = Vo. (VOLTS) S lot S. Vo, TYP @ 26C [aad 4 P The Output Sink Current is dependent on the V,, supply and the output load. This chart shows the typical curves used to express the output drive capability. Vou VS lox (I/O PORTS) (TYPICAL) POWER SUPPLY CURRENT VS TEMPERATURE (TYPICAL LIMITS) 5 T T 50 Vop = Vax = 4.25V Voo:. 7.0V 4 + 40 SS aT O75MA/C 3 NS . Toe 4 30 Vou | or .08mA/C (VOLTS) F. (ma) 2 \ Ta=40C 20 \\ , 200 400 600 800 1000 ~40 Qo 40 80 120 Ton (A) TEMPERATURE (C) 4-48PIC1655A INSTROMENT POWER DISSIPATION DERATING GRAPH 1000 900 800 7090 Maximum Device 600 Dissipation (mW. pation (mW) 59 400 300 200 100 0 0 10 20 30 40 50 60 70 85 T, Ambient Temperature (C) NOTES: 1. 70C is the maximum operating temperature for standard parts. 2.85C is the maximum operating temperature for I suffix parts. NOTE 2 PICI65SA EMULATION CAUTIONS When emulating a PIC1655A using a PICES IT development sys- tem certain precautions should be taken. A. Be sure that the PICES IT Module being used is programmed for the PIC1650A mode. (Refer to the PICES Manual). The PIC 1664 contained within the module should have the MODE pin #22 set to a high state. 1. This causes the MCLR to force all I/O registers high. 2. The OSC 1 pin #59 becomes a single clock input pin. 3. The interrupt system becomes disabled and the RTCC always counts on the trailing edges. 4. Bits 3 through 7 on file register FS are all ones. B. Make sure to only use two levels of stack within the program. Cc. Make sure all I/O cautions contained in this spec sheet are used. D. Be sure to use the 28 pin socket for the module plug. E. Make sure that during an actual application the MCLR input swings from a low to high level a minimum of 1msec after the supply voltage is applied. F. If an oscillator drive is used, be sure that it can drive the 1200 input impedance of the OSC pin on the PIC 1664. G. The cable length and internal variations may cause some parameter values to differ between the PICES II module and a production PIC1655A. 4-49 joa ee) ro => a. = fons] a] S oc Lae] Pd