A62S6308A Series
Preliminary 64K X 8 BIT LOW VOLTAGE CMOS SRAM
PRELIMINARY (May, 2011, Version 0.0) AMIC Technology, Corp.
Document Title
64K X 8 BIT LOW VOLTAGE CMOS SRAM
Revision History
Rev. No. History Issue Date Remark
0.0 Initial issue May 31, 2011 Preliminary
A62S6308A Series
Preliminary 64K X 8 BIT LOW VOLTAGE CMOS SRAM
PRELIMINARY (May, 2011, Version 0.0) 1 AMIC Technology, Corp.
Features
Power supply range: 2.7V to 3.6V
Access times:55/70 ns (max.)
Current:
A62S6308A series: Operating: 30mA (max.)
Standby: 5μA (max.)
Extended operating temperature range: 0°C to 70°C
for -S series, -40°C to +85°C for -SU series
Full static operation, no clock or refreshing required
All inputs and outputs are directly TTL-compatible
Common I/O using three-state output
Output enable and two chip enable inputs for easy
application
Data retention voltage: 2V (min.)
Available in 32-pin SOP, TSOP, sTSOP (8 X
13.4mm) forward type packages
All Pb-free (Lead-free) products are RoHS compliant
General Description
The A62S6308A is a low operating current 524,288-bit
static random access memory organized as 65,536 words
by 8 bits and operates on a low power supply voltage
from 2.7V to 3.6V.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Two chip enable inputs are provided for POWER-DOWN
and a device enable and an output enable input are
included for easy interfacing.
Data retention is guaranteed at a power supply voltage as
low as 2V.
Pin Configurations
SOP TSOP/(sTSOP)
(forward type)
NC
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2I/O3GND I/O4
I/O5
I/O6
I/O7
A10
A9
A8
A13
CE2
A15
VCC
A11
A62S6308AM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
OE
CE1
WE
NC
A10
GND
OE
CE1
A62S6308AV
(A62S6308AX)
1
9
32
24
A11
A9 2
3
4
5
6
7
8
10
11
12
13
14
15
16
A8
A13
VCC
NC
A14
A12
A7
A6
A5
A4
31
30
29
28
27
26
25
23
22
21
20
19
18
17
I/O7
I/O6
I/O5
I/O4
I/O3
A0
A1
A2
A3
A15
WE
CE2
I/O2
I/O1
I/O0
~
~~
~
NC
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 2 AMIC Technology, Corp.
Block Diagram
ROW
DECODER
512 X 1024
MEMORY ARRAY
INPUT DATA
CIRCUIT SENSE AMPS
CONTROL
CIRCUIT
CE2
CE1
WE
I/O7
I/O0
A15
A14
A13
A0 VCC
GND
OE
Pin Descriptions - SOP
Pin No. Symbol Description
1,2 NC No Connection
3 - 12, 23,
25 - 28, 31 A0 - A15 Address Inputs
13 - 15,
17 - 21 I/O0 - I/O7 Data Inputs/Outputs
16 GND Ground
22 CE1 Chip Enable
24 OE Output Enable
29 WE Write Enable
30 CE2 Chip Enable
32 VCC Power Supply
Pin Description - TSOP/sTSOP
Pin No. Symbol Description
1 - 4, 7,
11 - 20, 31 A0 - A15 Address Inputs
5 WE Writ e Enable
6 CE2 Chip Enable
8 VCC Power Supply
9, 10 NC No Connection
21 - 23,
25 - 29 I/O0 - I/O7 Data Inputs/Outputs
24 GND Ground
30 CE1 Chip Enable
32 OE Output Enable
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 3 AMIC Technology, Corp.
Recommended DC Operating Conditions
(TA = 0°C to +70°C, or -40°C to +85°C)
Symbol Parameter Min. Typ. Max. Unit
VCC Supply Voltage 2.7 3.0 3.6 V
GND Ground 0 0 0 V
VIH I nput High Voltage 2.2 - VCC + 0.3 V
VIL Input Low Voltage -0.3 - +0.6 V
CL Output Load - - 30 pF
TTL Output Load - - 1 -
Absolute Maximum Ratings*
VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to + 4.6V
IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V
Operating Temperature, Topr . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . 0°C to +70°C, or -40°C to +85°C
Storage Temperature, Tstg . .. . . . . . . . -55°C to + 125°C
Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . 0.7W
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specif ication is
not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.
DC Electrical Characteristics (TA = 0°C to +70°C or -40°C to +85°C, VCC = 2.7V to 3.6V, GND = 0V)
Symbol Parameter Min. Max. Unit Conditions
⎜ILI⎥ Input Leakage Current - 1
μA VIN = GND to VCC
⎜ILO⎥ Output Leakage Current - 1 μA CE1 = VIH or CE2 = VIL or
OE = VIH or WE = VIL
VI/O = GND to VCC
ICC Active Power Supply Current - 3 mA
CE1 = VIL, CE2 = VIH
II/O = 0mA
ICC1 - 30 mA
Min. Cycle, Duty = 100%
CE1 = VIL, CE2 = VIH
II/O = 0mA
ICC2
Dynamic Operating Current
- 3 mA
CE1 = VIL, CE2 = VIH
VIH = VCC, VIL = 0V
f = 1MHZ, II/O = 0mA
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 4 AMIC Technology, Corp.
DC Electrical Characteristics (continued)
Symbol Parameter Min. Max. Unit Conditions
ISB - 0.5 mA
VCC ≤ 3.3V
CE1 = VIH or CE2 = VIL
ISB1
Standby Power
Supply Current - 5
μA VCC ≤ 3.3V
CE1 ≥ VCC - 0.2V or CE2 ≤ 0.2V
VIN ≥ 0V
VOL Output Low Voltage - 0.4 V IOL = 2.1mA
VOH Output High Voltage 2.2 - V IOH = -1.0mA
Truth Table
Mode CE1 CE2 OE WE I/O Operation Supply Current
Standby H X X X High Z ISB, ISB1
X L X X High Z ISB, ISB1
Output Disable L H H H High Z ICC, ICC1, ICC2
Read L H L H DOUT ICC, ICC1, ICC2
Write L H X L DIN ICC, ICC1, ICC2
Note: X = H or L
Capacitance (TA = 25°C, f = 1.0MHz)
Symbol Parameter Min. Max. Unit Conditions
CIN* Input Capacitance 6 pF VIN = 0V
CI/O* Input/Output Capacitance 8 pF VI/O = 0V
* These parameters are sampled and not 100% test ed.
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 5 AMIC Technology, Corp.
AC Characteristics (TA = 0°C to +70°C or -40°C to +85°C, VCC = 2.7V to 3.6V)
Symbol Parameter A62S6308A-55S/SU A62S6308A-70S/SU Unit
Min. Max. Min. Max.
Read Cycle
tRC Read Cycle Time 55 - 70 - ns
tAA Address Access Time - 55 - 70 ns
tACE1 Chip Enable Access Time CE1 - 55 - 70 ns
tACE2 CE2 - 55 - 70 ns
tOE Output Enable to Output Valid - 30 - 35 ns
tCLZ1 Chip Enable to Output in Low Z CE1 10 - 10 - ns
tCLZ2 CE2 10 - 10 - ns
tOLZ Output Enable to Output in Low Z 5 - 5 - ns
tCHZ1 Chip Disable to Output in High Z CE1 0 20 0 25 ns
tCHZ2 CE2 0 20 0 25 ns
tOHZ Output Disable to Output in High Z 0 20 0 25 ns
tOH Output Hold from Address Change 5 - 10 - ns
Read Cycle
tWC Write Cycle Time 55 - 70 - ns
tCW Chip Enable to End of Write 50 - 60 - ns
tAS Address Setup Time 0 - 0 - ns
tAW Address Valid to End of Write 50 - 60 - ns
tWP Write Pulse Width 40 - 50 - ns
tWR Write Recovery Time 0 - 0 - ns
tWHZ Write to Output in High Z 0 25 0 25 ns
tDW Data to Write Time Overlap 25 - 30 - ns
tDH Data Hold from Write Time 0 - 0 - ns
tOW Output Active from End of Write 5 - 5 - ns
Notes: tCHZ1, tCHZ2, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 6 AMIC Technology, Corp.
Timing Waveforms
Read Cycle 1(1, 2, 4)
t
RC
t
OH
t
AA
t
OH
Address
D
OUT
Read Cycle 2 (1, 3, 4, 6)
t
CLZ15
t
ACE1
t
CHZ15
CE1
D
OUT
Read Cycle 3 (1, 4, 7 ,8)
t
CLZ25
t
ACE2
t
CHZ25
CE2
D
OUT
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 7 AMIC Technology, Corp.
Timing Waveforms (continued)
Read Cycle 4 (1)
t
RC
Address
CE2
D
OUT
t
AA
t
OE
t
OLZ5
t
ACE1
t
CLZ15
t
ACE2
t
CLZ25
t
CHZ25
t
OHZ5
t
CHZ15
t
OH
OE
CE1
Notes: 1.
WE is high for Read Cycle.
2. Device is continuously enabled CE1 = VIL and CE2 = VIH.
3. Address valid prior to or coincident with CE1 transition low.
4.
OE = VIL.
5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.
6. CE2 is high.
7.
CE1 is low.
8. Address valid prior to or coincident with CE2 transition high.
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 8 AMIC Technology, Corp.
Timing Waveforms (continued)
Write Cycle 1(6)
(Write Enable Controlled)
t
WC
Address
CE1
CE2
D
IN
t
OW
t
DH
t
DW
t
WHZ
t
WP2
t
AS1
(4)
t
CW5
t
AW
t
WR3
WE
D
OUT
(4)
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 9 AMIC Technology, Corp.
Timing Waveforms (continued)
Write Cycle 2
(Chip Enable Controlled)
t
WC
Address
CE1
CE2
D
IN
t
DH
t
DW
(4)
(4)
t
CW5
t
AW
t
WR3
WE
D
OUT
t
WHZ7
t
WP2
t
CW5
t
AS1
Notes: 1. tAS is measured from the address valid to the beginning of W r ite.
2. A Write occurs during the overlap (tWP) of a low CE1, a high CE2 and a low WE.
3. tWR is measured from the earliest of CE1 or WE going high or CE2 going low to the end of the Write cycle.
4. If the
CE1 low transition or the CE2 high transition occurs simultaneously with the WE low transition or after
the
WE transition, outputs remain in a high impedance stat e.
5. tCW is measured from the later of CE1 going low or CE2 going high to the end of Writ e.
6.
OE is continuously low. (OE = VIL)
7. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 10 AMIC Technology, Corp.
AC Test Conditions
Input Pulse Levels 0.4V to 2.4V
Input Rise and Fall Time 5 ns
Input and Output Timing Reference Levels 1.5V
Output Load See Figures 1 and 2
30pF
* Including scope and jig. * Including scope and jig.
C
L
TTL
5pF
C
L
TTL
Figure 1. Output Load Figure 2. Output Load for tCLZ1,
t
CLZ2, tOHZ, tOLZ, tCHZ1,
t
CHZ2, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to +70°C or -40°C to +85°C)
Symbol Parameter Min. Max. Unit Conditions
VDR1 2.0 3.6 V
CE1 ≥ VCC - 0.2V
VDR2 VCC for Data Retention 2.0 3.6 V
CE2 ≤ 0.2V
μA VCC = 2.0V
CE1 ≥ VCC - 0.2V
ICCDR1 - 1*
VIN ≥ 0V
μA VCC = 2.0V
CE2 ≤ 0.2V
ICCDR2
Data Retention Current
- 1*
VIN ≥ 0V
tCDR Chip Disable to Data Retention T ime 0 - ns
tR Operation Recovery Time tRC - ns
See Retention Waveform
tVR VCC Rise Time from Data Retent ion Voltage
to Operating Voltage 5 - ms
* A62S6308A-55S/70S ICCDR: Max. 1μA at TA = 0°C to +40°C
A62S6308A-55SU/70SU ICCDR: Max. 1μA at TA = 0°C to +40°C
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 11 AMIC Technology, Corp.
Low VCC Data Retention Waveform (1) (CE1 Controlled)
VCC
CE1
t
CDR
V
IH
2.7V
t
R
V
IH
2.7V
DATA RETENTION MODE
V
DR
≥
2V
CE1
≥
V
DR
- 0.2V
t
VR
Low VCC Data Retention Waveform (2) (CE2 Controlled)
VCC
CE2
t
CDR
V
IL
2.7V
t
R
V
IL
2.7V
DATA RETENTION MODE
V
DR
≥
2V
CE2 < 0.2V
t
VR
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 12 AMIC Technology, Corp.
Ordering Information
Part No. Access Time (ns) Operating Current
Max. (mA) Standby Current
Max. (μA) Package
A62S6308AM-55SF 32L Pb-Free SOP
A62S6308AM-55SUF 32L Pb-Free SOP
A62S6308AV-55SF 32L Pb-Free TSOP
A62S6308AV-55SUF 32L Pb-Free TSOP
A62S6308AX-55SF 32L Pb-Free sTSOP
A62S6308AX-55SUF
55 30 5
32L Pb-Free sTSOP
A62S6308AM-70SF 32L Pb-Free SOP
A62S6308AM-70SUF 32L Pb-Free SOP
A62S6308AV-70SF 32L Pb-Free TSOP
A62S6308AV-70SUF 32L Pb-Free TSOP
A62S6308AX-70SF 32L Pb-Free sTSOP
A62S6308AX-70SUF
70 30 5
32L Pb-Free sTSOP
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 13 AMIC Technology, Corp.
Package Information
SOP (W.B.) 32L Outline Dimensions unit: inches/mm
1
E
HE
L
L
E
c
16
See Detail F
Detail F
1732
A1A2
A
S
D
Seating Plane
D
y
e
b
θ
Dimensions in inches Dimensions in mm
Symbol Min Nom Max Min Nom Max
A - - 0.118 - - 3.00
A1 0.004 - - 0.10 - -
A2 0.101 0.106 0.111 2.57 2.69 2.82
b 0.014 0.016 0.020 0.36 0.41 0.51
c 0.006 0.008 0.012 0.15 0.20 0.31
D - 0.805 0.817 - 20.45 20.75
E 0.440 0.445 0.450 11.18 11.30 11.43
e 0.044 0.050 0.056 1.12 1.27 1.42
HE 0.546 0.556 0.566 13.87 14.12 14.38
L 0.023 0.031 0.039 0.58 0.79 0.99
LE 0.047 0.055 0.063 1.19 1.40 1.60
S - - 0.036 - - 0.91
y - - 0.004 - - 0.10
θ 0° - 10° 0° - 10°
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 14 AMIC Technology, Corp.
Package Information
TSOP 32L TYPE I (8 X 20mm) Outline Dimensions unit: inches/mm
e
L
E
L
A
A2
c
D
y
Detail "A"
S
A1
b
H
D
D
E
θ
Detail "A"
Dimensions in inches Dimensions in mm
Symbol Min Nom Max Min Nom Max
A - - 0.047 - - 1.20
A1 0.002 - 0.006 0.05 - 0.15
A2 0.037 0.039 0.041 0.95 1.00 1.05
b 0.007 0.009 0.011 0.18 0.22 0.27
c 0.004 - 0.008 0.11 - 0.20
D 0.720 0.724 0.728 18.30 18.40 18.50
E - 0.315 0.319 - 8.00 8.10
e 0.020 BSC 0.50 BSC
HD 0.779 0.787 0.795 19.80 20.00 20.20
L 0.016 0.020 0.024 0.40 0.50 0.60
LE - 0.032 - - 0.80 -
S - - 0.020 - - 0.50
y - - 0.003 - - 0.08
θ 0° - 5° 0° - 5°
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
A62S6308A Series
PRELIMINARY (May, 2011, Version 0.0) 15 AMIC Technology, Corp.
Package Information
sTSOP 32L TYPE I (8 X 13.4mm) Outline Dimensions unit: inches/mm
e
Detail "A"
D
0.076MM
Det ail "A"
Sb
D
1
E
D
L
E
L
A
A2
c
θ
A1
SEATING PLANE
Dimensions in inches Dimensions in mm
Symbol Min Nom Max Min Nom Max
A - -
0.049 - -
1.25
A1 0.002 - -
0.05 - -
A2 0.037 0.039 0.041 0.95 1.00 1.05
b 0.007 0.008 0.009 0.17 0.20 0.23
c 0.0056 0.0059 0.0062 0.142 0.150 0.158
E 0.311 0.315 0.319 7.90 8.00 8.10
e 0.020 TYP 0.50 TYP
D 0.520 0.528 0.535 13.20 13.40 13.60
D1 0.461 0.465 0.469 11.70 11.80 11.90
L 0.012 0.020 0.028 0.30 0.50 0.70
LE 0.0275 0.0315 0.0355 0.700 0.800 0.900
S 0.0109 TYP 0.278 TYP
θ 0° 3° 5° 0° 3° 5°
Notes:
1. The maximum value of dimension D1 includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
