Low Cost
Analog Multiplier
AD633
Rev. H
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FEATURES
4-quadrant multiplication
Low cost, 8-lead SOIC and PDIP packages
Complete—no external components required
Laser-trimmed accuracy and stability
Total error within 2% of full scale
Differential high impedance X and Y inputs
High impedance unity-gain summing input
Laser-trimmed 10 V scaling reference
APPLICATIONS
Multiplication, division, squaring
Modulation/demodulation, phase detection
Voltage-controlled amplifiers/attenuators/filters
FUNCTIONAL BLOCK DIAGRAM
1
1
A
1
10V
00786-023
X1
X2
Y
1
Y
2
W
Z
Figure 1.
GENERAL DESCRIPTION
The AD633 is a functionally complete, four-quadrant, analog
multiplier. It includes high impedance, differential X and Y inputs,
and a high impedance summing input (Z). The low impedance
output voltage is a nominal 10 V full scale provided by a buried
Zener. The AD633 is the first product to offer these features in
modestly priced 8-lead PDIP and SOIC packages.
The AD633 is laser calibrated to a guaranteed total accuracy of
2% of full scale. Nonlinearity for the Y input is typically less
than 0.1% and noise referred to the output is typically less than
100 μV rms in a 10 Hz to 10 kHz bandwidth. A 1 MHz bandwidth,
20 V/μs slew rate, and the ability to drive capacitive loads make
the AD633 useful in a wide variety of applications where
simplicity and cost are key concerns.
The versatility of the AD633 is not compromised by its
simplicity. The Z input provides access to the output buffer
amplifier, enabling the user to sum the outputs of two or more
multipliers, increase the multiplier gain, convert the output
voltage to a current, and configure a variety of applications.
The AD633 is available in 8-lead PDIP and SOIC packages. It is
specified to operate over the 0°C to 70°C commercial temperature
range (J Grade) or the −40°C to +85°C industrial temperature
range (A Grade).
PRODUCT HIGHLIGHTS
1. The AD633 is a complete four-quadrant multiplier offered
in low cost 8-lead SOIC and PDIP packages. The result is a
product that is cost effective and easy to apply.
2. No external components or expensive user calibration are
required to apply the AD633.
3. Monolithic construction and laser calibration make the
device stable and reliable.
4. High (10 MΩ) input resistances make signal source
loading negligible.
5. Power supply voltages can range from ±8 V to ±18 V. The
internal scaling voltage is generated by a stable Zener diode;
multiplier accuracy is essentially supply insensitive.
AD633
Rev. H | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Pin Configurations and Function Descriptions ........................... 5
Typical Performance Characteristics ............................................. 6
Functional Description .................................................................... 7
Error Sources ................................................................................. 7
Applications Information .................................................................8
Multiplier Connections ................................................................8
Squaring and Frequency Doubling .............................................8
Generating Inverse Functions .....................................................8
Variable Scale Factor .....................................................................9
Current Output ..............................................................................9
Linear Amplitude Modulator ......................................................9
Voltage-Controlled, Low-Pass and High-Pass Filters ...............9
Voltage-Controlled Quadrature Oscillator ................................... 10
Automatic Gain Control (AGC) Amplifiers ........................... 10
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 13
REVISION HISTORY
4/11—Rev. G to Rev. H
Changes to Figure 1, Deleted Figure 2 ........................................... 1
Added Figure 2, Figure 3, Table 4, Table 5 .................................... 5
Deleted Figure 9, Renumbered Subsequent Figures .................... 6
Changes to Figure 15 ........................................................................ 9
4/10—Rev. F to Rev. G
Changes to Equation 1 ..................................................................... 6
Changes to Equation 5 and Figure 14 ............................................ 7
Changes to Figure 21 ........................................................................ 9
10/09—Rev. E to Rev. F
Changes to Format ............................................................. Universal
Changes to Figure 21 ........................................................................ 9
Updated Outline Dimensions ....................................................... 11
Changes to Ordering Guide .......................................................... 12
10/02—Rev. D to Rev. E
Edits to Title of 8-Lead Plastic SOIC Package (RN-8) ................. 1
Edits to Ordering Guide .................................................................. 2
Change to Figure 13 ......................................................................... 7
Updated Outline Dimensions ......................................................... 8
AD633
Rev. H | Page 3 of 16
SPECIFICATIONS
TA = 25°C, VS = ±15 V, RL ≥ 2 kΩ.
Table 1.
AD633J, AD633A
Parameter Conditions Min Typ Max Unit
TRANSFER FUNCTION
( )( )
Z
Y2Y1X2X1
W+
−−
=V10
MULTIPLIER PERFORMANCE
Total Error −10 V ≤ X, Y ≤ +10 V ±1 ±21% full scale
TMIN to TMAX ±3 % full scale
Scale Voltage Error SF = 10.00 V nominal ±0.25% % full scale
Supply Rejection VS = ±14 V to ±16 V ±0.01 % full scale
Nonlinearity, X X = ±10 V, Y = +10 V ±0.4 ±11 % full scale
Nonlinearity, Y Y = ±10 V, X = +10 V ±0.1 ±0.41 % full scale
X Feedthrough Y nulled, X = ±10 V ±0.3 ±11 % full scale
Y Feedthrough X nulled, Y = ±10 V ±0.1 ±0.41 % full scale
Output Offset Voltage ±5 ±501 mV
DYNAMICS
Small Signal Bandwidth VO = 0.1 V rms 1 MHz
Slew Rate VO = 20 V p-p 20 V/µs
Settling Time to 1% ΔVO = 20 V 2 µs
OUTPUT NOISE
Spectral Density 0.8 µV/√Hz
Wideband Noise f = 10 Hz to 5 MHz 1 mV rms
f = 10 Hz to 10 kHz 90 µV rms
OUTPUT
Output Voltage Swing ±111 V
Short Circuit Current RL = 0 Ω 30 401 mA
INPUT AMPLIFIERS
Signal Voltage Range Differential ±101 V
Common mode ±101 V
Offset Voltage (X, Y) ±5 ±301 mV
CMRR (X, Y) VCM = ±10 V, f = 50 Hz 601 80 dB
Bias Current (X, Y, Z) 0.8 2.01 µA
Differential Resistance 10 MΩ
POWER SUPPLY
Supply Voltage
Rated Performance ±15 V
Operating Range ±81 ±181 V
Supply Current Quiescent 4 61 mA
1 This specification was tested on all production units at electrical test. Results from those tests are used to calculate outgoing quality levels. All minimum and maximum
specifications are guaranteed; however, only this specification was tested on all production units.
AD633
Rev. H | Page 4 of 16
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage ±18 V
Internal Power Dissipation 500 mW
Input Voltages1 ±18 V
Output Short-Circuit Duration Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range
AD633J 0°C to 70°C
AD633A −40°C to +85°C
Lead Temperature (Soldering, 60 sec) 300°C
ESD Rating 1000 V
1 For supply voltages less than ±18 V, the absolute maximum input voltage is
equal to the supply voltage.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3.
Package Type θJA Unit
8-Lead PDIP 90 °C/W
8-Lead SOIC 155 °C/W
ESD CAUTION
AD633
Rev. H | Page 5 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
AD633JN/AD633AN
1
1
A
1
10V
1X1
2X2
3Y1
4Y2
8+V
S
7W
Z
6
5–V
S
00786-001
Figure 2. 8-Lead PDIP
AD633JR/AD633AR
1
1
1
10V
1Y1
2Y2
3
–V
S
4Z
8X2
7X1
+V
S
6
5W
00786-002
A
W = + Z
(X1 – X 2) ( Y1 – Y2)
10V
Figure 3. 8-Lead SOIC
Table 4. 8-Lead PDIP Pin Function Descriptions
Pin No. Mnemonic Description
1 X1 X Multiplicand Noninverting Input
2 X2 X Multiplicand Inverting Input
3 Y1 Y Multiplicand Noninverting Input
4 Y2 Y Multiplicand Inverting Input
5 −VS Negative Supply Rail
6 Z Summing Input
7 W Product Output
8 +VS Positive Supply Rail
Table 5. 8-Lead SOIC Pin Function Descriptions
Pin No. Mnemonic Description
1 Y1 Y Multiplicand Noninverting Input
2 Y2 Y Multiplicand Inverting Input
3 −VS Negative Supply Rail
4 Z Summing Input
5 W Product Output
6 +VS Positive Supply Rail
7 X1 X Multiplicand Noninverting Input
8 X2 X Multiplicand Inverting Input
AD633
Rev. H | Page 6 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
FREQUENCY (Hz)
OUTPUT RESPONSE (dB)
0
–10
–20
–30
10k 100k 1M 10M
00786-003
NORMAL
CONNECTION
0dB = 0.1V rms, R
L
= 2kΩ
C
L
= 1000pF
C
L
= 0dB
Figure 4. Frequency Response
TEMPERATURE ( °C)
BIAS CURRE NT (n A)
700
500
600
400
300
200
–60 –40 –20 014012010080604020
00786-004
Figure 5. Input Bias Current vs. Temperature (X, Y, or Z Inputs)
PEAK POSITIVE O R NEGAT I VE SUPPLY (V)
PEAK POSITIVE O R NEGATIVE SIGNAL (V)
14
10
12
8
6
4810 12 14 201816
00786-005
OUTPUT, R
L
≥ 2kΩ
ALL INP UTS
Figure 6. Input and Output Signal Ranges vs. Supply Voltages
FREQUENCY (Hz)
CMRR (dB)
100
60
50
90
80
70
40
30
20
100 1k 1M
100k10k
00786-006
TYPICAL
FOR X, Y
INPUTS
Figure 7. CMRR vs. Frequency
FREQUENCY (Hz)
NOISE SPECTRAL DENSITY (µV/ Hz)
1.5
1.0
0.5
010 100 1k 100k10k
00786-007
Figure 8. Noise Spectral Density vs. Frequency
FREQUENCY (Hz)
PEAK-TO- P E AK FEEDTHRO UGH (mV )
1k
10
100
1
0.110 100 1k 10M10k 100k 1M
00786-008
Y-FEEDTHROUGH
X-FEEDTHROUGH
Figure 9. AC Feedthrough vs. Frequency
AD633
Rev. H | Page 7 of 16
FUNCTIONAL DESCRIPTION
The AD633 is a low cost multiplier comprising a translinear
core, a buried Zener reference, and a unity-gain connected
output amplifier with an accessible summing node. Figure 1
shows the functional block diagram. The differential X and Y
inputs are converted to differential currents by voltage-to-
current converters. The product of these currents is generated
by the multiplying core. A buried Zener reference provides an
overall scale factor of 10 V. The sum of (X × Y)/10 + Z is then
applied to the output amplifier. The amplifier summing node Z
allows the user to add two or more multiplier outputs, convert
the output voltage to a current, and configure various analog
computational functions.
Inspection of the block diagram shows the overall transfer
function is
( )( )
Z
V
Y2Y1X2X1
W+
−−
=10
(1)
ERROR SOURCES
Multiplier errors consist primarily of input and output offsets,
scale factor error, and nonlinearity in the multiplying core. The
input and output offsets can be eliminated by using the optional
trim of Figure 10. This scheme reduces the net error to scale
factor errors (gain error) and an irreducible nonlinearity
component in the multiplying core. The X and Y nonlinearities
are typically 0.4% and 0.1% of full scale, respectively. Scale
factor error is typically 0.25% of full scale. The high impedance
Z input should always reference the ground point of the driven
system, particularly if it is remote. Likewise, the differential X
and Y inputs should reference their respective grounds to
realize the full accuracy of the AD633.
±50mV
TO APPROPRIATE
INPUT T E RM INAL
(FOR EXAMPLE, X2, Y2, Z)
50kΩ
1kΩ
300kΩ
+VS
–VS
00786-010
Figure 10. Optional Offset Trim Configuration
AD633
Rev. H | Page 8 of 16
APPLICATIONS INFORMATION
The AD633 is well suited for such applications as modulation
and demodulation, automatic gain control, power measurement,
voltage-controlled amplifiers, and frequency doublers. These
applications show the pin connections for the AD633JN (8-lead
PDIP), which differs from the AD633JR (8-lead SOIC).
MULTIPLIER CONNECTIONS
Figure 11 shows the basic connections for multiplication. The X
and Y inputs normally have their negative nodes grounded, but
they are fully differential, and in many applications, the grounded
inputs may be reversed (to facilitate interfacing with signals of a
particular polarity while achieving some desired output polarity),
or both may be driven.
AD633JN
X1
1
X2
2
Y1
3
Y2
4
+V
S8
W
7
Z
6
–V
S5
X
INPUT
Y
INPUT
+
–
+
–
0.1µF
0.1µF
+15
–15V
OPTIONAL SUMMING
INPUT, Z
W = + Z
(X1 – X2)(Y1 – Y2)
10V
00786-011
Figure 11. Basic Multiplier Connections
SQUARING AND FREQUENCY DOUBLING
As is shown in Figure 12, squaring of an input signal, E, is
achieved simply by connecting the X and Y inputs in parallel to
produce an output of E2/10 V. The input can have either polarity,
but the output is positive. However, the output polarity can be
reversed by interchanging the X or Y inputs. The Z input can be
used to add a further signal to the output.
AD633JN
X11
E
X2
2
Y1
3
Y24
+VS8
W7
Z6
–VS5
0.1µF
0.1µF
+15
–15V
W = E2
10V
00786-012
Figure 12. Connections for Squaring
When the input is a sine wave E sin ωt, this squarer behaves as a
frequency doubler, because

t
V
E
V
tE
2cos1
2010
sin 2
2
(2)
Equation 2 shows a dc term at the output that varies strongly
with the amplitude of the input, E. This can be avoided using
the connections shown in Figure 13, where an RC network is
used to generate two signals whose product has no dc term. It
uses the identity

θθθ 2sin
2
1
sincos (3)
AD633JN
X1
1
X2
2
Y1
3
Y2
4
+V
S8
W
7
Z
6
–V
S5
0.1µF
0.1µF
+15
–15V
W = E
2
10V
00786-013
E
R
CR2
3kΩ
R1
1kΩ
Figure 13. Bounceless Frequency Doubler
At ωo = 1/CR, the X input leads the input signal by 45° (and is
attenuated by √2), and the Y input lags the X input by 45° (and
is also attenuated by √2). Because the X and Y inputs are 90° out of
phase, the response of the circuit is (satisfying Equation 3)


45sin
2
45sin
2
10
1
00 t
E
t
E
V
W


t
V
E
0
2
2sin
40 (4)
which has no dc component. Resistors R1 and R2 are included
to restore the output amplitude to 10 V for an input amplitude
of 10 V.
The amplitude of the output is only a weak function of frequency;
the output amplitude is 0.5% too low at ω = 0.9 ω0 and ω0 = 1.1 ω0.
GENERATING INVERSE FUNCTIONS
Inverse functions of multiplication, such as division and square
rooting, can be implemented by placing a multiplier in the feedback
loop of an op amp. Figure 14 shows how to implement square
rooting with the transfer function for the condition E < 0.

VEW 10 (5)
AD633JN
X1
1
X2
2
Y1
3
Y2
4
+V
S8
W
7
Z
6
–V
S5
0.1µF
E < 0V
–15V
+15V
AD711
0.1µF
10kΩ
10kΩ
1N4148
000786-014
0.1µF
W = 10V)E
+15V
–15V
7
4
3
6
2
0.1µF
Figure 14. Connections for Square Rooting
AD633
Rev. H | Page 9 of 16
Likewise, Figure 15 shows how to implement a divider using a
multiplier in a feedback loop. The transfer function for the
divider is
( )
X
E
E
VW 10−=
′
(6)
AD633JN
X1
1
X2
2
Y1
3
Y2
4
+V
S8
W
7
Z
6
–V
S5
0.1µF
1N4148
0.1µF
+15V
0.1µF
+15V
0.1µF
–15V –15V
00786-015
7
4
3
6
2
AD711
E
R
10kΩ
R
10kΩ
E
X
W' = –10V E
E
X
Figure 15. Connections for Division
VARIABLE SCALE FACTOR
In some instances, it may be desirable to use a scaling voltage
other than 10 V. The connections shown in Figure 16 increase
the gain of the system by the ratio (R1 + R2)/R1. This ratio is
limited to 100 in practical applications. The summing input, S,
can be used to add an additional signal to the output, or it can
be grounded.
AD633JN
X1
1
X2
2
Y1
3
Y2
4
+VS8
W7
Z6
–VS5
0.1µF
0.1µF
+15V
–15V
W =
00786-016
S
R1
R2
1kΩ ≤ R1, R2 ≤ 100kΩ
+ S
(X1 – X2)(Y1 – Y2)
10V R1 + R2
R1
X
INPUT
Y
INPUT
+
–
+
–
Figure 16. Connections for Variable Scale Factor
CURRENT OUTPUT
The voltage output of the AD633 can be converted to a current
output by the addition of a resistor, R, between the W and Z pins of
the AD633 as shown in Figure 17.
AD633JN
X1
1
X2
2
Y1
3
Y2
4
+V
S8
W
7
Z
6
–V
S5
0.1µF
0.1µF
+15V
–15V
I
O
= 1
R
00786-017
(X1 – X2)(Y1 – Y2)
10V
1kΩ ≤ R ≤ 100kΩ
R
X
INPUT
Y
INPUT
+
–
+
–
Figure 17. Current Output Connections
This arrangement forms the basis of voltage-controlled integrators
and oscillators as is shown later in this section. The transfer
function of this circuit has the form
( )( )
V
Y2Y1X2X1
R
I
O
10
1−−
=
(7)
LINEAR AMPLITUDE MODULATOR
The AD633 can be used as a linear amplitude modulator with
no external components. Figure 18 shows the circuit. The
carrier and modulation inputs to the AD633 are multiplied to
produce a double sideband signal. The carrier signal is fed
forward to the Z input of the AD633 where it is summed with
the double sideband signal to produce a double sideband with
the carrier output.
AD633JN
X1
MODULATION
INPUT
±EM
CARRIER
INPUT
ECsin ωt
1
X2
2
Y1
3
Y2
4
+VS8
W7
Z6
–VS5
+
–
0.1µF
0.1µF
+15V
–15V
W = ECsin ωt
00786-018
EM
10V
1+
Figure 18. Linear Amplitude Modulator
VOLTAGE-CONTROLLED, LOW-PASS AND HIGH-
PASS FILTERS
Figure 19 shows a single multiplier used to build a voltage-
controlled, low-pass filter. The voltage at Output A is a result
of filtering, ES. The break frequency is modulated by EC, the control
input. The break frequency, f2, equals
( )
RCV
E
f
C
2
π
=20
(8)
and the roll-off is 6 dB per octave. This output, which is at a
high impedance point, may need to be buffered.
AD633JN
X1
1
X2
2
Y1
3
Y2
4
+VS8
W
7
Z
6
–V
S5
CONTROL
INPUT E
C
SIGNAL
INPUT E
S
0.1µF
0.1µF
+15V
–15V
00786-019
R
C
1 + T
1
P
1 + T
2
P
OUT P UT B =
1
1 + T
2
P
OUTPUT A =
1
W
1
T
1
= = R
C
1
W
2
10
E
C
R
C
T
2
= =
dB
f
2
f
1
f
–6dB/OCTAVE
OUTPUT A OUTPUT B
0
Figure 19. Voltage-Controlled, Low-Pass Filter
The voltage at Output B, the direct output of the AD633, has the
same response up to frequency f1, the natural breakpoint of RC
filter, and then levels off to a constant attenuation of f1/f2 = EC/10.
RC
fπ
=2
1
1
(9)
AD633
Rev. H | Page 10 of 16
For example, if R = 8 kΩ and C = 0.002 µF, then Output A has a
pole at frequencies from 100 Hz to 10 kHz for EC ranging from
100 mV to 10 V. Output B has an additional 0 at 10 kHz (and
can be loaded because it is the low impedance output of the
multiplier). The circuit can be changed to a high-pass filter Z
interchanging the resistor and capacitor as shown in Figure 20.
AD633JN
X1
1
X2
2
Y1
3
Y2
4
+V
S8
W
7
Z
6
–V
S5
CONTROL
INP UT E
C
SIGNAL
INP UT E
S
0.1µF
0.1µF
+15V
–15V
00786-020
R
COUTPUT B
OUTPUT A
dB
f1f2f
+6dB/OCTAVE
OUTPUT A
OUTPUT B
0
Figure 20. Voltage-Controlled, High-Pass Filter
VOLTAGE-CONTROLLED QUADRATURE OSCILLATOR
Figure 21 shows two multipliers being used to form integrators
with controllable time constants in second-order differential
equation feedback loop. R2 and R5 provide controlled current
output operation. The currents are integrated in capacitors C1
and C2, and the resulting voltages at high impedance are applied
to the X inputs of the next AD633. The frequency control input,
EC, connected to the Y inputs, varies the integrator gains with a
calibration of 100 Hz/V. The accuracy is limited by the Y input
offsets. The practical tuning range of this circuit is 100:1. C2
(proportional to C1 and C3), R3, and R4 provide regenerative
feedback to start and maintain oscillation. The diode bridge, D1
through D4 (1N914s), and Zener diode D5 provide economical
temperature stabilization and amplitude stabilization at ±8.5 V
by degenerative damping. The output from the second integrator
(10 V sin ωt) has the lowest distortion.
AUTOMATIC GAIN CONTROL (AGC) AMPLIFIERS
Figure 22 shows an AGC circuit that uses an rms-to-dc
converter to measure the amplitude of the output waveform.
The AD633 and A1, ½ of an AD712 dual op amp, form a
voltage-controlled amplifier. The rms-to-dc converter, an
AD736, measures the rms value of the output signal. Its output
drives A2, an integrator/comparator whose output controls the
gain of the voltage-controlled amplifier. The 1N4148 diode
prevents the output of A2 from going negative. R8, a 50 kΩ
variable resistor, sets the output level of the circuit. Feedback
around the loop forces the voltages at the inverting and
noninverting inputs of A2 to be equal, thus the AGC.
AD633JN
X1
1
X2
2
Y1
3
Y2
4
+VS8
W7
Z6
–VS5
0.1µF
0.1µF
C1
0.1µF
+15V
–15V
AD633JN
X1
1
X2
2
Y1
3
Y2
4
+VS8
W7
Z6
–VS5
0.1µF
+15V
–15V
R5
16kΩ
R3
330kΩ
R4
16kΩ
C3
0.1µF
C2
0.1µF
(10V) sin ωt
0.1µF
R2
16kΩ
R1
1kΩ
D5
1N5236
D1
1N914
D2
1N914
D3
1N914
D4
1N914
f = EC
10V = kHz
(10V) cos ωt
EC
00786-021
Figure 21. Voltage-Controlled Quadrature Oscillator
AD633
Rev. H | Page 11 of 16
AD633JN
X1
1
X2
2
Y1
3
Y2
4
+VS8
W7
Z6
–VS5
0.1µF
0.1µF
+15V
–15V
A1
0.1µF
0.1µF
0.1µF
+15V
+15V
+15V
–15V
8
3
1
2
1/2
AD712
AGC THRESHOL D
ADJUSTMENT
R2
1kΩR3
10kΩR4
10kΩ
C3
0.2µF R10
10kΩ
R9
10kΩ
R8
50kΩ
1/2
AD712
A2
0.1µF
–15V
45
7
6
C2
0.02µF
C4
33µF
C1
1µF
1N4148
AD736
C
C
1
V
IN
2
C
F
3
–V
S
4
+V
S
8
COMMON
OUTPUT
7
6
C
AV 5
OUTPUT
LEVEL
ADJUST
R5
10kΩ
R6
1kΩ
E
OUT
E
00786-022
Figure 22. Connections for Use in Automatic Gain Control Circuit
AD633
Rev. H | Page 12 of 16
OUTLINE DIMENSIONS
COMPLIANT TO JEDE C S TANDARDS MS-001
CONTROLLING DIMENSIONSARE IN INCHES; MILL I MET ER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED- OF F INCH E QUIVALENTS FOR
REF E RE NCE ONLY AND ARE NO T APPROPRIATE FOR USE IN DESIGN.
CORNE R LEADS MAY BE CONF IG URE D AS WHOLE O R HALF LEADS .
070606-A
0.022 ( 0.56)
0.018 ( 0.46)
0.014 ( 0.36)
SEATING
PLANE
0.015
(0.38)
MIN
0.210 ( 5.33)
MAX
0.150 ( 3.81)
0.130 ( 3.30)
0.115 (2.92)
0.070 ( 1.78)
0.060 ( 1.52)
0.045 ( 1.14)
8
14
5
0.280 ( 7.11)
0.250 ( 6.35)
0.240 ( 6.10)
0.100 ( 2.54)
BSC
0.400 ( 10.16)
0.365 ( 9.27)
0.355 ( 9.02)
0.060 ( 1.52)
MAX
0.430 ( 10.92)
MAX
0.014 ( 0.36)
0.010 ( 0.25)
0.008 ( 0.20)
0.325 ( 8.26)
0.310 ( 7.87)
0.300 ( 7.62)
0.195 ( 4.95)
0.130 ( 3.30)
0.115 (2.92)
0.015 ( 0.38)
GAUGE
PLANE
0.005 ( 0.13)
MIN
Figure 23. 8-Lead Plastic Dual-in-Line Package [PDIP]
(N-8)
Dimensions shown in inches and (millimeters)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DES
IGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8 5
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 24. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
AD633
Rev. H | Page 13 of 16
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option
AD633AN −40°C to +85°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8
AD633ANZ −40°C to +85°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8
AD633AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD633AR-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N], 13" Tape and Reel R-8
AD633AR-REEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N], 7" Tape and Reel R-8
AD633ARZ −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD633ARZ-R7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N], 13" Tape and Reel R-8
AD633ARZ-RL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N], 7" Tape and Reel R-8
AD633JN 0°C to 70°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8
AD633JNZ 0°C to 70°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8
AD633JR 0°C to 70°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD633JR-REEL 0°C to 70°C 8-Lead Standard Small Outline Package [SOIC_N], 13" Tape and Reel R-8
AD633JR-REEL7 0°C to 70°C 8-Lead Standard Small Outline Package [SOIC_N], 7" Tape and Reel R-8
AD633JRZ 0°C to 70°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD633JRZ-R7 0°C to 70°C 8-Lead Standard Small Outline Package [SOIC_N], 7" Tape and Reel R-8
AD633JRZ-RL 0°C to 70°C 8-Lead Standard Small Outline Package [SOIC_N], 13" Tape and Reel R-8
1 Z = RoHS Compliant Part.
AD633
Rev. H | Page 14 of 16
NOTES
AD633
Rev. H | Page 15 of 16
NOTES
AD633
Rev. H | Page 16 of 16
NOTES
©2010-2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00786-0-4/11(H)