20 MHz to 6 GHz
RF/IF Gain Block
Data Sheet
ADL5541
FEATURES
Fixed gain of 15 dB
Operation up to 6 GHz
Input/output internally matched to 50 Ω
Integrated bias control circuit
Output IP3
44 dBm at 500 MHz
40 dBm at 900 MHz
Output 1 dB compression: 19.7 dBm at 900 MHz
Noise figure of 3.5 dB at 900 MHz
Single 5 V power supply
Small footprint 8-lead LFCSP
Pin compatible with 20 dB gain ADL5542
1 kV ESD (Class 1C)
FUNCTIONAL BLOCK DIAGRAM
GND GND
RFIN RFOUT
GND GND
CB VPOS
INPUT
MATCH OUTPUT
MATCH
BIAS CONT ROL
06877-001
ADL5541
1
2
3
4
8
7
6
5
Figure 1.
GENERAL DESCRIPTION
The ADL5541 is a broadband 15 dB linear amplifier that operates
at frequencies up to 6 GHz. The device can be used in a wide
variety of CATV, cellular, and instrumentation equipment.
The ADL5541 provides a gain of 15 dB, which is stable over
frequency, temperature, power supply, and from device to
device. The device is internally matched to 50 Ω with an input
return loss of 10 dB or better up to 6 GHz. Only input/output
ac coupling capacitors, power supply decoupling capacitors, and
an external inductor are required for operation.
The ADL5541 is fabricated on an InGaP HBT process and has
an ESD rating of 1 kV (Class 1C). The device is packaged in a
3 mm × 3 mm LFCSP that uses an exposed paddle for excellent
thermal impedance.
The ADL5541 consumes 90 mA on a single 5 V supply and
is fully specified for operation from 40°C to +85°C.
A fully populated RoHS-compliant evaluation board is
available.
The ADL5542 is a companion part that offers a gain of 20 dB
in a pin-compatible package.
Rev. B Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©20072015 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
ADL5541 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Typical Scattering Parameters ..................................................... 5
Absolute Maximum Ratings ............................................................ 6
ESD Caution .................................................................................. 6
Pin Configuration and Function Descriptions ............................. 7
Typical Performance Characteristics ..............................................8
Operating to 20 MHz ................................................................. 10
Basic Connections .......................................................................... 11
Soldering Information and Recommended PCB Land
Pattern .......................................................................................... 11
Evaluation Board ............................................................................ 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
REVISION HISTORY
2/15Rev. A to Rev. B
Changed Frequency Range from 50 MHz to 6000 MHz to
20 MHz to 6000 MHz (Throughout) ............................................. 1
Changes to Table 1 ............................................................................ 3
Added Figure 14 to Figure 19; Renumbered Sequentially ........ 10
Changes to Basic Connections Section and Table 5; Added
Figure 21 and Figure 22 ................................................................. 11
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 13
11/13Rev. 0 to Rev. A
Changes to Figure 2 ........................................................................... 7
Added Figure 13, Renumbered Sequentially ................................. 9
Added Exposed Pad Notation to Outline Dimensions .............. 12
7/07Revision 0: Initial Version
Rev. B | Page 2 of 13
Data Sheet ADL5541
SPECIFICATIONS
VPOS = 5 V and TA = 25°C, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
OVERALL FUNCTION
Frequency Range 20 6000 MHz
Gain (S21) 900 MHz 15.2 dB
Input Return Loss (S11) Frequency 500 MHz to 5 GHz 12 dB
Output Return Loss (S22) Frequency 500 MHz to 5 GHz 10 dB
Reverse Isolation (S12) 19 dB
FREQUENCY = 20 MHz
Gain 17.6 dB
Output 1 dB Compression Point 18.3 dBm
Output Third-Order Intercept Δf = 1 MHz, output power (POUT) = 0 dBm per tone 38 dBm
Noise Figure 3.3 dB
FREQUENCY = 100 MHz
Gain
15.7
Output 1 dB Compression Point 19 dBm
Output Third-Order Intercept Δf = 1 MHz, output power (POUT) = 0 dBm per tone 37 dBm
Noise Figure 3.9 dB
FREQUENCY = 500 MHz
Gain 14.7 15.1 15.5 dB
vs. Frequency ±50 MHz ±0.15 dB
vs. Temperature 40°C TA+85°C ±0.1 dB
vs. Supply 4.75 V to 5.25 V ±0.01 dB
Output 1 dB Compression Point 19.9 dBm
Output Third-Order Intercept Δf = 1 MHz, output power (POUT) = 3 dBm per tone 44 dBm
Noise Figure 3.5 3.7 dB
FREQUENCY = 900 MHz
Gain 14.9 15.2 15.4 dB
vs. Frequency ±50 MHz ±0.03 dB
vs. Temperature 40°C TA+85°C ±0.15 dB
vs. Supply
4.75 V to 5.25 V
±0.01
Output 1 dB Compression Point 19.7 dBm
Output Third-Order Intercept Δf = 1 MHz, output power (POUT) = 0 dBm per tone 40.8 dBm
Noise Figure 3.5 3.7 dB
FREQUENCY = 2000 MHz
Gain 13.9 14.7 15.4 dB
vs. Frequency ±50 MHz ±0.03 dB
vs. Temperature 40°C TA+85°C ±0.17 dB
vs. Supply 4.75 V to 5.25 V ±0.01 dB
Output 1 dB Compression Point
16.3
Output Third-Order Intercept Δf = 1 MHz, output power (POUT) = 0 dBm per tone 39.2 dBm
Noise Figure 3.8 4.0 dB
FREQUENCY = 2400 MHz
Gain 13.9 14.5 15.1 dB
vs. Frequency ±50 MHz ±0.03 dB
vs. Temperature 40°C TA+85°C ±0.19 dB
vs. Supply 4.75 V to 5.25 V ±0.02 dB
Output 1 dB Compression Point 14.9 dBm
Output Third-Order Intercept Δf = 1 MHz, output power (POUT) = 0 dBm per tone 38.6 dBm
Noise Figure 4.0 4.2 dB
Rev. B | Page 3 of 13
ADL5541 Data Sheet
Parameter Test Conditions/Comments Min Typ Max Unit
FREQUENCY = 3500 MHz
Gain 13.6 14.3 14.9 dB
vs. Frequency ±50 MHz ±0.03 dB
vs. Temperature −40°C ≤ TA+85°C ±0.19 dB
vs. Supply
4.75 V to 5.25 V
±0.02
Output 1 dB Compression Point 12.1 dBm
Output Third-Order Intercept Δf = 1 MHz, output power (POUT) = 0 dBm per tone 30.7 dBm
Noise Figure 4.2 4.5 dB
FREQUENCY = 5800 MHz
Gain 9.1 11.2 13.5 dB
vs. Frequency ±50 MHz ±0.15 dB
vs. Temperature −40°C ≤ TA+85°C ±0.9 dB
vs. Supply 4.75 V to 5.25 V ±0.02 dB
Output 1 dB Compression Point
5.8
Output Third-Order Intercept Δf = 1 MHz, output power (POUT) = 0 dBm per tone 21.9 dBm
Noise Figure 6.0 7.0 dB
POWER INTERFACE Pin VPOS
Supply Voltage (VPOS) 4.5 5 5.5 V
Supply Current 90 100 mA
vs. Temperature 40°C TA+85°C ±12 mA
Power Dissipation VPOS = 5 V 0.5 W
Rev. B | Page 4 of 13
Data Sheet ADL5541
TYPICAL SCATTERING PARAMETERS
VPOS = 5 V and TA = 25°C, the effects of the test fixture have been de-embedded up to the pins of the device.
Table 2.
Freq. (MHz)
S11 S21 S12 S22
Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°)
50 18.11 134.53 16.29 +166.36 19.15 +3.84 17.89 134.08
100 20.84 161.29 15.93 +168.53 18.82 +2.26 22.24 155.22
500 27.69 +115.36 15.58 +154.53 18.70 13.59 24.96 +176.64
900 27.48 +101.79 15.52 +136.22 18.70 26.33 22.38 +173.92
1000 26.87 +91.91 15.56 +131.64 18.64 29.43 23.15 +174.28
1500 29.18 107.74 15.50 +108.03 18.64 44.69 19.35 +167.80
2000 17.88 153.68 15.51 +84.72 18.43 60.42 14.13 +176.19
2500 9.87 +169.30 15.57 +59.74 18.32 75.48 9.89 +161.55
3000 7.92 +142.75 15.49 +35.05 17.93 92.29 8.69 +138.18
3500 7.74 +117.57 15.21 +9.15 18.14 110.62 11.02 +100.39
4000 10.85 +116.84 14.82 16.13 18.11 125.08 15.70 +6.37
4500 13.25 +136.93 15.23 41.75 17.54 142.99 7.83 80.59
5000 13.97 +143.02 14.56 68.15 17.64 161.24 6.87 112.39
5500 13.68 121.08 13.89 96.10 17.47 +178.77 11.66 102.32
6000 4.52 138.62 12.07 123.56 18.61 +157.35 7.66 54.40
Rev. B | Page 5 of 13
ADL5541 Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage, VPOS 6.5 V
Input Power (re: 50 Ω)
10 dBm
Internal Power Dissipation (Paddle Soldered) 650 mW
θJC (Junction to Paddle)
28.5°C/W
Maximum Junction Temperature 150°C
Operating Temperature Range
−40°C to +85°C
Storage Temperature Range −65°C to +150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Rev. B | Page 6 of 13
Data Sheet ADL5541
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
06877-002
3GND
4CB
1RFIN
NOTES
1. EXPOSED PADDL E . I NTERNALLY CO NNE CTED TO GND.
SOLDER TO A LOW IMP E DANCE GROUND P LANE.
2GND
6GND
5 VPOS
8RFOUT
7GND
ADL5541
TOP VIEW
(Not to Scal e)
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 RFIN RF Input. Requires a dc blocking capacitor.
2, 3, 6, 7 GND Ground. Connect these pins to a low impedance ground plane.
4 CB Low Frequency Bypass. A 1 µF capacitor should be connected between this pin and ground.
5
VPOS
Power Supply for Bias Controller. Connect directly to external power supply.
8 RFOUT RF Output and Supply Voltage. DC bias is provided to this pin through an inductor that is tied to the
external power supply. RF path requires a dc blocking capacitor.
Exposed Paddle Exposed Paddle. Internally connected to GND. Solder to a low impedance ground plane.
Rev. B | Page 7 of 13
ADL5541 Data Sheet
Rev. B | Page 8 of 13
TYPICAL PERFORMANCE CHARACTERISTICS
VPOS = 5 V and TA = 25°C, unless otherwise noted. C1 = 33 pF, C2 = 33 pF, L1 = 47 nH.
45
0
FREQ UE NCY (G Hz )
GAIN, P1dB, OIP3, NF (dB, d Bm)
40
35
30
25
20
15
10
5
5.75.34.94.54.13.73.32.92.52.11.71.30.90.5
OIP3 (0dBm)
P1dB
GAIN
NF
06877-003
Figure 3. Gain, P1dB, OIP3, and Noise Figure vs. Frequency
16
10
FREQ UE NCY (G Hz )
GAIN (dB)
5.75.34.94.54.13.73.32.92.52.11.71.30.90.5
15
14
13
12
11
+25°C
–40°C
+85°C
06877-004
Figure 4. Gain vs. Frequency and Temperature
0
–45 06
FREQ UE NCY (G Hz )
S11, S22, S 12 (d B)
–5
–10
–15
–20
–25
–30
–35
–40
12345
S22
S11
S12
06877-005
Figure 5. Input Return Loss (S11), Output Return Loss (S22), and
Reverse Isolation (S12) vs. Frequency
45
0
FREQ UE NCY (G Hz )
OIP3 AND P1d B (dBm)
40
35
30
25
20
15
10
5
5.75.34.94.54.13.73.32.92.52.11.71.30.90.5
OIP3 ( + 25°C)
OIP3 (–40°C) OI P3 (+ 85°C)
P1d B ( +85° C)
P1dB ( + 25°C)
P1dB (–40°C)
06877-006
Figure 6. OIP3 and P1dB vs. Frequency and Temperature
50
10–5 15
P
OUT
(dBm)
OIP3 (dBm)
45
40
35
30
25
20
15
–3 –1 1 3 5 7 9 11 13
500MHz
2GHz
900MHz
2.4GHz
3.5GHz
06877-007
Figure 7. OIP3 vs. Output Power (POUT) and Frequency
8
206.0
FREQ UE NCY (G Hz )
NOI S E FIGURE ( dB)
7
6
5
4
3
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
–40°C
+25°C
+85°C
06877-008
Figure 8. Noise Figure vs. Frequency and Temperature
Data Sheet ADL5541
30
037.0
OI P 3 ( dBm)
PERCENTAG E ( %)
25
20
15
10
5
38.5 40.0 41.5 43.0
06877-009
Figure 9. OIP3 Distribution at 900 MHz
25
019.4
P1dB (dBm)
PERCENTAG E ( %)
20
15
10
5
19.5 19.6 19.7 19.8 19.9 20.0 20.1
06877-010
Figure 10. P1dB Distribution at 900 MHz
25
015.08
GAI N ( dB)
PERCENTAG E ( %)
20
15
10
5
15.11 15.14 15.17 15.20 15.23 15.26
06877-011
Figure 11. Gain Distribution at 900 MHz
30
0
3.30 3.36 3.42 3.48 3.54 3.60 3.66 3.72 3.78
NOISE FIGURE (dB)
PERCENTAG E ( %)
25
20
15
10
5
06877-012
Figure 12. Noise Figure Distribution at 900 MHz
100
70
75
80
85
90
95
–6 –4 –2 0 2 4 6 810 12 14 16 18 20 22
06877-100
SUPPLY CURRE NT (mA)
POUT (d Bm)
+25°C
–40°C
+85°C
Figure 13. Supply Current vs. POUT and Temperature
Rev. B | Page 9 of 13
ADL5541 Data Sheet
OPERATING TO 20 MHz
VPOS = 5 V and TA = 25°C, unless otherwise noted. C1 = 0.1 µF, C2 = 0.1 µF, L1 = 1 µH.
0
5
10
15
20
25
30
35
40
20 40 60 80 100 120 140
GAIN, P1dB, OIP3, NF (dB, dBm)
FREQUENCY (MHz)
OIP3
NF
06877-114
GAIN
P1dB
Figure 14. Gain, P1dB, OIP3, and Noise Figure vs. Frequency
15.0
15.5
16.0
16.5
17.0
17.5
18.0
20 40 60 80 100 120 140
GAI N (dB)
FREQUENCY (MHz)
+25°C
–40°C
+85°C
06877-115
Figure 15. Gain vs. Frequency and Temperature
–30
–25
–20
–15
–10
–5
0
20 30 40 50 60 70 80 90 100 110 120 130 140
S11, S 22, S12 ( dB)
FREQUENCY (MHz)
S11
S12
S22
06877-116
Figure 16. Input Return Loss (S11), Output Return Loss (S22), and
Reverse Isolation (S12) vs. Frequency
5
10
15
20
25
30
35
40
45
20 40 60 80 100 120 140
OIP3 AND P1dB ( dBm)
FREQUENCY (MHz)
OI P 3 ( –40°C)
OI P 3 ( + 25°C)
P1d B ( +25°C)
P1d B ( +85°C)
P1d B ( –40°C)
OI P 3 ( + 85°C)
06877-117
Figure 17. OIP3 and P1dB vs. Frequency and Temperature
20
22
24
26
28
30
32
34
36
38
40
–5 –3 –1 13 5 7 9 11 13 15
06877-118
OI P 3 ( dBm)
P
OUT
(d Bm)
20MHz
60MHz
140MHz
100MHz
Figure 18. OIP3 vs. Output Power (POUT) and Frequency
2.0
2.5
3.0
3.5
4.0
4.5
5.0
20 40 60 80 100 120 140
NOISE FIGURE (dB)
FREQUENCY (MHz)
+25°C
–40°C
+85°C
06877-119
Figure 19. Noise Figure vs. Frequency and Temperature
Rev. B | Page 10 of 13
Data Sheet ADL5541
BASIC CONNECTIONS
The basic connections for operating the ADL5541 are shown in
Figure 20. Recommended components are listed in Table 5. The
input and output should be ac-coupled with appropriately sized
capacitors (device characterization was performed with 33 pF
capacitors). A 5 V dc bias is supplied to the amplifier via GND
(Pin 6) and through a biasing inductor connected to RFOUT
(Pin 8). The bias voltage should be decoupled using a 1 µF
capacitor, a 1.2 nF capacitor, and two 68 pF capacitors.
VCC
ADL5541
C4
68pF
C5
1.2nF
C6
1µF
VCC
C2
33pF
C1
33pF
RFIN RFOUT
L1
47nH
C3
1µF
GND
C7
68pF
06877-013
GND GND
CB VPOS
RFIN RFOUT
GND GND
1
2
3
4
8
7
6
5
Figure 20. Basic Connections
For operation below 500 MHz, a larger biasing choke and ac
coupling capacitors are necessary (see Table 5). Figure 21 shows
input return loss, output return loss, and gain for frequencies
between 200 MHz and 500 MHz. The noise figure performance
for operation from 200 MHz to 500 MHz is shown in Figure 22.
–30
–25
–20
–15
–10
–5
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
16.5
17.0
200 250 300 350 400 450 500
RET URN LOS S ( dB)
GAIN (d B)
FREQUENCY (MHz)
S11
S22
S21
06877-121
Figure 21. Input Return Loss (S11), Output Return Loss (S22), and
Gain (S21) vs. Frequency
2.0
2.5
3.0
3.5
4.0
4.5
200 250 300 350 400 450 500
NOISE FIGURE (dB)
FREQUENCY (MHz)
06877-122
Figure 22. Noise Figure vs. Frequency from 200 MHz to 500 MHz
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 23 shows the recommended land pattern for the ADL5541.
To minimize thermal impedance, the exposed paddle on the
package underside should be soldered down to a ground plane
along with Pin 2, Pin 3, Pin 6, and Pin 7. If multiple ground
layers exist, they should be stitched together using vias (a
minimum of five vias is recommended). For more information
on land pattern design and layout, refer to Application Note
AN-772, A Design and Manufacturing Guide for the Lead Frame
Chip Scale Package (LFCSP).
PIN 1
PIN 4
PIN 8
PIN 5
1.85mm
2.03mm
1.78mm0.5mm
0.71mm
1.53mm
06877-016
Figure 23. Recommended Land Pattern
Table 5. Recommended Components for Basic Connections
Frequency C1 C2 C3 L1 C4 C5 C6 C7
20 MHz to 200 MHz 0.1 µF 0.1 µF 1 µF 1 µH (Coilcraft 0805LS-102XJL_ or equivalent) 68 pF 1.2 nF 1 µF 68 pF
200 MHz to 500 MHz 0.1 µF 0.1 µF 1 µF 470 nH (Coilcraft 0603LS-471-NX or equivalent) 68 pF 1.2 nF 1 µF 68 pF
500 MHz to 6000 MHz 33 pF 33 pF 1 µF 47 nH (Coilcraft 0603CS-47-NX or equivalent) 68 pF 1.2 nF 1 µF 68 pF
Rev. B | Page 11 of 13
ADL5541 Data Sheet
Rev. B | Page 12 of 13
EVALUATION BOARD
Figure 26 shows the schematic for the ADL5541 evaluation
board. The board is powered by a single 5 V supply.
The components used on the board are listed in Table 6. Power
can be applied to the board through clip-on leads (VCC and
GND) or through a 2-pin header (W1).
06877-017
Figure 24. Evaluation Board Layout (Bottom)
06877-018
Figure 25. Evaluation Board Layout (Top)
ADL5541
C4
68pF
C5
1.2nF
C6
1µF
VCC
C2
33pF
C1
33pF
RFIN RFOUT
L1
47nH
C3
1µF
GND
C7
68pF C8
OPEN C9
OPEN VCC
W1
06877-019
DUT1
GND GND
CB VPOS
RFIN RFOUT
GND GND
1
2
3
4
8
7
6
5
Figure 26. Evaluation Board Schematic
Table 6. Evaluation Board Configuration
Component Function Default Value
DUT1 Gain block ADL5541
C1, C2 AC coupling capacitors 33 pF, 0402
C3 Low frequency bypass capacitor 1 μF, 0805
C4, C5, C6, C7, C8, C9 Power supply decoupling capacitors C4 and C7 = 68 pF, 0603
C5 = 1.2 nF, 0603
C6 = 1 μF, 0805
C8 and C9 = open
L1 DC bias inductor 47 nH, 0603 (Coilcraft 0603CS-47-NX or equivalent)
VCC and GND Clip-on terminals for power supply
W1 2-pin header for connection of ground and supply via cable
Data Sheet ADL5541
Rev. B | Page 13 of 13
OUTLINE DIMENSIONS
TOP VIEW
8
1
5
4
0.30
0.25
0.20
BOTTOM VIEW
PIN 1 INDEX
AREA
SEATING
PLANE
0.80
0.75
0.70
1.55
1.45
1.35
1.84
1.74
1.64
0.203 REF
0.05 MAX
0.02 NOM
0.50 BSC
EXPOSED
PAD
3.10
3.00 SQ
2.90
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COPLANARITY
0.08
0.50
0.40
0.30
COMPLIANT
TO
JEDEC STANDARDS MO-229-WEED
12-07-2010-A
PIN1
INDICATOR
(R0.15)
Figure 27. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD]
3 mm × 3 mm Body, Very Very Thin, Dual Lead
(CP-8-13)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
ADL5541ACPZ-R7 −40°C to +85°C 8-Lead LFCSP_WD, 7” Tape and Reel CP-8-13 Q13
ADL5541-EVALZ Evaluation Board
1 Z = RoHS Compliant Part.
©2007–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06877-0-2/15(B)