VESD12A1C-HD1
Document Number 81799
Rev. 1.2, 02-Sep-08
Vishay Semiconductors
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1
20855
20856
21
For technical support, please contact: ESD-Protection@vishay.com
ESD-Protection Diode in LLP1006-2L
Features
Ultra compact LLP1006-2L package
Low package height < 0.4 mm
1-line ESD-protection
Low leakage current < 0.01 µA
Low load capacitance CD = 12.5 pF
(VR = 6 V; f = 1 MHz)
ESD-protection acc. IEC 61000-4-2
± 30 kV contact discharge
± 30 kV air discharge
High surge current acc. IEC61000-4-5 IPP > 4 A
Soldering can be checked by standard vision
inspection. No X-ray necessary
Lead (Pb)-free component
Pin plating NiPdAu (e4) no whisker growth
Component in accordance to RoHS 2002/95/EC
and WEEE 2002/96/EC
Marking (example only)
Bar = Cathode marking
X = Date code
Y = Type code (see table below)
Ordering Information
Package Data
Absolute Maximum Ratings
* Please see document “Vishay Green and Halogen-Free Definitions (5-2008)” http://www.vishay.com/doc?99902
21121
XY
Device name Ordering code Taped units per reel
(8 mm tape on 7" reel) Minimum order quantity
VESD12A1C-HD1 VESD12A1C-HD1-GS08 8000 8000
Device name Package
name
Type
code Weight Molding compound
flammability rating Moisture sensitivity level Soldering conditions
VESD12A1C-HD1 LLP1006-2L G 0.72 mg UL 94 V-0 MSL level 1
(according J-STD-020) 260 °C/10 s at terminals
Rating Test conditions Symbol Value Unit
Peak pulse current Acc. IEC 61000-4-5, tP = 8/20 µs/single shot IPPM 4A
Peak pulse power Acc. IEC 61000-4-5, tP = 8/20 µs/single shot PPP 92 W
ESD immunity Contact discharge acc. IEC 61000-4-2; 10 pulses VESD ± 30 kV
Air discharge acc. IEC 61000-4-2; 10 pulses VESD ± 30 kV
Operating temperature Junction temperature TJ- 40 to + 125 °C
Storage temperature TSTG - 55 to + 150 °C
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Document Number 81799
Rev. 1.2, 02-Sep-08
VESD12A1C-HD1
Vishay Semiconductors
For technical support, please contact: ESD-Protection@vishay.com
BiAs-Mode (Bidirectional Asymmetrical protection mode)
With the VESD12A1C-HD1 one signal- or data-lines (L1) can be protected against voltage transients. With
pin 1 connected to ground and pin 2 connected to a signal- or data-line which has to be protected. As long as
the voltage level on the data- or signal-line is between 0 V (ground level) and the specified Maximum Reverse
Working Voltage (VRWM) the protection diode between data line and ground offers a high isolation to the ground
line. The protection device behaves like an open switch.
As soon as any positive transient voltage signal exceeds the break through voltage level of the protection
diode, the diode becomes conductive and shorts the transient current to ground. Now the protection device
behaves like a closed switch. The Clamping Voltage (VC) is defined by the BReakthrough Voltage (VBR) level
plus the voltage drop at the series impedance (resistance and inductance) of the protection device.
Any negative transient signal will be clamped accordingly. The negative transient current is flowing in the
forward direction of the protection diode. The low Forward Voltage (VF) clamps the negative transient close to
the ground level.
Due to the different clamping levels in forward and reverse direction the VESD12A1C-HD1 clamping behaviour
is Bidirectional and Asymmetrical (BiAs).
Electrical Characteristics
Ratings at 25 °C, ambient temperature, unless otherwise specified
VESD12A1C-HD1
BiAs mode (between pin 1 and pin 2)
L1
20925
2
1
Parameter Test conditions/remarks Symbol Min. Typ. Max. Unit
Protection paths Number of lines which can be protected Nlines 1 lines
Reverse stand off voltage at IR = 0.1 µA VRWM 12 V
Reverse current at VR = 12 V IR< 0.01 0.1 µA
Reverse break down voltage at IR = 1 mA VBR 13.5 14 16 V
Reverse clamping voltage
at IPP = 1 A VC15.8 17 V
at IPP = IPPM = 4 A VC20 23 V
Forward clamping voltage
at IPP = 0.2 A VF0.9 1.2 V
at IPP = 1 A VF1.1 1.5 V
at IPP = IPPM = 4 A VF1.7 2.1 V
Capacitance
at VR = 0 V; f = 1 MHz CD30 36 pF
at VR = 6 V; f = 1 MHz CD12.5 pF
VESD12A1C-HD1
Document Number 81799
Rev. 1.2, 02-Sep-08
Vishay Semiconductors
www.vishay.com
3
For technical support, please contact: ESD-Protection@vishay.com
Typical Characteristics
Tamb = 25 °C, unless otherwise specified
Figure 1. 8/20 µs Peak Pulse Current Wave Form
(acc. IEC 61000-4-5)
Figure 2. ESD Discharge Current Wave Form
acc. IEC 61000-4-2 (330 Ω/150 pF)
Figure 3. Typical Capacitance CD vs. Reverse Voltage VR
0 %
20 %
40 %
60 %
80 %
100 %
010203040
Time (µs)
IPPM
20 µs to 50 %
8 µs to 100 %
20548
0 %
20 %
40 %
60 %
80 %
100 %
120 %
- 10 0 10 20 30 40 50 60 70 80 90 100
Time (ns)
Discharge Current IESD
Rise time = 0.7 ns to 1 ns
53 %
27 %
20557
0
5
10
15
20
25
30
35
0123456789101112
f = 1 MHz
20678VR (V)
CD (pF)
Figure 4. Typical Forward Current IF vs. Forward Voltage VF
Figure 5. Typical Reverse Voltage VR vs. Reverse Current IR
Figure 6. Typical Clamping Voltage vs. Peak Pulse Current IPP
0.001
0.01
0.1
1
10
100
0.5 0.6 0.7 0.80.9
20679 VF (V)
IF (mA)
0
2
4
6
8
10
12
14
16
0.01 0.1 1 10 100 1000 10000
20680IR (µA)
VR (V)
0
5
10
15
20
25
0
reverse
forward
20681IPP (A)
V
F
/V
C
(V)
Measured acc. IEC 61000-4-5
(8/20 µs - wave form)
1 234 5
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Document Number 81799
Rev. 1.2, 02-Sep-08
VESD12A1C-HD1
Vishay Semiconductors
For technical support, please contact: ESD-Protection@vishay.com
Figure 7. Typical Clamping Performance at + 8 kV Contact
Discharge (acc. IEC 61000-4-2)
Figure 8. Typical Clamping Performance at - 8 kV Contact
Discharge (acc. IEC 61000-4-2)
Figure 9. Typical Clamping Voltage at ± ESD Contact Discharge
(acc. IEC 61000-4-2)
- 20
- 10
0
10
20
30
40
50
60
- 10 0 10 20 30 40 50 60 70 8090
acc. IEC 61000-4-2
+ 8 kV
contact discharge
reverse
20683
t (ns)
V
C-ESD
(V)
- 50
- 40
- 30
- 20
- 10
0
10
20
- 10 0 10 20 30 40 50 60 70 8090
20682t (ns)
VC-ESD (V)
acc. IEC 61000-4-2
- 8 kV
contact discharge
forward
- 150
- 100
- 50
0
50
100
150
200
0 5 10 15 20
acc. IEC 61000-4-2
contact discharge
VC-ESD
positive discharge
(pin 2 to pin 1)
negative discharge
(pin 1 to pin 2)
20684
VC-ESD (V)
VESD (kV)
VESD12A1C-HD1
Document Number 81799
Rev. 1.2, 02-Sep-08
Vishay Semiconductors
www.vishay.com
5
For technical support, please contact: ESD-Protection@vishay.com
Package Dimensions in millimeters (inches): LLP1006-2L
20812
foot print recommendation:
Document no.:S8-V-3906.04-005 (4)
solder
resist mask
solder pad
0.55 [0.022]
0.45 [0.018]
0.25 [0.010]
0.15 [0.006]
0.45 [0.018]
0.35 [0.014]
0.3 [0.012]
0.2 [0.008]
0.4 [0.016]
0.33 [0.013]
1.05 [0.041]
0.95 [0.037]
soldermask opening +/-0,03
measured middle of the package
0.05 [0.002]
0 [0.000]
0.125 [0.005] ref.
0.65 [0.026]
0.55 [0.022]
0.05 [0.002]
0.25 [0.010]
0.5 [0.020]
1 [0.039]
0.5 [0.020]
0.6 [0.024]
0.2 [0.008]
Rev. 4 - Date: 28.Aug.2008
Created - Date: 13.July.2007
Orientation identification
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Document Number 81799
Rev. 1.2, 02-Sep-08
VESD12A1C-HD1
Vishay Semiconductors
For technical support, please contact: ESD-Protection@vishay.com
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1. Meet all present and future national and international statutory requirements.
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systems with respect to their impact on the health and safety of our employees and the public, as well as
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known as ozone depleting substances (ODSs).
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and forbid their use within the next ten years. Various national and international initiatives are pressing for an
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Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use
of ODSs listed in the following documents.
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respectively.
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substances and do not contain such substances.
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with such unintended or unauthorized use.
Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
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Revision: 02-Oct-12 1Document Number: 91000
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