AO3421E
30V P-Channel MOSFET
General Description Product Summary
V
DS
I
D
(at V
GS
=-10V) -3A
R
DS(ON)
(at V
GS
=-10V) < 95mΩ
R
DS(ON)
(at V
GS
=-4.5V) < 160mΩ
Typical ESD protection
HBM Class 2
Symbol
V
DS
The AO3421E combines advanced trench MOSFET
technology with a low resistance package to provide
extremely low R
DS(ON)
. This device is ideal for load switch
and battery protection applications.
-30V
Drain-Source Voltage -30 V
Maximum UnitsParameter
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
SOT23
Top View Bottom View
D
G
S
G
S
D
S
G
D
V
GS
I
DM
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJL
UnitsParameter Typ Max °C/W
R
θJA
70 90
Maximum Junction-to-Ambient
A
Maximum Junction-to-Lead °C/W
°C/W
Maximum Junction-to-Ambient
A D
63 125
80
100
A
I
D
-3
-2
-18
V±20Gate-Source Voltage T
A
=25°C
T
A
=70°C
Continuous Drain
Current
Pulsed Drain Current
C
°C
Thermal Characteristics
Power Dissipation
B
P
D
T
A
=25°C W
1.4
0.9
T
A
=70°C
Junction and Storage Temperature Range -55 to 150
www.aosmd.com Page 1 of 5
AO3421E
Symbol Min Typ Max Units
BV
DSS
-30 V
V
DS
=-30V, V
GS
=0V -1
T
J
=55°C -5
I
GSS
±10 µA
V
GS(th)
Gate Threshold Voltage -1.4 -2 -2.5 V
I
D(ON)
-18 A
78 95
T
J
=125°C 112 135
120 160 mΩ
g
FS
6 S
V
SD
-0.8 -1 V
I
S
-1.5 A
C
iss
215 pF
C
oss
46.5 pF
C
rss
27.5 pF
R
g
9.5 19 Ω
Q
g
(10V) 4.6 8 nC
Q
g
(4.5V) 2.2 4 nC
Q
gs
0.85 nC
Q
gd
1.2 nC
t
D(on)
8 ns
t
4
ns
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS
Parameter Conditions
Drain-Source Breakdown Voltage
On state drain current
I
D
=-250µA, V
GS
=0V
V
GS
=-10V, V
DS
=-5V
V
GS
=-10V, I
D
=-3A
R
DS(ON)
Static Drain-Source On-Resistance
I
DSS
µA
V
DS
=V
GS，
I
D
=-250µA
V
DS
=0V, V
GS
=±16V
Zero Gate Voltage Drain Current
Gate-Body leakage current
mΩ
I
S
=-1A,V
GS
=0V
V
DS
=-5V, I
D
=-3A
V
GS
=-4.5V, I
D
=-2A
Forward Transconductance
Diode Forward Voltage
Turn-On Rise Time
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
V
=-10V, V
=-15V, R
=5
Ω
,
Reverse Transfer Capacitance V
GS
=0V, V
DS
=-15V, f=1MHz
SWITCHING PARAMETERS
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
Total Gate Charge
V
GS
=-10V, V
DS
=-15V, I
D
=-3A
Gate Source Charge
Gate Drain Charge
Total Gate Charge
t
r
4
ns
t
D(off)
13.5 ns
t
f
4 ns
t
rr
9 ns
Q
rr
16 nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge I
F
=-3A, dI/dt=500A/µs
Turn-On Rise Time
Turn-Off DelayTime
I
F
=-3A, dI/dt=500A/µs
Turn-Off Fall Time
V
GS
=-10V, V
DS
=-15V, R
L
=5
Ω
,
R
GEN
=3Ω
A. The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PDis based on TJ(MAX)=150°C, using ≤10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedance which is measured with the device mounted on 1in2FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
Rev 0: April 2012 www.aosmd.com Page 2 of 5
AO3421E
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
2
4
6
8
10
0123456
-ID(A)
-VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
70
80
90
100
110
120
130
140
150
0123456
RDS(ON) (mΩ
Ω
Ω
Ω)
-ID(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
0.8
1
1.2
1.4
1.6
1.8
0 25 50 75 100 125 150 175
Normalized On-Resistance
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
VGS=-4.5V
ID=-2A
VGS=-10V
ID=-3A
25°C
125°C
VDS=-5V
VGS=-4.5V
VGS=-10V
0
5
10
15
20
012345
-ID(A)
-VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
V
GS
=-3.0V
-4V
-6V
-7V
-10V
-4.5V
-5V
-3.5V
40
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
0.0 0.2 0.4 0.6 0.8 1.0 1.2
-IS(A)
-VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
25°C
125°C
(Note E)
50
70
90
110
130
150
170
190
210
230
250
2 4 6 8 10
RDS(ON) (mΩ
Ω
Ω
Ω)
-VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
ID=-3A
25°C
125°C
Rev 0: April 2012 www.aosmd.com Page 3 of 5
AO3421E
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
2
4
6
8
10
012345
-VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
0
50
100
150
200
250
300
0 5 10 15 20 25 30
Capacitance (pF)
-VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
Coss
C
rss
VDS=-15V
ID=-3A
1
10
100
1000
10000
0.00001 0.001 0.1 10 1000
Power (W)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Ambient (Note F)
TA=25°C
0.0
0.1
1.0
10.0
100.0
0.01 0.1 1 10 100
-ID(Amps)
-VDS (Volts)
Figure 9: Maximum Forward Biased
10
µ
s
10s
1ms
DC
RDS(ON)
limited
TJ(Max)=150°C
T
A
=25°C
100µs
10ms
Ambient (Note F)
Figure 9: Maximum Forward Biased
Safe Operating Area (Note F)
0.001
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Zθ
θ
θ
θJA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=125°C/W
Rev 0: April 2012 www.aosmd.com Page 4 of 5
AO3421E
VDC
Ig
Vds
DUT
VDC
Vgs
Vgs Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
-
+
-10V
Vdd
Id
Vgs
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Vds L
-
2
E = 1/2 LI
AR
AR
BV
DSS
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Resistive Switching Test Circuit & Waveforms
-
+
Vgs
Vds
t t
t
tt
t
90%
10%
r
on
d(off)
f
off
d(on)
Vdd
Vgs
Vgs
Rg
DUT
VDC
Vgs
Id
Vgs
-
+
I
AR
Ig
Vgs
-
+
VDC
DUT
L
Vgs
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
dI/dt
RM
rr
Vdd
Vdd
Q = - Idt
t
rr
-Isd
-Vds
F
-I
-I
Rev 0: April 2012
www.aosmd.com
Page 5 of 5