IDT74AUC16373 1.8V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 1.8V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS IDT74AUC16373 DESCRIPTION: FEATURES: This 16-bit transparent D-type latch is built using advanced CMOS technology. The device can be used as a single 16-bit latch or as two 8-bit latches. When the latch enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs. A buffered output enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The OE input does not affect the internal operation of the latch. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VDD through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * 1.8V Optimized * 0.8V to 2.7V Operating Range * Inputs/outputs tolerant up to 3.6V * Output drivers: 9mA @ 2.3V * Supports hot insertion * Available in TSSOP, TVSOP, and VFBGA packages APPLICATIONS: * high performance, low voltage communications systems * high performance, low voltage computing systems FUNCTIONAL BLOCK DIAGRAM 1OE 2OE 1LE 2LE C1 C1 1Q1 1D 1 2Q 1 2D1 1D TO SEVEN OTHER CHANNELS 1D TO SEVEN OTHER CHANNELS The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE FEBRUARY 2003 1 (c) 2003 Integrated Device Technology, Inc. DSC-6169/9 IDT74AUC16373 1.8V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE PINOUT CONFIGURATION 6 1LE 1D2 1D4 1D6 1D8 2D1 2D3 2D5 2D7 2LE 5 NC 1D1 1D3 1D5 1D7 2D2 2D4 2D6 2D8 NC 4 NC GND VDD GND GND VDD GND NC 3 NC GND VDD GND GND VDD GND NC 2 NC 1Q1 1Q3 1Q5 1Q7 2Q2 2Q4 2Q6 2Q8 NC 1 1OE 1Q2 1Q4 1Q6 1Q8 2Q1 2Q3 2Q5 2Q7 2OE A B C D E F G H J K VFBGA NOTE: NC = No Internal Connection 56 BALL VFBGA PACKAGE LAYOUT A B C D E F 6 5 4 3 2 1 TOP VIEW 2 G H J K IDT74AUC16373 1.8V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION Symbol VTERM Description Max Unit Terminal Voltage with Respect to GND -0.5 to +3.6 V -0.5 to +3.6 V (all input and VDD terminals) 1OE 1 48 1LE 1Q 1 2 47 1D1 1Q 2 3 46 1D2 GND 4 TSTG Storage Temperature -65 to +150 C 45 GND IOUT Continuous DC Output Current 20 mA 1Q 3 5 44 1D3 IIK Continuous Clamp Current, 50 mA 1Q 4 6 43 1D4 VDD 7 42 VDD 1Q 5 8 41 1D5 1Q 6 9 40 1D6 GND 10 39 GND 1Q 7 11 38 1D7 1Q 8 12 37 1D8 2Q 1 13 36 2D1 2Q 2 14 35 2D2 GND 15 34 GND 2Q 3 16 33 2D3 2Q 4 17 32 2D4 VDD 18 31 VDD 2Q 5 19 30 2D5 2Q 6 20 29 2D6 GND 21 28 GND 2Q 7 22 27 2D7 2Q 8 23 26 2D8 2OE 24 25 2LE VTERM Terminal Voltage with Respect to GND (any I/O or Output terminals in highimpedance or power-off state) VI < 0, or VI > VDD IOK Continuous Clamp Current, VO < 0 -50 mA IDD Continuous Current through 100 mA ISS each VDD or GND NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. CAPACITANCE (TA = +25C, f = 1.0MHz, VDD = 2.5V) Symbol CIN Parameter Conditions VIN = 0V 3 4 pF VOUT = 0V 5.5 6.5 pF CI(3) Input Port Capacitance VIN = 0V 3 4 pF FUNCTION TABLE (EACH 8-BIT LATCH)(1) PIN DESCRIPTION Description Data Inputs xLE Latch Enable Inputs xQx 3-State Outputs xOE 3-State Output Enable Inputs (Active LOW) Output xOE xLE xDx xQx L H H H L H L L L L X Q(2) H X X Z NOTES: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-Impedance 2. Level of Q before the indicated steady-state conditions were established. 3 Unit Output Capacitance NOTES: 1. Applies to Control Inputs. 2. Applies to Data Outputs. 3. Applies to Data Inputs. TSSOP/ TVSOP TOP VIEW xDx Max. Input Capacitance Inputs Pin Names Typ. COUT(2) (1) IDT74AUC16373 1.8V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE RECOMMENDED OPERATING CHARACTERISTICS(1) Symbol VDD Parameter Test Conditions Supply Voltage VDD = 0.8V VIH VIL Input HIGH Voltage Level Input LOW Voltage Level VI Input Voltage VO Output Voltage IOH IOL HIGH Level Output Current LOW Level Output Current Min. Max. Unit 0.8 2.7 V VDD -- VDD = 1.1V to 1.3V 0.65 x VDD -- VDD = 1.4V to 1.6V 0.65 x VDD -- VDD = 1.65V to 1.95V V 0.65 x VDD -- VDD = 2.3V to 2.7V 1.7 -- VDD = 0.8V -- 0 VDD = 1.1V to 1.3V -- 0.35 x VDD VDD = 1.4V to 1.6V -- 0.35 x VDD VDD = 1.65V to 1.95V -- 0.35 x VDD VDD = 2.3V to 2.7V -- 0.7 0 2.7 V Active State 0 VDD V 3-State 0 2.7 VDD = 0.8V -- -0.7 VDD = 1.1V -- -3 VDD = 1.4V -- -5 VDD = 1.65V -- -8 VDD = 2.3V -- -9 VDD = 0.8V -- 0.7 VDD = 1.1V -- 3 VDD = 1.4V -- 5 VDD = 1.65V -- 8 VDD = 2.3V -- 9 V mA mA t/v Input Transition Rise or Fall Time -- 20 ns/V TA Operating Free-Air Temperature -40 +85 C NOTE: 1. All unused inputs of the device must be held at VDD or GND to ensure proper operation. DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE(1) Following Conditions Apply Unless Otherwise Specified: Operating Conditions: TA = -40C to +85C Symbol Parameter Test Conditions IIH Input HIGH or LOW Current VDD = 2.7V, VI = VDD or GND IIL All Inputs IOFF Input/Output Power Off Leakage VDD = 0V, VIN or VO 2.7V IOZH High Impedance Output Current VDD = 2.7V IOZL (3-State Output Pins) IDDL Quiescent Power Supply Current IDDH VO = VDD VO = GND VDD = 0.8V to 2.7V VIN = GND or VDD IDDZ NOTE: 1. All unused inputs of the device must be held at VDD or GND to ensure proper operation. 4 Min. Typ. Max. Unit -- -- 5 A -- -- 10 A -- -- 10 A -- -- 10 -- -- 20 A IDT74AUC16373 1.8V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE OUTPUT DRIVE CHARACTERISTICS Symbol VOH VOL Parameter Output HIGH Voltage Output LOW Voltage NOTES: 1. VIL and VIH must be within 2. Demonstrates operation for 3. Demonstrates operation for 4. Demonstrates operation for 5. Demonstrates operation for Test Conditions(1) VDD = 0.8V - 2.7V IOH = -100A VDD = 0.8V IOH = -0.7mA IOH = -3mA VDD = 1.1V(2) IOH = -5mA VDD = 1.4V(3) (4) VDD = 1.65V IOH = -8mA VDD = 2.3V(5) IOH = -9mA VDD = 0.8V - 2.7V IOH = 100A VDD = 0.8V IOL = 0.7mA IOL = 3mA VDD = 1.1V(2) (3) IOL = 5mA VDD = 1.4V VDD = 1.65V(4) IOL = 8mA IOH = 9mA VDD = 2.3V(5) Min. VDD - 0.1 -- 0.8 1 1.2 1.8 -- -- -- -- -- -- Typ. -- 0.55 -- -- -- -- -- 0.25 -- -- -- -- Max. -- -- -- -- -- -- 0.2 -- 0.3 0.4 0.45 0.6 Unit V V the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS table for the appropriate VDD range. TA = -40C to +85C. nominal VDD = 1.2V. nominal VDD = 1.5V. nominal VDD = 1.8V. nominal VDD = 2.5V. OPERATING CHARACTERISTICS, TA = 25C Symbol CPD CPD Parameter Power Dissipation Capacitance Outputs Enabled Power Dissipation Capacitance Outputs Disabled Test Conditions CL = 0pF f = 10MHz VDD = 0.8V 21 VDD = 1.2V 22 VDD = 1.5V 23 VDD = 1.8V 25 VDD = 2.5V 29 Unit pF 5 5 6 7 10 pF SWITCHING CHARACTERISTICS(1) VDD = 0.8V VDD = 1.2V0.1V Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW Parameter Propagation Delay xDx to xQx xLE to xQx Output Enable Time xOE to xQx Output Disable Time xOE to xQx Set-up Time, Data before LE Hold Time, Data after LE Pulse Duration, LE HIGH VDD = 1.5V0.1V VDD = 1.8V0.15V VDD = 2.5V0.2V Typ. 8 10.6 9 Min. 1.1 1.4 1.3 Max. 3.8 4.9 4.5 Min. 0.6 0.7 0.6 Max. 2.4 3.2 2.9 Min. 0.7 0.7 0.8 Typ. 1.5 1.6 1.7 Max. 2.4 2.8 2.9 Min. 0.6 0.6 0.7 Max. 1.9 2.1 2.2 Unit ns 13 2.4 7 2.4 4.8 1.1 2.7 4.6 0.4 2.5 ns 1.7 -- 4.2 0.7 1.2 2.9 -- -- -- 0.5 0.8 2.3 -- -- -- 0.4 0.7 2.1 -- -- -- -- -- -- 0.4 0.6 1.7 -- -- -- ns ns ns NOTE: 1. See TEST CIRCUITS AND WAVEFORMS. TA = -40C to +85C. 5 ns IDT74AUC16373 1.8V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS(1) Symbol VDD = 0.8V VDD = 1.2V0.1V VDD = 1.5V0.1V VDD = 1.8V0.15V VDD = 2.5V0.2V Unit VLOAD 2xVDD 2xVDD 2xVDD 2xVDD 2xVDD V VT VDD/2 VDD/2 VDD/2 VDD/2 VDD/2 V VLZ 100 100 100 150 150 mV VHZ 100 100 100 150 150 mV RL 2 2 2 1 0.5 K CL 15 15 15 30 30 pF VLOAD VDD Open RL (1) Pulse Generator VIN VDD VT 0V VOH VT VOL SAME PHASE INPUT TRANSITION GND tPLH tPHL tPLH tPHL OUTPUT VOUT D.U.T. RT RL CL VDD VT 0V OPPOSITE PHASE INPUT TRANSITION Propagation Delay Test Circuits for All Outputs DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTE: 1. Pulse Generator for All Pulses: Rate 10MHz; Slew Rate 1V/ns. tPZL SWITCH POSITION Test Switch Open Drain Disable Low Enable Low VLOAD Disable High Enable High GND All Other Tests Open DISABLE ENABLE CONTROL INPUT OUTPUT SWITCH NORMALLY CLOSED LOW tPZH OUTPUT SWITCH NORMALLY OPEN HIGH tPLZ VLOAD/2 VT VDD VT 0V VLOAD/2 VOL + VLZ VOL tPHZ VOH VOH - VHZ 0V VT 0V NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. Enable and Disable Times VDD LOW-HIGH-LOW PULSE TIMING INPUT VT 0V VT 0V tW tSU VDD VT HIGH-LOW-HIGH PULSE DATA INPUT tH VDD VT VT 0V Setup and Hold Times Pulse Width 6 IDT74AUC16373 1.8V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION IDT XX AUC Temp. Range X Bus- Hold XX Family XX XXX Device Type Package CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 X Temp. I Industrial Temperature Range BV PA PF Very Fine Pitch Ball Grid Array Thin Shrink Small Outline Package Thin Very Small Outline Package 373 16-Bit Transparent D-Type Latch with 3-State Outputs 16 Double-Density Blank No bus-hold 74 - 40C to +85C for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com 7 for Tech Support: logichelp@idt.com (408) 654-6459