74LVC1G53 2-channel analog multiplexer/demultiplexer Rev. 10 -- 7 December 2016 Product data sheet 1. General description The 74LVC1G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device. The 74LVC1G53 provides one analog multiplexer/demultiplexer with a digital select input (S), two independent inputs/outputs (Y0 and Y1), a common input/output (Z) and an active LOW enable input (E). When pin E is HIGH, the switch is turned off. Schmitt trigger action at the select and enable inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 1.65 V to 5.5 V. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Very low ON resistance: 7.5 (typical) at VCC = 2.7 V 6.5 (typical) at VCC = 3.3 V 6 (typical) at VCC = 5 V Switch current capability of 32 mA High noise immunity CMOS low power consumption TTL interface compatibility at 3.3 V Latch-up performance meets requirements of JESD 78 Class I ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Control inputs accept voltages up to 5 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C 74LVC1G53 Nexperia 2-channel analog multiplexer/demultiplexer 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G53DP 40 C to +125 C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVC1G53DC 40 C to +125 C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74LVC1G53GT 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 1.95 0.5 mm SOT833-1 74LVC1G53GF 40 C to +125 C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 1 0.5 mm SOT1089 74LVC1G53GD 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 3 2 0.5 mm SOT996-2 74LVC1G53GM 40 C to +125 C XQFN8 plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6 1.6 0.5 mm SOT902-2 74LVC1G53GN 40 C to +125 C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.2 1.0 0.35 mm SOT1116 74LVC1G53GS 40 C to +125 C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 1.0 0.35 mm SOT1203 4. Marking Table 2. Marking codes Type number Marking code[1] 74LVC1G53DC V53 74LVC1G53DP V53 74LVC1G53GT V53 74LVC1G53GF V3 74LVC1G53GD V53 74LVC1G53GM V53 74LVC1G53GN V3 74LVC1G53GS V3 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram < 6 < = ( DDK Fig 1. Logic symbol 74LVC1G53 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 2 of 27 74LVC1G53 Nexperia 2-channel analog multiplexer/demultiplexer < 6 = < ( Fig 2. DDG Logic diagram 6. Pinning information 6.1 Pinning /9&* = 9&& ( < *1' < *1' 6 /9&* = 9&& ( < *1' < *1' 6 DDG 7UDQVSDUHQWWRSYLHZ DDG Fig 3. Pin configuration SOT505-2 and SOT765-1 74LVC1G53 Product data sheet Fig 4. Pin configuration SOT833-1, SOT1089, SOT1116 and SOT1203 All information provided in this document is subject to legal disclaimers. Rev. 10 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 3 of 27 74LVC1G53 Nexperia 2-channel analog multiplexer/demultiplexer /9&* 9&& ( < *1' < *1' 6 < 6 = ( *1' = < *1' /9&* 9&& WHUPLQDO LQGH[DUHD DDL 7UDQVSDUHQWWRSYLHZ 7UDQVSDUHQWWRSYLHZ Fig 5. DDJ Pin configuration SOT996-2 Fig 6. Pin configuration SOT902-2 6.2 Pin description Table 3. Symbol Z Pin description Pin Description SOT505-2, SOT765-1, SOT833-1, SOT1089, SOT996-2, SOT1116 and SOT1203 SOT902-2 1 7 common output or input E 2 6 enable input (active LOW) GND 3 5 ground (0 V) GND 4 4 ground (0 V) S 5 3 select input Y1 6 2 independent input or output Y0 7 1 independent input or output VCC 8 8 supply voltage 7. Functional description Table 4. Function table[1] Input Channel on S E L L Y0 to Z or Z to Y0 H L Y1 to Z or Z to Y1 X H Z (switch off) [1] H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state. 74LVC1G53 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 4 of 27 74LVC1G53 Nexperia 2-channel analog multiplexer/demultiplexer 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions [1] VI input voltage IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V ISK switch clamping current VI < 0.5 V or VI > VCC + 0.5 V [2] Min Max Unit 0.5 +6.5 V 0.5 +6.5 50 - mA - 50 mA 0.5 VCC + 0.5 V VSW switch voltage enable and disable mode ISW switch current VSW > 0.5 V or VSW < VCC + 0.5 V - 50 mA ICC supply current - 100 mA IGND ground current 100 - mA Tstg storage temperature 65 +150 C - 250 mW total power dissipation Ptot Tamb = 40 C to +125 C [3] [1] The minimum input voltage rating may be exceeded if the input current rating is observed. [2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed. [3] V For TSSOP8 packages: above 55 C the value of Ptot derates linearly with 2.5 mW/K. For VSSOP8 packages: above 110 C the value of Ptot derates linearly with 8.0 mW/K. For XSON8 and XQFN8 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K. 9. Recommended operating conditions Table 6. Operating conditions Symbol Parameter VCC supply voltage VI input voltage VSW Conditions switch voltage Tamb ambient temperature t/V input transition rise and fall rate Min Max Unit 1.65 5.5 V 0 5.5 V 0 VCC V enable and disable mode [1] 40 +125 VCC = 1.65 V to 2.7 V [2] - 20 ns/V VCC = 2.7 V to 5.5 V [2] - 10 ns/V C [1] To avoid sinking GND current from terminal Z when switch current flows in terminal Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Yn. In this case, there is no limit for the voltage drop across the switch. [2] Applies to control signal levels. 74LVC1G53 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 5 of 27 74LVC1G53 Nexperia 2-channel analog multiplexer/demultiplexer 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter HIGH-level input voltage VIH Tamb = 40 C to +85 C Conditions LOW-level input voltage Min Max Min Max 0.65 VCC - - 0.65 VCC - V VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V VCC = 3 V to 3.6 V 2.0 - - 2.0 - V 0.7 VCC - - 0.7 VCC - V VCC = 1.65 V to 1.95 V VCC = 4.5 V to 5.5 V VIL Tamb = 40 C to +125 C Unit Typ[1] VCC = 1.65 V to 1.95 V - - 0.35 VCC - 0.35 VCC V VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V VCC = 3 V to 3.6 V - - 0.8 - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3 VCC - 0.3 VCC V - 0.1 1 - 1 A II input leakage current pin S and pin E; VI = 5.5 V or GND; VCC = 0 V to 5.5 V [2] IS(OFF) OFF-state leakage current VCC = 5.5 V; see Figure 7 [2] - 0.1 0.2 - 0.5 A IS(ON) ON-state leakage current VCC = 5.5 V; see Figure 8 [2] - 0.1 1 - 2 A ICC supply current VI = 5.5 V or GND; VSW = GND or VCC; VCC = 1.65 V to 5.5 V [2] - 0.1 4 - 4 A ICC additional pin S and pin E; supply current VI = VCC 0.6 V; VSW = GND or VCC; VCC = 5.5 V [2] - 5 500 - 500 A CI input capacitance - 2.5 - - - pF CS(OFF) OFF-state capacitance - 6.0 - - - pF CS(ON) ON-state capacitance - 18 - - - pF [1] Typical values are measured at Tamb = 25 C. [2] These typical values are measured at VCC = 3.3 V. 74LVC1G53 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 6 of 27 74LVC1G53 Nexperia 2-channel analog multiplexer/demultiplexer 10.1 Test circuits 9&& 6 9,/RU9,+ < = < VZLWFK VZLWFK 6 ( 9,/ 9,+ 9,+ 9,+ ,6 ( *1' 9,+ 9, 92 DDG VI = VCC or GND; VO = GND or VCC. Fig 7. Test circuit for measuring OFF-state leakage current 9&& 6 9,/RU9,+ ,6 = < < VZLWFK 6 ( 9,/ 9,/ 9,+ 9,/ VZLWFK ( *1' 9,/ 9, 92 DDG VI = VCC or GND and VO = open circuit. Fig 8. Test circuit for measuring ON-state leakage current 10.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 10 to Figure 15. Symbol RON(peak) Parameter ON resistance (peak) 74LVC1G53 Product data sheet 40 C to +85 C Conditions 40 C to +125 C Unit Min Typ[1] Max Min Max ISW = 4 mA; VCC = 1.65 V to 1.95 V - 34.0 130 - 195 ISW = 8 mA; VCC = 2.3 V to 2.7 V - 12.0 30 - 45 ISW = 12 mA; VCC = 2.7 V - 10.4 25 - 38 VI = GND to VCC; see Figure 9 ISW = 24 mA; VCC = 3 V to 3.6 V - 7.8 20 - 30 ISW = 32 mA; VCC = 4.5 V to 5.5 V - 6.2 15 - 23 All information provided in this document is subject to legal disclaimers. Rev. 10 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 7 of 27 74LVC1G53 Nexperia 2-channel analog multiplexer/demultiplexer Table 8. ON resistance ...continued At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 10 to Figure 15. Symbol RON(rail) Parameter 40 C to +85 C Conditions ON resistance (rail) 40 C to +125 C Unit Min Typ[1] Max Min Max ISW = 4 mA; VCC = 1.65 V to 1.95 V - 8.2 18 - 27 ISW = 8 mA; VCC = 2.3 V to 2.7 V - 7.1 16 - 24 ISW = 12 mA; VCC = 2.7 V - 6.9 14 - 21 VI = GND; see Figure 9 ISW = 24 mA; VCC = 3 V to 3.6 V - 6.5 12 - 18 ISW = 32 mA; VCC = 4.5 V to 5.5 V - 5.8 10 - 15 ISW = 4 mA; VCC = 1.65 V to 1.95 V - 10.4 30 - 45 ISW = 8 mA; VCC = 2.3 V to 2.7 V - 7.6 20 - 30 ISW = 12 mA; VCC = 2.7 V - 7.0 18 - 27 ISW = 24 mA; VCC = 3 V to 3.6 V - 6.1 15 - 23 - 4.9 10 - 15 ISW = 4 mA; VCC = 1.65 V to 1.95 V - 26.0 - - - VI = VCC; see Figure 9 ISW = 32 mA; VCC = 4.5 V to 5.5 V RON(flat) ON resistance (flatness) [2] VI = GND to VCC ISW = 8 mA; VCC = 2.3 V to 2.7 V - 5.0 - - - ISW = 12 mA; VCC = 2.7 V - 3.5 - - - ISW = 24 mA; VCC = 3 V to 3.6 V - 2.0 - - - ISW = 32 mA; VCC = 4.5 V to 5.5 V - 1.5 - - - [1] Typical values are measured at Tamb = 25 C and nominal VCC. [2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and temperature. 10.3 ON resistance test circuit and graphs 96: 9&& 9,/RU9,+ 6 < = < VZLWFK 6 ( 9,/ 9,/ 9,+ 9,/ VZLWFK ( *1' 9,/ ,6: 9, DDG RON = VSW / ISW. Fig 9. Test circuit for measuring ON resistance 74LVC1G53 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 8 of 27 74LVC1G53 Nexperia 2-channel analog multiplexer/demultiplexer PQD 521 9, 9 (1) VCC = 1.8 V. (2) VCC = 2.5 V. (3) VCC = 2.7 V. (4) VCC = 3.3 V. (5) VCC = 5.0 V. Fig 10. Typical ON resistance as a function of input voltage; Tamb = 25 C DDD 521 DDD 521 9, 9 (1) Tamb = 125 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 11. ON resistance as a function of input voltage; VCC = 1.8 V 74LVC1G53 Product data sheet 9, 9 Fig 12. ON resistance as a function of input voltage; VCC = 2.5 V All information provided in this document is subject to legal disclaimers. Rev. 10 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 9 of 27 74LVC1G53 Nexperia 2-channel analog multiplexer/demultiplexer DDD DDD 521 521 9, 9 9, 9 (1) Tamb = 125 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 13. ON resistance as a function of input voltage; VCC = 2.7 V Fig 14. ON resistance as a function of input voltage; VCC = 3.3 V DDD 521 9, 9 (1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C. Fig 15. ON resistance as a function of input voltage; VCC = 5.0 V 74LVC1G53 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 10 of 27 74LVC1G53 Nexperia 2-channel analog multiplexer/demultiplexer 11. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 18. Symbol Parameter 40 C to +85 C Conditions Min Max Min Max VCC = 1.65 V to 1.95 V - - 2 - 2.5 ns VCC = 2.3 V to 2.7 V - - 1.2 - 1.5 ns VCC = 2.7 V - - 1.0 - 1.25 ns VCC = 3.0 V to 3.6 V - - 0.8 - 1.0 ns VCC = 4.5 V to 5.5 V - - 0.6 - 0.8 ns VCC = 1.65 V to 1.95 V 2.6 6.7 10.3 2.6 12.9 ns VCC = 2.3 V to 2.7 V 1.9 4.1 6.4 1.9 8.0 ns VCC = 2.7 V 1.9 4.0 5.5 1.8 7.0 ns VCC = 3.0 V to 3.6 V 1.8 3.4 5.0 1.8 6.3 ns 1.3 2.6 3.8 1.3 4.8 ns VCC = 1.65 V to 1.95 V 1.9 4.0 7.3 1.9 9.2 ns VCC = 2.3 V to 2.7 V 1.4 2.5 4.4 1.4 5.5 ns VCC = 2.7 V 1.1 2.6 3.9 1.1 4.9 ns VCC = 3.0 V to 3.6 V 1.2 2.2 3.8 1.2 4.8 ns VCC = 4.5 V to 5.5 V 1.0 1.7 2.6 1.0 3.3 ns VCC = 1.65 V to 1.95 V 2.1 6.8 10.0 2.1 12.5 ns VCC = 2.3 V to 2.7 V 1.4 3.7 6.1 1.4 7.7 ns VCC = 2.7 V 1.4 4.9 6.2 1.4 7.8 ns VCC = 3.0 V to 3.6 V 1.1 4.0 5.4 1.1 6.8 ns 1.0 2.9 3.8 1.0 4.8 ns VCC = 1.65 V to 1.95 V 2.3 5.6 8.6 2.3 11.0 ns VCC = 2.3 V to 2.7 V 1.2 3.2 4.8 1.2 6.0 ns VCC = 2.7 V 1.4 4.0 5.2 1.4 6.5 ns VCC = 3.0 V to 3.6 V 2.0 3.7 5.0 2.0 6.3 ns VCC = 4.5 V to 5.5 V 1.3 2.9 3.8 1.3 4.8 ns propagation delay Z to Yn or Yn to Z; see Figure 16 tpd enable time ten S to Z or Yn; see Figure 17 [2][3] [4] VCC = 4.5 V to 5.5 V E to Z or Yn; see Figure 17 disable time tdis 40 C to +125 C Unit Typ[1] S to Z or Yn; see Figure 17 [4] [5] VCC = 4.5 V to 5.5 V E to Z or Yn; see Figure 17 [1] Typical values are measured at Tamb = 25 C and nominal VCC. [5] [2] tpd is the same as tPLH and tPHL. [3] Propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified capacitance when driven by an ideal voltage source (zero output impedance). [4] ten is the same as tPZH and tPZL. [5] tdis is the same as tPLZ and tPHZ. 74LVC1G53 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 -- 7 December 2016 (c) Nexperia B.V. 2017. All rights reserved 11 of 27 74LVC1G53 Nexperia 2-channel analog multiplexer/demultiplexer 11.1 Waveforms and test circuits 9,