TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 TPS775xx with RESET Output, TPS776xx with PG Output FAST-TRANSIENT-RESPONSE 500mA LOW-DROPOUT VOLTAGE REGULATORS FEATURES * * * * * * * * * * DESCRIPTION Open Drain Power-On Reset with 200ms Delay (TPS775xx) Open Drain Power Good (TPS776xx) 500mA Low-Dropout Voltage Regulator Available in Fixed Output and Adjustable Versions Dropout Voltage to 169mV (Typ) at 500mA (TPS77x33) Ultralow 85A Typical Quiescent Current Fast Transient Response 2% Tolerance Over Specified Conditions for Fixed-Output Versions 8-Pin SOIC and 20-Pin TSSOP PowerPADTM (PWP) Packages Thermal Shutdown Protection APPLICATIONS * * Typical Application Circuit (Fixed Voltage Options) 6 7 RESET/ PG IN 5 RESET/PG Power good (PG) of the TPS776xx is an active high output, which can be used to implement a power-on reset or a low-battery indicator. IN OUT 0.1mF 16 Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 169mV at an output current of 500mA for the TPS77x33) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85A over the full range of output current, 0mA to 500mA). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to 1A at TJ = +25C. The RESET output of the TPS775xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS775xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. FPGA Power DSP Core and I/O Voltages VIN The TPS775xx and TPS776xx devices are designed to have a fast transient response and be stable with a 10F low ESR capacitor. This combination provides high performance at a reasonable cost. OUT EN 14 VOUT 13 (1) + COUT 10mF GND 3 The TPS775xx and TPS776xx are offered in 1.5V, 1.6V (TPS77516 only), 1.8V, 2.5V, 2.8V (TPS77628 only), and 3.3V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5V to 5.5V for the TPS77501 and 1.2V to 5.5V for the TPS77601). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS775xx and TPS776xx families are available in 8-pin SOIC and 20-pin TSSOP packages. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1999-2007, Texas Instruments Incorporated TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) VOUT (2) PRODUCT TPS775xxyyyz, TPS776xxyyyz (1) (2) XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable). YYY is package designator. Z is package quantity. For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Custom fixed output voltages are available; minimum order quantities may apply. Contact factory for details and availability. ABSOLUTE MAXIMUM RATINGS Over operating temperature range (unless otherwise noted) (1) PARAMETER Input voltage range, VIN TPS775xx, TPS776xx UNIT -0.3 to +13.5 V -0.3 to +16.5 V 16.5 V 16.5 V (2) Voltage range at EN Maximum RESET voltage (TPS775xx) Maximum PG voltage (TPS776xx) Peak output current Internally limited Voltage range at OUT, FB 7 Continuous total power dissipation V See Dissipation Ratings Table C Operating junction temperature range, TJ -40 to +125 Storage junction temperature range , TSTG -65 to +150 C 2 kV ESD rating, HBM (1) (2) Stresses above these ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. All voltages are with respect to network terminal ground. DISSIPATION RATINGS (1) (2) 2 BOARD PACKAGE -- D Low-K (1) PWP High-K (2) PWP AIRFLOW (CFM) TA < +25C DERATING FACTOR ABOVE TA = +25C TA = +70C TA = +85C 0 568mW 5.68mW/C 312mW 227mW 250 904mW 9.04mW/C 497mW 361mW 0 2.9mW 23.5mW/C 1.9W 1.5W 300 4.3mW 34.6mW/C 2.8W 2.2W 0 3W 23.8mW/C 1.9W 1.5W 300 7.2W 57.9mW/C 4.6W 3.8W This parameter is measured with the recommended copper heat sink pattern on a 1-layer, 5in 5in printed circuit board (PCB), 1-ounce copper, 2in 2in coverage (4in2). This parameter is measured with the recommended copper heat sink pattern on a 8-layer, 1.5in 2in PCB, 1-ounce copper with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9in2) and layers 3 and 6 at 100% coverage (6in2). For more information, refer to TI technical brief SLMA002. Submit Documentation Feedback TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 ELECTRICAL CHARACTERISTICS Over recommended operating temperature range (TJ = -40C to +125C), VIN = VOUT(TYP) + 1V; IOUT = 1mA, VEN = 0V, COUT = 10F, unless otherwise noted. Typical values are at TJ = +25C. PARAMETER VIN VOUT TEST CONDITIONS Input voltage range Output voltage range VOUT Accuracy IGND Ground pin current V 1.5 5.5 V TPS77601 1.2 5.5 V -2.0 +2.0 % VOUT + 1V VIN 10V 10A < IOUT < 500mA ICL Output current limit TSD Shutdown temperature TJ ISTBY (1) IOUT = 10mA 85 IOUT = 500mA Load regulation Dropout voltage (2) 125 VOUT + 1V VIN 10V (1) %/V 3 mV VRMS TPS77x18 IC = 500mA, COUT = 10F TPS77628 IOUT = 500mA 285 410 mV TPS77533 IOUT = 500mA 169 287 mV TPS77633 IOUT = 500mA 169 287 mV 1.6 1.9 VOUT = 0V 53 1.2 -40 EN = VIN, at TJ = +25C, 2.7V < VIN < 10V Standby current TPS77x01 +125 1 High-level enable input voltage VEN(LO) Low-level enable input voltage PSRR Power-supply ripple rejection f = 100Hz, COUT = 10F Minimum input voltage for valid RESET IOUT(RESET) = 300A Trip threshold voltage VOUT decreasing Hysteresis voltage Measured at VOUT Output low voltage VIN = 2.7V, IOUT(RESET) = 1mA Leakage current V(RESET) = 5V RESET (TPS775xx) 2 (1) (2) V 60 1.1 92 V 98 0.5 0.15 Trip threshold voltage VOUT decreasing Hysteresis voltage Measured at VOUT Output low voltage VIN = 2.7V, IOUT(PG) = 1mA %VOUT V 1 A Leakage current V(PG) = 5V ms V 98 0.5 0.15 EN = 0V -1 EN = VIN -1 0 %VOUT 0.4 1.1 92 V dB 200 IOUT(PG) = 300A Input current (EN) nA 0.9 RESET time-out delay PG (TPS776xx) A 1.7 Minimum input voltage for valid PG C 10 FB = 1.5V VEN(HI) A C 150 Operating junction temperature range FB input current A 0.01 EN = VIN, 2.7V < VIN < 10V IFB UNIT TPS77501 VOUT%/ IOUT VDO MAX 10 Output voltage line regulation VN TYP 2.7 VOUT%/ VIN Output noise voltage BW = 200Hz to 100kHz MIN %VOUT %VOUT 0.4 V 1 A 1 1 A Minimum VIN = VOUT + VDO or 2.7V, whichever is greater. VDO is not measured for fixed output versions with VOUT(NOM) < 2.8 V because mimimum VIN = 2.7V. Submit Documentation Feedback 3 TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 FUNCTIONAL BLOCK DIAGRAMS Adjustable Voltage Versions IN EN PG or RESET _ + OUT + _ 200ms Delay (for RESET Option) R1 Vref = 1.183V FB/NC R2 GND External to the device Fixed Voltage Versions IN EN PG or RESET _ + OUT + _ 200ms Delay (for RESET Option) R1 Vref = 1.183V R2 GND 4 Submit Documentation Feedback TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 PIN CONFIGURATIONS TSSOP-20 PWP (TOP VIEW) SOIC-8 D (TOP VIEW) GND/HSINK 1 20 GND/HSINK GND 1 8 RESET/PG GND/HSINK 2 19 GND/HSINK EN 2 7 FB/NC GND 3 18 NC IN 3 6 OUT NC 4 17 NC IN 4 5 OUT EN 5 16 RESET/PG IN 6 15 FB/NC IN 7 14 OUT NC 8 13 OUT GND/HSINK 9 12 GND/HSINK GND/HSINK 10 11 GND/HSINK Table 1. PIN DESCRIPTIONS TPS775xx, TPS776xx NAME SOIC-8 (D) PIN NO. TSSOP-20 (PWP) PIN NO. EN 2 5 Negative polarity enable (EN) input FB 7 15 Adjustable voltage version only; feedback voltage for setting output voltage of the device. Not internally connected on adjustable versions. GND 1 DESCRIPTION 1, 2, 3, 9, 10, 11, 12, 19, Ground 20 IN 3, 4 6, 7 OUT 5, 6 13, 14 Input voltage RESET 8 16 TPS775xx devices only; open-drain RESET output. PG 8 16 TPS776xx devices only; open-drain power-good (PG) output. NC -- 4, 8, 17, 18 PAD/TAB -- -- Regulated output voltage No internal connection Should be soldered to ground plane and used for heat sinking. Submit Documentation Feedback 5 TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 TPS775xx RESET Timing Diagram VIN Vres (1) Vres (1) t VOUT (2) VIT+ (2) VIT+ Threshold Voltage (2) VIT- Less than 5% of the output voltage (2) VIT- t RESET Output 200ms Delay 200ms Delay Output Undefined Output Undefined t (1) Vres is the minimum input voltage for a valid RESET. The symbol Vres is not currently listed within EIA or JEDEC standards for semiconductor symbology. (2) VIT: Trip voltage is typically 5% lower than the output voltage (95% VOUT). VIT- to VIT+ is the hysteresis voltage. TYPICAL CHARACTERISTICS Table of Graphs FIGURE NO. Figure 3, Figure 4, Figure 5 VOUT Output Voltage vs Free-Air Temperature Figure 6, Figure 7, Figure 8 vs Time Figure 20 IGND Ground Current vs Free-Air Temperature Figure 9 PSRR Power-Supply Ripple Rejection vs Frequency Figure 10 Output Spectral Noise Density vs Frequency Figure 11 Output Impedance vs Frequency Figure 12 vs Input Voltage Figure 13 vs Free-Air Temperature Figure 14 ZOUT VDO 6 vs Output Current Dropout Voltage VIN Input Voltage (Min) LINE Line Transient Response vs Output Voltage Figure 16, Figure 18 LOAD Load Transient Response Figure 17, Figure 19 ESR Equivalent Series Resistance vs Output Current Submit Documentation Feedback Figure 15 Figure 22, Figure 23 TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 TYPICAL CHARACTERISTICS Over operating temperature range (TJ= -40C to +125C) unless otherwise noted. Typical values are at TJ = +25C. TPS77x33 OUTPUT VOLTAGE vs OUTPUT CURRENT 3.2835 TPS77x15 OUTPUT VOLTAGE vs OUTPUT CURRENT 1.4985 VIN = 4.3V TA = +25C 1.4980 VOUT - Output Voltage - V VOUT - Output Voltage - V 3.2830 VIN = 2.7V TA = +25C 3.2825 3.2820 3.2815 3.2810 3.2805 1.4975 1.4970 1.4965 1.4960 1.4955 3.2800 1.4950 0.0 0.1 0.2 0.3 0.4 0.5 0.0 0.1 IOUT - Output Current - A 2.4960 2.4955 0.5 0.4 Figure 3. Figure 4. TPS77x25 OUTPUT VOLTAGE vs OUTPUT CURRENT TPS77x33 OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 3.32 VIN = 3.5V TA = +25C VIN = 4.3V 3.31 VOUT - Output Voltage - V 2.4950 VOUT - Output Voltage - V 0.3 0.2 IOUT - Output Current - A 2.4945 2.4940 2.4935 2.4930 3.30 IOUT = 500mA 3.29 IOUT = 1mA 3.28 3.27 3.26 2.4925 2.4920 0.0 0.1 0.2 0.3 0.4 0.5 3.25 -60 -40 IOUT - Output Current - A -20 0 20 40 60 80 100 120 140 TA - Free-Air Temperature - C Figure 5. Figure 6. Submit Documentation Feedback 7 TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ= -40C to +125C) unless otherwise noted. Typical values are at TJ = +25C. TPS77x15 OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE TPS77x25 OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 1.515 2.515 VIN = 3.5V VIN = 2.7V 2.510 VOUT - Output Voltage - V VOUT - Output Voltage - V 1.510 1.505 1.500 IOUT = 500mA 1.495 IOUT = 1mA 1.490 2.505 2.500 IOUT = 500mA 2.495 IOUT = 1mA 2.490 2.485 1.485 2.480 -60 -40 -20 0 20 60 40 80 100 120 140 -60 -40 -20 TA - Free-Air Temperature - C 20 40 60 80 100 Figure 7. Figure 8. TPS77xxx GROUND CURRENT vs FREE-AIR TEMPERATURE TPS77x33 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY 120 140 90 100 PSRR - Power Supply Ripple Rejection - dB VIN = 2.7V 95 Ground Current - mA 0 TA - Free-Air Temperature - C 90 IOUT = 1mA 85 IOUT = 500mA 80 VIN = 4.3V COUT = 10mF TA = +25C 80 70 60 50 40 30 20 10 0 75 -60 -40 -20 0 20 40 60 80 100 120 140 -10 1 10 TA - Free-Air Temperature - C 2 10 3 10 4 f - Frequency - Hz Figure 9. 8 10 Figure 10. Submit Documentation Feedback 10 5 10 6 TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ= -40C to +125C) unless otherwise noted. Typical values are at TJ = +25C. 10 -5 10 -6 TPS77x33 OUTPUT IMPEDANCE vs FREQUENCY 10 VIN = 4.3V COUT = 10mF TA = +25C IOUT = 7mA IOUT = 500mA 10 0 VIN = 4.3V COUT = 10mF TA = +25C ZOUT - Output Impedance - W Output Spectral Noise Density - mV/OHz TPS77x33 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY -7 IOUT = 1mA 10 -1 IOUT = 500mA 10 -8 10 2 10 3 10 4 10 10 5 -2 10 1 10 2 10 3 10 4 10 f - Frequency - Hz f - Frequency - Hz Figure 11. Figure 12. TPS77x01 DROPOUT VOLTAGE vs INPUT VOLTAGE TPS77x33 DROPOUT VOLTAGE vs FREE-AIR TEMPERATURE 350 10 IOUT = 500mA 5 10 6 3 COUT = 10mF 300 250 VDO - Dropout Voltage - mV VDO - Dropout Voltage - mV 10 TA = +125C 200 TA = +25C 150 TA = -40C 100 10 10 10 50 2 IOUT = 500mA 1 IOUT = 10mA 0 -1 IOUT = 0mA 0 2.5 3.0 3.5 4.0 VIN - Input Voltage - V 4.5 5.0 10 -2 -60 -40 -20 0 20 40 60 80 100 120 140 TA - Free-Air Temperature - C Figure 13. Figure 14. Submit Documentation Feedback 9 TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ= -40C to +125C) unless otherwise noted. Typical values are at TJ = +25C. INPUT VOLTAGE (MIN) vs OUTPUT VOLTAGE TPS77x15 LINE TRANSIENT RESPONSE VIN - Input Voltage - V 4 TA = +25C TA = +125C 3.7 2.7 3 D VOUT - Change in Output Voltage - mV VIN - Input Voltage - V IOUT = 0.5A TA = -40C 2.7 2 1.50 1.75 2.0 2.25 2.50 2.75 3.0 3.25 10 0 COUT = 10m F TA = +25C -10 3.5 0 20 40 60 100 120 140 160 Figure 15. Figure 16. TPS77x15 LOAD TRANSIENT RESPONSE TPS77x33 LINE TRANSIENT RESPONSE COUT = 2x47m F ESR = 1/2x100mW VOUT = 1.5V VIN = 2.7V 50 80 180 200 180 200 t - Time - m s VIN - Input Voltage - V D VOUT - Change in Output Voltage - mV VOUT - Output Voltage - V 0 -50 COUT = 10m F TA = +25C 5.3 D VOUT - Change in Output Voltage - mV IOUT - Output Current - mA 4.3 500 0 0 20 40 60 80 100 120 140 160 180 200 10 0 -10 0 t - Time - m s 40 60 80 100 120 t - Time - m s Figure 17. 10 20 Figure 18. Submit Documentation Feedback 140 160 TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ= -40C to +125C) unless otherwise noted. Typical values are at TJ = +25C. TPS77x33OUTPUT VOLTAGE vs TIME (AT STARTUP) 50 VOUT - Output Voltage - V COUT = 2x47m F ESR = 1/2x100mW VOUT = 3.3V VIN = 4.3V 0 -50 4 COUT = 10m F IOUT = 500mA TA = +25C 3 2 1 0 Enable Pulse - V IOUT - Output Current - mA D VOUT - Change in Output Voltage - mV TPS77x33 LOAD TRANSIENT RESPONSE 500 0 0 20 40 60 80 100 120 140 160 180 200 0 0.1 0.2 0.3 0.4 0.5 0.6 t - Time - m s t - Time - ms Figure 19. Figure 20. Submit Documentation Feedback 0.7 0.8 0.9 1.0 11 TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ= -40C to +125C) unless otherwise noted. Typical values are at TJ = +25C. Test Circuit for Typical Regions of Stability (Figure 22 and Figure 23) (Fixed Output Options) VIN To Load IN OUT + RL COUT EN R GND ESR Figure 21. TYPICAL REGION OF STABILITY EQUIVALENT SERIES RESISTANCE(1) vs OUTPUT CURRENT TYPICAL REGION OF STABILITY EQUIVALENT SERIES RESISTANCE(1) vs OUTPUT CURRENT 10 10 Region of Instability ESR - Equivalent Series Resistance - W ESR - Equivalent Series Resistance - W Region of Instability 1 VOUT = 3.3V COUT = 22m F VIN = 4.3V TA = +25C 0.1 Region of Stability 1 VOUT = 3.3V COUT = 22m F VIN = 4.3V TJ = +125C 0.1 Region of Instability Region of Instability 0.01 0.01 0 100 200 300 400 0 500 100 12 200 300 400 IOUT - Output Current - mA IOUT - Output Current - mA (1) Region of Stability Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to COUT. Figure 22. (1) Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to COUT. Figure 23. Submit Documentation Feedback 500 TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 APPLICATION INFORMATION The TPS775xx and TPS776xx feature very low quiescent current, which remains virtually constant even with varying loads. Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the load current through the regulator (IB = IC/). The TPS775xx and TPS776xx use a PMOS transistor to pass current; because the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range. Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into dropout. The resulting drop in forces an increase in IB to maintain the load. During power up, this IB increase translates to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems, it means rapid battery discharge when the voltage decays below the minimum required for regulation. The TPS775xx and TPS776xx quiescent currents remain low even when the regulator drops out, eliminating both problems. The TPS775xx and TPS776xx families also feature a shutdown mode that places the output in the high-impedance state (essentially equal to the feedback-divider resistance) and reduces quiescent current to 2A. If the shutdown feature is not used, EN should be tied to ground. Minimum Load Requirements The TPS775xx and TPS776xx families are stable at zero load; no minimum load is required for operation. FB--Pin Connection (Adjustable Version Only) The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option. The output voltage is sensed through a resistor divider network to close the loop as it is shown in Figure 25. Normally, this connection should be as short as possible; however, the connection can be made near a critical circuit to improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup is essential. External Capacitor Requirements An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047F or larger) improves load transient response and noise rejection if the TPS775xx or TPS776xx are located more than a few inches from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise times are anticipated. Like all low dropout regulators, the TPS775xx and TPS776xx require an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 10F and the ESR (equivalent series resistance) must be between 50m and 1.5. Capacitor values 10F or larger are acceptable, provided the ESR is less than 1.5. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described previously. VIN 6 7 C1 0.1mF RESET/ PG IN RESET/PG 250kW IN OUT 5 16 OUT EN 14 VOUT 13 COUT + 10mF GND 3 Figure 24. Typical Application Circuit (Fixed Versions) Submit Documentation Feedback 13 TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 APPLICATION INFORMATION (continued) Programming the TPS77x01 Adjustable LDO Regulator The output voltage of the TPS77x01 adjustable regulator is programmed using an external resistor divider as shown in Figure 25. The output voltage is calculated using Equation 1: VOUT = Vref x (1 + R1 ) R2 (1) Where: * Vref = 1.1834V typ (the internal reference voltage) Resistors R1 and R2 should be chosen for approximately 10A divider current. Lower value resistors can be used, but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 110k to set the divider current at approximately 10A and then calculate R1 using Equation 2: R1 = ( VOUT - 1) x R2 Vref (2) OUTPUT VOLTAGE PROGRAMMING GUIDE TPS77x01 VIN IN 0.1mF RESET/ PG RESET or PG Output 250kW VOUT OUT > 1.7V R1 EN < 0.9V FB/NC GND OUTPUT VOLTAGE R1 R2 UNIT 2.5V 121 110 kW 3.3V 196 110 kW 3.6V 226 110 kW 4.75V 332 110 kW COUT R2 Figure 25. TPS77x01 Adjustable LDO Regulator Programming Reset Indicator The TPS775xx features a RESET output that can be used to monitor the status of the regulator. The internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the RESET output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left floating. RESET can be used to drive power-on reset circuitry or as a low-battery indicator. RESET does not assert itself when the regulated output voltage falls outside the specified 2% tolerance, but instead reports an output voltage low relative to its nominal regulated value (refer to Timing Diagram for start-up sequence). Power-Good Indicator The TPS776xx features a power-good (PG) output that can be used to monitor the status of the regulator. The internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a low-battery indicator. 14 Submit Documentation Feedback TPS775xx, TPS776xx www.ti.com SLVS232I - SEPTEMBER 1999 - REVISED AUGUST 2007 APPLICATION INFORMATION (continued) Regulator Protection The TPS775xx and TPS776xx PMOS-pass transistors have a built-in back diode that conducts reverse currents when the input voltage drops below the output voltage (for example, during power down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate. The TPS775xx and TPS776xx also feature internal current limiting and thermal protection. During normal operation, the TPS775xx and TPS776xx limit output current to approximately 1.7A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds +150C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below +130C(typ), regulator operation resumes. Power Dissipation and Junction Temperature Specified regulator operation is assured to a junction temperature of +125C; the maximum junction temperature should be restricted to +125C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum-power-dissipation limit is determined using the following equation: PD(max) = TJ(max) - TA RqJA where: * * * TJ(max) is the maximum allowable junction temperature RJA is the thermal resistance junction-to-ambient for the package, and is calculated as 1 derating factor from the dissipation rating tables TA is the ambient temperature The regulator dissipation is calculated using: PD = (VIN - VOUT) x IOUT Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit. Submit Documentation Feedback 15 PACKAGE OPTION ADDENDUM www.ti.com 19-Jun-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS77501D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77501DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77501DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77501DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77501PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77501PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77501PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77501PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77515D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77515DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77515DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77515DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77515PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77515PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77515PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77515PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77516D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77516DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77516DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77516DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77516PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77516PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77516PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77516PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77518D ACTIVE SOIC D 8 CU NIPDAU Level-1-260C-UNLIM 75 Addendum-Page 1 Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 19-Jun-2007 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS77518DG4 ACTIVE SOIC D 8 TPS77518DR ACTIVE SOIC D TPS77518DRG4 ACTIVE SOIC TPS77518PWP ACTIVE TPS77518PWPG4 75 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77518PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77518PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77525D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77525DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77525DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77525DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77525PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77525PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77525PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77525PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77533D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77533DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77533DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77533DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77533PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77533PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77533PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77533PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77601D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77601DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77601DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 19-Jun-2007 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS77601DRG4 ACTIVE SOIC D 8 TPS77601PWP ACTIVE HTSSOP PWP 20 70 TPS77601PWPG4 ACTIVE HTSSOP PWP 20 70 TPS77601PWPR ACTIVE HTSSOP PWP TPS77601PWPRG4 ACTIVE HTSSOP TPS77615D ACTIVE TPS77615DG4 2500 Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) CU NIPDAU Level-1-260C-UNLIM Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77615DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77615DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77615PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77615PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77615PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77615PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77618D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77618DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77618DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77618DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77618PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77618PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77618PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77618PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77625D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77625DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77625DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77625DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77625PWP ACTIVE HTSSOP PWP 20 CU NIPDAU Level-2-260C-1 YEAR 70 Addendum-Page 3 Green (RoHS & no Sb/Br) PACKAGE OPTION ADDENDUM www.ti.com 19-Jun-2007 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS77625PWPG4 ACTIVE HTSSOP PWP 20 TPS77625PWPR ACTIVE HTSSOP PWP TPS77625PWPRG4 ACTIVE HTSSOP TPS77628D ACTIVE TPS77628DG4 ACTIVE TPS77628DRG4 ACTIVE SOIC D 8 TPS77628PWP ACTIVE HTSSOP PWP TPS77628PWPG4 ACTIVE HTSSOP TPS77628PWPR ACTIVE TPS77628PWPRG4 70 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TBD Call TI 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77633D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77633DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77633DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77633DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS77633PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77633PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77633PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS77633PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 4 PACKAGE OPTION ADDENDUM www.ti.com 19-Jun-2007 (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 5 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS77501DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77501PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77515DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77515PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77516DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77516PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77518DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77518PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77525DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77525PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77533DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77533PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77601DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77601PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77615DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77615PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77618DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77618PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com Device 11-Mar-2008 Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS77625DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77625PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77628PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS77633DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS77633PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS77501DR SOIC D 8 2500 346.0 346.0 29.0 TPS77501PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0 TPS77515DR SOIC D 8 2500 346.0 346.0 29.0 TPS77515PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0 TPS77516DR SOIC D 8 2500 346.0 346.0 29.0 TPS77516PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0 TPS77518DR SOIC D 8 2500 346.0 346.0 29.0 TPS77518PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0 TPS77525DR SOIC D 8 2500 346.0 346.0 29.0 TPS77525PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0 TPS77533DR SOIC D 8 2500 346.0 346.0 29.0 TPS77533PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS77601DR SOIC D 8 2500 346.0 346.0 29.0 TPS77601PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0 TPS77615DR SOIC D 8 2500 346.0 346.0 29.0 TPS77615PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0 TPS77618DR SOIC D 8 2500 346.0 346.0 29.0 TPS77618PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0 TPS77625DR SOIC D 8 2500 346.0 346.0 29.0 TPS77625PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0 TPS77628PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0 TPS77633DR SOIC D 8 2500 346.0 346.0 29.0 TPS77633PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0 Pack Materials-Page 3 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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