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FEATURES DESCRIPTION
APPLICATIONS
IN
IN
EN
GND
OUT
OUT
RESET/
PG
6
7
5
16
14
13
3
+10 Fm
COUT
(1)
RESET/PG
VOUT
VIN
0.1 Fm
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
TPS775xx with RESET Output, TPS776xx with PG OutputFAST-TRANSIENT-RESPONSE 500mA LOW-DROPOUT VOLTAGE REGULATORS
•Open Drain Power-On Reset with 200ms Delay
The TPS775xx and TPS776xx devices are designed(TPS775xx)
to have a fast transient response and be stable witha 10 μF low ESR capacitor. This combination•Open Drain Power Good (TPS776xx)
provides high performance at a reasonable cost.•500mA Low-Dropout Voltage Regulator
Because the PMOS device behaves as a low-value•Available in Fixed Output and Adjustable
resistor, the dropout voltage is very low (typicallyVersions
169mV at an output current of 500mA for the•Dropout Voltage to 169mV (Typ) at 500mA
TPS77x33) and is directly proportional to the output(TPS77x33)
current. Additionally, since the PMOS pass elementis a voltage-driven device, the quiescent current is•Ultralow 85 μA Typical Quiescent Current
very low and independent of output loading (typically•Fast Transient Response
85 μA over the full range of output current, 0mA to•2% Tolerance Over Specified Conditions for
500mA). These two key specifications yield aFixed-Output Versions
significant improvement in operating life forbattery-powered systems. This LDO family also•8-Pin SOIC and 20-Pin TSSOP PowerPAD™
features a sleep mode; applying a TTL high signal to(PWP) Packages
EN (enable) shuts down the regulator, reducing the•Thermal Shutdown Protection
quiescent current to 1 μA at T
J
= +25 °C.
The RESET output of the TPS775xx initiates a resetin microcomputer and microprocessor systems in the•FPGA Power
event of an undervoltage condition. An internal•DSP Core and I/O Voltages
comparator in the TPS775xx monitors the outputvoltage of the regulator to detect an undervoltageTypical Application Circuit
condition on the regulated output voltage.(Fixed Voltage Options)
Power good (PG) of the TPS776xx is an active highoutput, which can be used to implement a power-onreset or a low-battery indicator.
The TPS775xx and TPS776xx are offered in 1.5V,1.6V (TPS77516 only), 1.8V, 2.5V, 2.8V (TPS77628only), and 3.3V fixed-voltage versions and in anadjustable version (programmable over the range of1.5V to 5.5V for the TPS77501 and 1.2V to 5.5V forthe TPS77601). Output voltage tolerance is specifiedas a maximum of 2% over line, load, andtemperature ranges. The TPS775xx and TPS776xxfamilies are available in 8-pin SOIC and 20-pinTSSOP packages.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PowerPAD is a trademark of Texas Instruments.All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 1999–2007, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may bemore susceptible to damage because very small parametric changes could cause the device not to meet its publishedspecifications.
ORDERING INFORMATION
(1)
PRODUCT V
OUT
(2)
TPS775 xxyyyz, TPS776 xxyyyz XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable).YYY is package designator.Zis package quantity.
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .(2) Custom fixed output voltages are available; minimum order quantities may apply. Contact factory for details and availability.
Over operating temperature range (unless otherwise noted)
(1)
PARAMETER TPS775xx, TPS776xx UNIT
Input voltage range, V
IN
(2)
–0.3 to +13.5 VVoltage range at EN –0.3 to +16.5 VMaximum RESET voltage (TPS775xx) 16.5 VMaximum PG voltage (TPS776xx) 16.5 VPeak output current Internally limitedVoltage range at OUT, FB 7 VContinuous total power dissipation See Dissipation Ratings TableOperating junction temperature range, T
J
–40 to +125 °CStorage junction temperature range , T
STG
–65 to +150 °CESD rating, HBM 2 kV
(1) Stresses above these ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extendedperiods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any otherconditions beyond those specified is not implied.(2) All voltages are with respect to network terminal ground.
AIRFLOW DERATING FACTORBOARD PACKAGE (CFM) T
A
< +25 °C ABOVE T
A
= +25 °C T
A
= +70 °C T
A
= +85 °C
0 568mW 5.68mW/ °C 312mW 227mW— D
250 904mW 9.04mW/ °C 497mW 361mW0 2.9mW 23.5mW/ °C 1.9W 1.5WLow-K
(1)
PWP
300 4.3mW 34.6mW/ °C 2.8W 2.2W0 3W 23.8mW/ °C 1.9W 1.5WHigh-K
(2)
PWP
300 7.2W 57.9mW/ °C 4.6W 3.8W
(1) This parameter is measured with the recommended copper heat sink pattern on a 1-layer, 5in נ5in printed circuit board (PCB), 1-ouncecopper, 2in נ2in coverage (4in
2
).(2) This parameter is measured with the recommended copper heat sink pattern on a 8-layer, 1.5in נ2in PCB, 1-ounce copper with layers 1,2, 4, 5, 7, and 8 at 5% coverage (0.9in
2
) and layers 3 and 6 at 100% coverage (6in
2
). For more information, refer to TI technical briefSLMA002 .
2
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ELECTRICAL CHARACTERISTICS
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
Over recommended operating temperature range (T
J
= –40 °C to +125 °C), V
IN
= V
OUT(TYP)
+ 1V; I
OUT
= 1mA, V
EN
= 0V, C
OUT
=10 μF, unless otherwise noted. Typical values are at T
J
= +25 °C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IN
Input voltage range 2.7 10 V
TPS77501 1.5 5.5 VV
OUT
Output voltage range
TPS77601 1.2 5.5 V
V
OUT
+ 1V ≤V
IN
≤10V
(1)V
OUT
Accuracy –2.0 +2.0 %10 μA < I
OUT
< 500mA
I
OUT
= 10mA 85I
GND
Ground pin current μAI
OUT
= 500mA 125
ΔV
OUT
%/ ΔV
IN
Output voltage line regulation V
OUT
+ 1V ≤V
IN
≤10V
(1)
0.01 %/V
ΔV
OUT
%/ ΔI
OUT
Load regulation 3 mV
Output noise voltageV
N
TPS77x18 I
C
= 500mA, C
OUT
= 10 μF 53 μV
RMSBW = 200Hz to 100kHz
TPS77628 I
OUT
= 500mA 285 410 mV
V
DO
Dropout voltage
(2)
TPS77533 I
OUT
= 500mA 169 287 mV
TPS77633 I
OUT
= 500mA 169 287 mV
I
CL
Output current limit V
OUT
= 0V 1.2 1.6 1.9 A
T
SD
Shutdown temperature 150 °C
T
J
Operating junction temperature range –40 +125 °C
EN = V
IN
, at T
J
= +25 °C,
12.7V < V
IN
< 10VI
STBY
Standby current μAEN = V
IN
, 2.7V < V
IN
< 10V 10
I
FB
FB input current TPS77x01 FB = 1.5V 2 nA
V
EN(HI)
High-level enable input voltage 1.7 V
V
EN(LO)
Low-level enable input voltage 0.9 V
PSRR Power-supply ripple rejection f = 100Hz, C
OUT
= 10 μF 60 dB
Minimum input voltage for valid RESET I
OUT(RESET)
= 300 μA 1.1 V
Trip threshold voltage V
OUT
decreasing 92 98 %V
OUT
Hysteresis voltage Measured at V
OUT
0.5 %V
OUTRESET
(TPS775xx)
Output low voltage V
IN
= 2.7V, I
OUT(RESET)
= 1mA 0.15 0.4 V
Leakage current V
(RESET)
= 5V 1 μA
RESET time-out delay 200 ms
Minimum input voltage for valid PG I
OUT(PG)
= 300 μA 1.1 V
Trip threshold voltage V
OUT
decreasing 92 98 %V
OUTPG
Hysteresis voltage Measured at V
OUT
0.5 %V
OUT(TPS776xx)
Output low voltage V
IN
= 2.7V, I
OUT(PG)
= 1mA 0.15 0.4 V
Leakage current V
(PG)
= 5V 1 μA
EN = 0V –1 0 1Input current ( EN) μAEN = V
IN
–1 1
(1) Minimum V
IN
= V
OUT
+ V
DO
or 2.7V, whichever is greater.(2) V
DO
is not measured for fixed output versions with V
OUT(NOM)
< 2.8 V because mimimum V
IN
= 2.7V.
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FUNCTIONAL BLOCK DIAGRAMS
_
+
EN
GND
_
+
IN
V =1.183V
ref
200msDelay
(for Option)RESET
R2
R1
OUT
PGor RESET
FB/NC
Externaltothedevice
_
+
EN
GND
_
+
IN
V =1.183V
ref
200msDelay
(for Option)RESET
R2
R1
OUT
PGor RESET
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
Adjustable Voltage Versions
Fixed Voltage Versions
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PIN CONFIGURATIONS
1
2
3
4
8
7
6
5
GND
EN
IN
IN
FB/NC
OUT
OUT
RESET/PG
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND/HSINK
GND/HSINK
NC
NC
FB/NC
OUT
OUT
GND/HSINK
GND/HSINK
GND/HSINK
GND/HSINK
GND
NC
EN
IN
IN
NC
GND/HSINK
GND/HSINK
RESET/PG
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
TSSOP-20 SOIC-8PWP D(TOP VIEW) (TOP VIEW)
Table 1. PIN DESCRIPTIONS
TPS775xx, TPS776xx
TSSOP-20SOIC-8 (D) (PWP)NAME PIN NO. PIN NO. DESCRIPTION
EN 2 5 Negative polarity enable ( EN) inputAdjustable voltage version only; feedback voltage for setting output voltage of the device.FB 7 15
Not internally connected on adjustable versions.1, 2, 3, 9, 10,GND 1 11, 12, 19, Ground20IN 3, 4 6, 7 Input voltageOUT 5, 6 13, 14 Regulated output voltageRESET 8 16 TPS775xx devices only; open-drain RESET output.PG 8 16 TPS776xx devices only; open-drain power-good (PG) output.NC — 4, 8, 17, 18 No internal connectionPAD/TAB — — Should be soldered to ground plane and used for heat sinking.
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t
t
Vres
(1)
VIN
Threshold
Voltage
VOUT VIT+
(2)
RESET
Output 200msDelay 200msDelay
Output
Undefined
VIT+
(2)
VIT-
(2)
Lessthan5%ofthe
outputvoltage VIT-
(2)
t
Output
Undefined
Vres
(1)
TYPICAL CHARACTERISTICS
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
TPS775xx RESET Timing Diagram
(1) V
res
is the minimum input voltage for a valid RESET. The symbol V
res
is not currently listed within EIA or JEDECstandards for semiconductor symbology.(2) V
IT
: Trip voltage is typically 5% lower than the output voltage (95% V
OUT
). V
IT–
to V
IT+
is the hysteresis voltage.
Table of Graphs
FIGURE NO.
vs Output Current Figure 3 ,Figure 4 ,Figure 5V
OUT
Output Voltage vs Free-Air Temperature Figure 6 ,Figure 7 ,Figure 8vs Time Figure 20I
GND
Ground Current vs Free-Air Temperature Figure 9PSRR Power-Supply Ripple Rejection vs Frequency Figure 10Output Spectral Noise Density vs Frequency Figure 11Z
OUT
Output Impedance vs Frequency Figure 12vs Input Voltage Figure 13V
DO
Dropout Voltage
vs Free-Air Temperature Figure 14V
IN
Input Voltage (Min) vs Output Voltage Figure 15LINE Line Transient Response Figure 16 ,Figure 18LOAD Load Transient Response Figure 17 ,Figure 19ESR Equivalent Series Resistance vs Output Current Figure 22 ,Figure 23
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TYPICAL CHARACTERISTICS
3.31
3.28
3.25
-40 0
3.30
3.29
3.27
-20 100 140
3.32
-60 120
3.26
20 40 60 80
V OutputVoltage V-
OUT-
TA- -Free-AirTemperature C°
V =4.3V
IN
I =500mA
OUT
I =1mA
OUT
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
Over operating temperature range (T
J
= –40 °C to +125 °C) unless otherwise noted. Typical values are at T
J
= +25 °C.
TPS77x33 TPS77x15OUTPUT VOLTAGE OUTPUT VOLTAGEvs OUTPUT CURRENT vs OUTPUT CURRENT
Figure 3. Figure 4.
TPS77x25 TPS77x33OUTPUT VOLTAGE OUTPUT VOLTAGEvs OUTPUT CURRENT vs FREE-AIR TEMPERATURE
Figure 5. Figure 6.
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1.515
1.500
1.485
1.510
1.505
1.495
1.490
V OutputVoltage V-
OUT-
V =2.7V
IN
I =500mA
OUT
I =1mA
OUT
-40 0-20 100 140
-60 12020 40 60 80
TA- -Free-AirTemperature C°
100
95
90
85
80
75
GroundCurrent Am-
V =2.7V
IN
I =500mA
OUT
I =1mA
OUT
-40 0-20 100 140
-60 12020 40 60 80
TA- -Free-AirTemperature C°
60
50
40
30
20
10
0
-10
90
80
PSRR PowerSupplyRippleRejection dB
--
V =4.3V
C =10 F
T =+25 C
IN
A
OUT m
°
101102103104105106
f- -Frequency Hz
70
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
TYPICAL CHARACTERISTICS (continued)Over operating temperature range (T
J
= –40 °C to +125 °C) unless otherwise noted. Typical values are at T
J
= +25 °C.
TPS77x15 TPS77x25OUTPUT VOLTAGE OUTPUT VOLTAGEvs FREE-AIR TEMPERATURE vs FREE-AIR TEMPERATURE
Figure 7. Figure 8.
TPS77xxx TPS77x33GROUND CURRENT POWER-SUPPLY RIPPLE REJECTIONvs FREE-AIR TEMPERATURE vs FREQUENCY
Figure 9. Figure 10.
8
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V =4.3V
C =10 F
T =+25 C
IN
A
OUT m
°
I =7mA
OUT
I =500mA
OUT
102103104105
10-5
10-6
10-7
f- -Frequency Hz
10-8
OutputSpectralNoiseDensity V/m
-Hz
Ö
V =4.3V
C =10 F
T =+25 C
IN
A
OUT m
°
I =1mA
OUT
I =500mA
OUT
101102103104105106
f- -Frequency Hz
10-1
10-2
100
Z OutputImpedance
- W
OUT -
300
150
0
250
200
100
2.5
50
VDropoutVoltage V-
DO -m
T =+25 C
A°
T = 40 C
A-°
T =+125 C
A°
350
VIN - -InputVoltage V
3.0 3.5 4.0 4.5 5.0
I =500mA
OUT
C =10 F
OUT m
I =0mA
OUT
I =500mA
OUT
-40 0-20 100 140
-60 12020 40 60 80
TA- -Free-AirTemperature C°
I =10mA
OUT
VDropoutVoltage V-
DO -m
101
10-1
102
100
10-2
103
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
TYPICAL CHARACTERISTICS (continued)Over operating temperature range (T
J
= –40 °C to +125 °C) unless otherwise noted. Typical values are at T
J
= +25 °C.
TPS77x33 TPS77x33OUTPUT SPECTRAL NOISE DENSITY OUTPUT IMPEDANCEvs FREQUENCY vs FREQUENCY
Figure 11. Figure 12.
TPS77x01 TPS77x33DROPOUT VOLTAGE DROPOUT VOLTAGEvs INPUT VOLTAGE vs FREE-AIR TEMPERATURE
Figure 13. Figure 14.
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10
0
3.7
2.7
0 20 40 60 80 100 120 140 160 180 200
C =10 F
T =+25 C
m
OUT
A°
t- -Time sm
DVOUT -
-
Changein
OutputVoltage mV
-10
V InputVoltage V
-
IN -
3
2.7
2
1.50 1.75 2.0 2.25 2.50 2.75
4
3.0 3.25 3.5
VInputVoltage V-
IN -
I =0.5A
OUT
VOUT - -OutputVoltage V
T =+25 C
A°
T =+125 C
A°
T = 40 C
A-°
500
0
50
0
DVOUT -
-
Changein
OutputVoltage mV
-50
0 20 40 60 80 100 120 140 160 180 200
t- -Time sm
I OutputCurrent mA
-
OUT -
C =2x47 F
ESR=1/2x100m
V =1.5V
V =2.7V
m
W
OUT
IN
OUT
0 20 40 60 80 100 120 140 160 180 200
t- -Time sm
10
0
5.3
4.3
DVOUT -
-
Changein
OutputVoltage mV
-10
V InputVoltage V
-
IN -
C =10 F
T =+25 C
m
OUT
A°
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
TYPICAL CHARACTERISTICS (continued)Over operating temperature range (T
J
= –40 °C to +125 °C) unless otherwise noted. Typical values are at T
J
= +25 °C.
INPUT VOLTAGE (MIN) TPS77x15vs OUTPUT VOLTAGE LINE TRANSIENT RESPONSE
Figure 15. Figure 16.
TPS77x15 TPS77x33LOAD TRANSIENT RESPONSE LINE TRANSIENT RESPONSE
Figure 17. Figure 18.
10
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0 20 40 60 80 100 120 140 160 180 200
t- -Time sm
500
0
50
0
DVOUT -
-
Changein
OutputVoltage mV
-50
I OutputCurrent mA
-
OUT -
C =2x47 F
ESR=1/2x100m
V =3.3V
V =4.3V
m
W
OUT
IN
OUT
3
2
0
1
4
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
t- -Time ms
VOUT - -OutputVoltage V
EnablePulse V-
C =10 F
I =500mA
T =+25 C
m
OUT
A
OUT
°
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
TYPICAL CHARACTERISTICS (continued)Over operating temperature range (T
J
= –40 °C to +125 °C) unless otherwise noted. Typical values are at T
J
= +25 °C.
TPS77x33 TPS77x33 OUTPUT VOLTAGELOAD TRANSIENT RESPONSE vs TIME (AT STARTUP)
Figure 19. Figure 20.
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EN GND
ESR
ToLoad
R
VIN IN
OUT
COUT
+
RL
0.1
0
10
1
Region of Stability
Region of Instability
0.01
Region of Instability
IOUT - -OutputCurrent mA
100 200 300 400 500
ESR EquivalentSeriesResistance- W-
V =3.3V
C =22 F
V =4.3V
T =+125 C
OUT
J
OUT
IN
m
°
10
Region of Stability
Region of Instability
Region of Instability
V =3.3V
C =22 F
V =4.3V
T =+25 C
OUT
A
OUT
IN
m
°
0.1
0
1
0.01
IOUT - -OutputCurrent mA
100 200 300 400 500
ESR EquivalentSeriesResistance- W-
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
TYPICAL CHARACTERISTICS (continued)Over operating temperature range (T
J
= –40 °C to +125 °C) unless otherwise noted. Typical values are at T
J
= +25 °C.
Test Circuit for Typical Regions of Stability (Figure 22 and Figure 23 ) (Fixed Output Options)
Figure 21.
TYPICAL REGION OF STABILITY TYPICAL REGION OF STABILITYEQUIVALENT SERIES RESISTANCE
(1)
EQUIVALENT SERIES RESISTANCE
(1)
vs OUTPUT CURRENT vs OUTPUT CURRENT
(1) Equivalent series resistance (ESR) refers to (1) Equivalent series resistance (ESR) refers tothe total series resistance, including the the total series resistance, including theESR of the capacitor, any series resistance ESR of the capacitor, any series resistanceadded externally, and PWB trace resistance added externally, and PWB trace resistanceto C
OUT
. to C
OUT
.Figure 22. Figure 23.
12
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APPLICATION INFORMATION
Minimum Load Requirements
FB—Pin Connection (Adjustable Version Only)
External Capacitor Requirements
IN
IN
EN
GND
OUT
OUT
RESET/
PG
6
7
5
16
14
13
3
+10 Fm
COUT
RESET/PG
VOUT
VIN
C
0.1 Fm
1
250kW
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
The TPS775xx and TPS776xx feature very low quiescent current, which remains virtually constant even withvarying loads. Conventional LDO regulators use a pnp pass element, the base current of which is directlyproportional to the load current through the regulator (I
B
= I
C
/β). The TPS775xx and TPS776xx use a PMOStransistor to pass current; because the gate of the PMOS is voltage driven, operating current is low andinvariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes intodropout. The resulting drop in βforces an increase in I
B
to maintain the load. During power up, this I
B
increasetranslates to large start-up currents. Systems with limited supply current may fail to start up. In battery-poweredsystems, it means rapid battery discharge when the voltage decays below the minimum required for regulation.The TPS775xx and TPS776xx quiescent currents remain low even when the regulator drops out, eliminatingboth problems.
The TPS775xx and TPS776xx families also feature a shutdown mode that places the output in thehigh-impedance state (essentially equal to the feedback-divider resistance) and reduces quiescent current to2μA. If the shutdown feature is not used, EN should be tied to ground.
The TPS775xx and TPS776xx families are stable at zero load; no minimum load is required for operation.
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option. The outputvoltage is sensed through a resistor divider network to close the loop as it is shown in Figure 25 . Normally, thisconnection should be as short as possible; however, the connection can be made near a critical circuit toimprove performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier andnoise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup isessential.
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 μF or larger) improvesload transient response and noise rejection if the TPS775xx or TPS776xx are located more than a few inchesfrom the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds ofmilliamps) load transients with fast rise times are anticipated.
Like all low dropout regulators, the TPS775xx and TPS776xx require an output capacitor connected betweenOUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 10 μF andthe ESR (equivalent series resistance) must be between 50m Ωand 1.5 Ω. Capacitor values 10 μF or larger areacceptable, provided the ESR is less than 1.5 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayerceramic capacitors are all suitable, provided they meet the requirements described previously.
Figure 24. Typical Application Circuit (Fixed Versions)
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Programming the TPS77x01 Adjustable LDO Regulator
V =V x(1+)
OUT ref
R
R
1
2
(1)
V
V
OUT
ref
1)xR-2
R =(
1
(2)
IN
EN
GND
FB/NC
OUT
RESET/
PG RESET orPGOutput
VOUT
VIN
0.1 Fm250kW
TPS77x01
COUT
R1
R2
> 1.7V
< 0.9V
OUTPUTVOLTAGE
PROGRAMMINGGUIDE
R1R2UNIT
OUTPUT
VOLTAGE
2.5V
3.3V
3.6V
4.75V
121
196
226
332
110
110
110
110
kW
kW
kW
kW
Reset Indicator
Power-Good Indicator
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
APPLICATION INFORMATION (continued)
The output voltage of the TPS77x01 adjustable regulator is programmed using an external resistor divider asshown in Figure 25 . The output voltage is calculated using Equation 1 :
Where:
•V
ref
= 1.1834V typ (the internal reference voltage)
Resistors R
1
and R
2
should be chosen for approximately 10 μA divider current. Lower value resistors can beused, but offer no inherent advantage and waste more power. Higher values should be avoided as leakagecurrents at FB increase the output voltage error. The recommended design procedure is to choose R
2
= 110k Ωto set the divider current at approximately 10 μA and then calculate R
1
using Equation 2 :
Figure 25. TPS77x01 Adjustable LDO Regulator Programming
The TPS775xx features a RESET output that can be used to monitor the status of the regulator. The internalcomparator monitors the output voltage: when the output drops to between 92% and 98% of its nominalregulated value, the RESET output transistor turns on, taking the signal low. The open-drain output requires apullup resistor. If not used, it can be left floating. RESET can be used to drive power-on reset circuitry or as alow-battery indicator. RESET does not assert itself when the regulated output voltage falls outside the specified2% tolerance, but instead reports an output voltage low relative to its nominal regulated value (refer to TimingDiagram for start-up sequence).
The TPS776xx features a power-good (PG) output that can be used to monitor the status of the regulator. Theinternal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominalregulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullupresistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as alow-battery indicator.
14
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Regulator Protection
Power Dissipation and Junction Temperature
P =
D(max)
RqJA
TJ(max) T-A
1
deratingfactor
from the dissipation rating tables
P =(V V )xI-
D IN OUT OUT
TPS775xx , TPS776xx
SLVS232I – SEPTEMBER 1999 – REVISED AUGUST 2007
APPLICATION INFORMATION (continued)
The TPS775xx and TPS776xx PMOS-pass transistors have a built-in back diode that conducts reverse currentswhen the input voltage drops below the output voltage (for example, during power down). Current is conductedfrom the output to the input and is not internally limited. When extended reverse voltage is anticipated, externallimiting may be appropriate.
The TPS775xx and TPS776xx also feature internal current limiting and thermal protection. During normaloperation, the TPS775xx and TPS776xx limit output current to approximately 1.7A. When current limitingengages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting isdesigned to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of thepackage. If the temperature of the device exceeds +150 °C(typ), thermal-protection circuitry shuts it down. Oncethe device has cooled below +130 °C(typ), regulator operation resumes.
Specified regulator operation is assured to a junction temperature of +125 °C; the maximum junction temperatureshould be restricted to +125 °C under normal operating conditions. This restriction limits the power dissipationthe regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,calculate the maximum allowable dissipation, P
D(max)
, and the actual dissipation, P
D
, which must be less than orequal to P
D(max)
.
The maximum-power-dissipation limit is determined using the following equation:
where:
•T
J(max)
is the maximum allowable junction temperature•R
θJA
is the thermal resistance junction-to-ambient for the package, and is calculated as
•T
A
is the ambient temperature
The regulator dissipation is calculated using:
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger thethermal protection circuit.
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PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS77501D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77501DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77501DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77501DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77501PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77501PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77501PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77501PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77515D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77515DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77515DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77515DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77515PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77515PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77515PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77515PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77516D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77516DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77516DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77516DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77516PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77516PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77516PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77516PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77518D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 19-Jun-2007
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS77518DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77518DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77518DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77518PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77518PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77518PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77518PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77525D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77525DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77525DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77525DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77525PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77525PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77525PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77525PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77533D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77533DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77533DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77533DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77533PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77533PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77533PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77533PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77601D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77601DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77601DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 19-Jun-2007
Addendum-Page 2
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS77601DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77601PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77601PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77601PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77601PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77615D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77615DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77615DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77615DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77615PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77615PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77615PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77615PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77618D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77618DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77618DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77618DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77618PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77618PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77618PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77618PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77625D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77625DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77625DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77625DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77625PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
PACKAGE OPTION ADDENDUM
www.ti.com 19-Jun-2007
Addendum-Page 3
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS77625PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77625PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77625PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77628D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77628DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77628DRG4 ACTIVE SOIC D 8 TBD Call TI Call TI
TPS77628PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77628PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77628PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77628PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77633D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77633DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77633DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77633DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS77633PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77633PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77633PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS77633PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
PACKAGE OPTION ADDENDUM
www.ti.com 19-Jun-2007
Addendum-Page 4
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 19-Jun-2007
Addendum-Page 5
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS77501DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS77501PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
TPS77515DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS77515PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
TPS77516DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS77516PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
TPS77518DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS77518PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
TPS77525DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS77525PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
TPS77533DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS77533PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
TPS77601DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS77601PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
TPS77615DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS77615PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
TPS77618DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS77618PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 1
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS77625DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS77625PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
TPS77628PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
TPS77633DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS77633PWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS77501DR SOIC D 8 2500 346.0 346.0 29.0
TPS77501PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0
TPS77515DR SOIC D 8 2500 346.0 346.0 29.0
TPS77515PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0
TPS77516DR SOIC D 8 2500 346.0 346.0 29.0
TPS77516PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0
TPS77518DR SOIC D 8 2500 346.0 346.0 29.0
TPS77518PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0
TPS77525DR SOIC D 8 2500 346.0 346.0 29.0
TPS77525PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0
TPS77533DR SOIC D 8 2500 346.0 346.0 29.0
TPS77533PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 2
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS77601DR SOIC D 8 2500 346.0 346.0 29.0
TPS77601PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0
TPS77615DR SOIC D 8 2500 346.0 346.0 29.0
TPS77615PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0
TPS77618DR SOIC D 8 2500 346.0 346.0 29.0
TPS77618PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0
TPS77625DR SOIC D 8 2500 346.0 346.0 29.0
TPS77625PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0
TPS77628PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0
TPS77633DR SOIC D 8 2500 346.0 346.0 29.0
TPS77633PWPR HTSSOP PWP 20 2000 346.0 346.0 33.0
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 3
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