15A Synchronous
Step-Down COT Regulator
XR76117
1/18
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FEATURES
15A step-down regulator
4.5V to 5.5V low VIN operation
5V to 22V wide single input voltage
3V to 22V operation with external
5V bias
≥0.6V adjustable output voltage
Proprietary constant on-time control
No loop compensation required
Ceramic output capacitor stable
operation
Programmable 70ns-1µs on-time
Constant 200kHz-1MHz frequency
Selectable CCM or CCM/DCM
operation
Power-good flag with low impedance when
power removed
Precision enable
Programmable soft-start
5mm x 6mm QFN package
APPLICATIONS
Servers
Distributed power architecture
Point-of-load converters
FPGA, DSP and processor supplies
Base stations, switches/routers
Description
The XR76117 is a synchronous step-down regulator combining the
controller, drivers, bootstrap diode and MOSFETs in a single package
for point-of-load supplies. The XR76117 has a load current rating
of 15A. A wide 5V to 22V input voltage range allows for single supply
operation from industry standard 5V, 12V and 19.6V rails.
With a proprietary emulated current mode constant on-time (COT)
control scheme, the XR76117 provides extremely fast line and
load transient response using ceramic output capacitors. It require
sno loop compensation, simplifying circuit implementation and
reducing overall component count. The control loop also provides
0.1% load and 0.1% line regulation and maintains constant
operating frequency. A selectable power saving mode, allows the user
to operate in discontinuous mode (DCM) at light current loads thereby
significantly increasing the converter efficiency.
A host of protection features, including overcurrent, over temperature,
overvoltage, short-circuit, open feedback detect and UVLO, helps
achieve safe operation under abnormal operating conditions.
The XR76117 is available in a RoHS compliant, green/halogen-free
space-saving 5mm x 6mm QFN package.
Typical Application
Figure 1. Typical Application Figure 2. Efficiency
ENABLE
VIN
CIN
POWER GOOD
R
CVCC CSS
RON
RLIM
RFF
COUT
CFF
VOUT
VOUT
CBST L1
R1
R2
XR76117
EN
VIN
PVIN
PGOOD
VCC
SS
TON
AGND
BST
SW
ILIM
FB
FCCM
VSNS
PGND
R1
R2
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
0.0 5.0 10.0
5.0V
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
600kHz
800kHz
Efficiency (%)
I
OUT
(A)
15.0
XR76117
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Absolute Maximum Ratings
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Stresses beyond those listed under
absolute maximum ratings may cause permanent damage
to the device. Exposure to any absolute maximum rating
condition for extended periods may affect device reliability
and lifetime.
PVIN, VIN ......................................................................... -0.3V to 25V
VCC ..................................................................................-0.3V to 6.0V
BST ................................................................-0.3V to 31V(1)
BST-SW ............................................................. -0.3V to 6V
SW, ILIM ........................................................ -1V to 25V(1)(2)
All other pins ......................................... -0.3V to VCC + 0.3V
Storage temperature .................................... -65°C to 150°C
Junction temperature ................................................. 150°C
Power dissipation ...................................... Internally limited
Lead temperature (soldering, 10 second) .................. 300°C
ESD rating (HBM – human body model) ....................... 2kV
ESD rating (CDM – charged device model) .................. 1kV
ESD rating (MM – machine model) ............................. 200V
Operating Conditions
PVIN ......................................................................3V to 22V
VIN .....................................................................4.5V to 22V
VCC ...................................................................4.5V to 5.5V
SW, ILIM ..........................................................-1V to 22V(2)
PGOOD, TON, SS, EN .................................-0.3V to 5.5V(2)
Switching frequency ................................... 200kHz-1MHz(3)
Junction temperature range (TJ).................. -40°C to 125°C
Package power dissipation max at 25°C ..................... 3.8W
Package thermal resistance θ
JA ............................. 26°C/W(4)
NOTES:
1. No external voltage applied.
2. SW pin’s DC range is -1V, transient is -5V for less than 50ns.
3. Recommended.
4. Measured on MaxLinear evaluation board.
Electrical Characteristics
Specifications are for operating junction temperature of TJ = 25°C only; limits applying over the full operating junction
temperature range are denoted by a •. Typical values represent the most likely parametric norm at TJ = 25°C, and are
provided for reference purposes only. Unless otherwise indicated, VIN = 12V, SW = AGND = PGND = 0V, CVCC = 4.7uF.
Symbol Parameter Conditions • Min Typ Max Units
Power Supply Characteristics
VIN Input voltage range
VCC regulating
•
5 12 22
V
VCC tied to VIN 4.5 5.0 5.5
IVIN VIN supply current Not switching, VIN = 12V, VFB = 0.7V • 0.8 1.3 mA
IVCC VCC quiescent current Not switching, VCC = VIN = 5V,
VFB = 0.7V • 0.8 1.3 mA
IVIN VIN supply current f = 800kHz, RON = 35.7k,
VFB = 0.58V 17 mA
IOFF Shutdown current Enable = 0V, PVIN = VIN = 12V 1 μA
Enable and Undervoltage Lock-Out UVLO
VIH_EN EN pin rising threshold • 1.8 1.9 2.0 V
VEN_HYS EN pin hysteresis 60 mV
VCC UVLO start threshold, rising edge • 4.00 4.25 4.40 V
VCC UVLO hysteresis • 100 170 mV
XR76117
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Electrical Characteristics (Continued)
Specifications are for operating junction temperature of TJ = 25°C only; limits applying over the full operating junction
temperature range are denoted by a •. Typical values represent the most likely parametric norm at TJ = 25°C, and are
provided for reference purposes only. Unless otherwise indicated, VIN = 12V, SW = AGND = PGND = 0V, CVCC = 4.7uF.
Symbol Parameter Conditions • Min Typ Max Units
Reference Voltage
VREF Reference voltage
VIN = 5V - 22V, VCC regulating 0.597 0.600 0.603 V
VIN = 4.5V - 5.5V, VCC tied to VIN 0.596 0.600 0.604 V
VIN = 5V - 22V, VCC regulating
VIN = 4.5V - 5.5V, VCC tied to VIN • 0.594 0.600 0.606 V
DC load regulation CCM operation, closed loop,
applies to any COUT
±0.1 %
DC line regulation ±0.1 %
Programmable Constant On-Time
On-time 1 RON = 5.90kΩ, VIN = 12V • 170 200 230 ns
f corresponding to on-time 1 VOUT = 1.0V 360 415 490 kHz
On-time 2 RON = 16.2kΩ, VIN = 12V • 425 500 575 ns
f corresponding to on-time 2 VOUT = 3.3V 478 550 647 kHz
On-time 3 RON = 3.01kΩ, VIN = 12V • 90 110 135 ns
Minimum off-time • 250 350 ns
Diode Emulation Mode
Zero crossing threshold DC value measured during test -2 mV
Soft-Start
ISS_CHARGE Charge current • -14 -10 -6 µA
ISS_DISCHARGE Discharge current Fault present • 1 3 mA
VCC Linear Regulator
VCC Output voltage
VIN = 6V to 22V, ILOAD = 0 to 30mA • 4.8 5.0 5.2
V
VIN = 5V, RON = 16.2kΩ,
fSW = 678kHz • 4.6 4.8
Power Good Output
Power good threshold -10 -7.5 -5 %
Power good hysteresis 1 4 %
Power good Minimum ISINK = 1mA 0.2 V
Power good, unpowered ISINK = 1mA 0.5 V
Power good assertion delay,
FB rising 2 ms
Power good de-assertion delay,
FB falling 65 µs
XR76117
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Electrical Characteristics (Continued)
Specifications are for operating junction temperature of TJ = 25°C only; limits applying over the full operating junction
temperature range are denoted by a •. Typical values represent the most likely parametric norm at TJ = 25°C, and are
provided for reference purposes only. Unless otherwise indicated, VIN = 12V, SW = AGND = PGND = 0V, CVCC = 4.7uF.
Symbol Parameter Conditions • Min Typ Max Units
Mode Control (FCCM)
FCCM mode logic high threshold FCCM rising • 2.4 V
FCCM mode logic low threshold FCCM falling • 0.4 V
Input leakage current 100 nA
Open Feedback/OVP Detect (VSNS)
OVP trip high threshold VSNS rising. Specified as % of VREF • 115 120 125 %
OVP trip low threshold VSNS falling. Specified as % of VREF • 115 %
OVP comparator delay VSNS rising • 0.5 1 3.5 µs
Delay to turn off power stage from an
overvoltage event VSNS rising • 3.5 µs
Protection: OCP, OTP, Short-Circuit
Hiccup timeout 110 ms
ILIM/RDS 6.30 7.15 8.00 µA/mΩ
ILIM current temperature coefficient 0.4 %/°C
ILIM comparator offset -4.7 0 4.7 mV
ILIM comparator offset • -8.0 0 8.0 mV
Current limit blanking 100 ns
Thermal shutdown threshold Rising temperature 138 °C
Thermal hysteresis 15 °C
Feedback pin short-circuit threshold Percent of VREF, short circuit is active.
After PGOOD asserts high. • 50 60 70 %
Output Power Stage
High-side MOSFET RDS(ON) IDS = 2A 7.7 10 mΩ
Low-side MOSFET RDS(ON) IDS = 2A 7.0 10 mΩ
Maximum output current • 15 A
XR76117
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Pin Configuration
Pin Functions
Pin Number Pin Name Type Description
1 FB Analog Feedback input to feedback comparator.
2 FCCM Input Forcing this pin logic level high forces CCM operation.
3
AGND Analog Signal ground for control circuitry. Connect to AGND pad with a short trace.
4
5 TON Analog Constant on-time programming pin. Connect with a resistor to AGND.
6 ILIM Analog Overcurrent protection programming. Connect with a resistor to SW.
7 PGOOD Output,
Open Drain Power-good output. Open drain to AGND. Low Z when IC unpowered.
8 VSNS Analog Sense pin for output OVP and open FB.
9 VIN Analog Supply input for the regulator’s LDO. Normally connected to PVIN.
10 VCC Analog The output of regulators LDO. It requires a 4.7µF VCC bypass capacitor. For operation
using a 5V rail, VCC should be tied to VIN.
11 PGND Power Ground of the power stage. Internally connected to source of the low-side MOSFET.
12 SW Power Switch node. Internally it connects source of the high-side MOSFET to drain of the
low-side MOSFET.
13 PVIN Power Input voltage for power stage. Internally connected to drain of the high-side MOSFET.
14 BST Analog High-side driver supply pin. Connect a 0.1µF bootstrap capacitor between BST and SW.
15 EN Input Precision enable pin. Pulling this pin above 2V will enable the regulator.
16 SS Analog Soft-start pin. Connect an external capacitor between SS and AGND to program the soft-
start rate based on the 10µA internal source current.
17 AGND PAD Analog Signal ground for control circuitry.
BOTTOM VIEW
VSNS
VIN
VCC
17
AGND
123456
FB
FCCM
AGND
AGND
TON
ILIM
PGOOD
7
8
9
10
BST
EN
SS
14
15
16
13
12
11 PGNDPVIN
SW
TOP VIEW
VCC
VIN
VSNS
17
AGND
123456
FB
FCCM
AGND
AGND
TON
ILIM
PGOOD
7
10
9
8
BST
EN
SS
14
15
16
13
12
11 PGNDPVIN
SW
XR76117
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Typical Performance Characteristics
Efficiency and Package Thermal Derating
Unless otherwise specified: TAMBIENT = 25°C, no airflow, f = 800kHz. Efficiency data includes inductor losses, schematic
from the Application Information section of this datasheet.
Figure 3. Efficiency, VIN = 12V Figure 4. Efficiency, VIN = 5V
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
0.1 1.0 10.0
600kHz
5.0V DCM
3.3V DCM
2.5V DCM
1.8V DCM
1.5V DCM
1.2V DCM
1.0V DCM
5.0V CCM
3.3V CCM
2.5V CCM
1.8V CCM
1.5V CCM
1.2V CCM
1.0V CCM
IOUT (A)
Efficiency (%)
0.36µH (1.0V, 1.2V, 1.5V)
0.56µH (1.8V, 2.5V)
1µH (3.3V, 5.0V)
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
0.1 1.0 10.0
0.36µH (1.0V, 1.2V, 1.5V)
0.56µH (1.8V, 2.5V)
1µH (3.3V)
0.36µH (1.0V, 1.2V, 1.5V)
0.56µH (1.8V, 2.5V)
1µH (3.3V)
IOUT (A)
Efficiency (%)
600kHz
0.36µH (1.0V, 1.2V, 1.5V)
0.56µH (1.8V, 2.5V)
1µH (3.3V)
3.3V DCM 3.3V CCM
2.5V DCM 2.5V CCM
1.8V DCM 1.8V CCM
1.5V DCM 1.5V CCM
1.2V DCM 1.2V CCM
1.0V DCM 1.0V CCM
Figure 5. Maximum TAMBIENT vs. IOUT, VIN = 12V,
No Airflow
Figure 6.Maximum TAMBIENT vs. IOUT,
VIN = 5V, No Airflow
30
40
50
60
70
80
90
100
110
120
130
3 5 7 9 11 13 15
5.0V, CCM, 600kHz
2.5V, CCM, 800kHz
1.0V, CCM, 800kHz
TAMBIENT (ºC)
IOUT (A)
30
40
50
60
70
80
90
100
110
120
130
3.3V, CCM, 600kHz
1.8V, CCM, 800kHz
1.0V, CCM, 800kHz
3 5 7 9 11 13 15
TAMBIENT (ºC)
IOUT (A)
XR76117
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Typical Performance Characteristics (Continued)
All data taken at VIN = 12V, VOUT = 1.8V, f = 800kHz, TA = 25°C, no airflow, forced CCM. (Unless otherwise specified).
Schematic from the Applications Information section of this datasheet.
VIN
EN
IOUT
VOUT
4ms/div
VIN
EN
IOUT
VOUT
4ms/div
Figure 9. Power-Up, IOUT = 15A Figure 10. Power-Up, IOUT = 0A
SW
VOUT
AC-coupled
20MHz
IOUT
28mVp-p
SW
VOUT
AC-coupled
20MHz
IOUT
23mVp-p
Figure 7. Steady State, IOUT = 15A Figure 8. Steady State, DCM, IOUT = 0A
SW
VOUT AC-coupled
20MHz
IOUT
90mV
-66mV
Di/Dt = 2.5A/μs
20μs/div
SW
VOUT AC-coupled
20MHz
IOUT
90mV
-66mV
Di/Dt = 2.5A/μs
20μs/div
Figure 11. Load Transient, Forced CCM,
0A to 7.5A
Figure 12. Load Transient, DCM,
2A to 9.5A
XR76117
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Typical Performance Characteristics (Continued)
All data taken at VIN = 12V, VOUT = 1.8V, f = 800kHz, TA = 25°C, no airflow, forced CCM. (Unless otherwise specified).
Schematic from the Applications Information section of this datasheet.
IOUT
40ms/div
VOUT
Pre-bias = 1.2V
PGOOD
VOUT
1ms/div
Figure 15. Power-Up with Pre-Bias Voltage,
IOUT = 0A
Figure 16. Short-Circuit Recovery,
IOUT = 15A
EN
VOUT
IOUT
PGOOD
4ms/div
SW
VOUT AC-coupled
20MHz
IOUT
90mV
-66mV
Di/Dt = 2.5A/μs
20μs/div
Figure 13. Load Transient, DCM or Forced CCM,
7.5A to 15A
Figure 14. Enable Functionality,
VIN = 12V
XR76117
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Typical Performance Characteristics (Continued)
All data taken at VIN = 12V, VOUT = 1.8V, f = 800kHz, TA = 25°C, no airflow, forced CCM. (Unless otherwise specified).
Schematic from the Applications Information section of this datasheet.
Figure 17. Load Regulation Figure 18. Line Regulation
IOUT (A)
1.750
1.760
1.770
1.780
1.790
1.800
1.810
1.820
1.830
1.840
1.850
0 2 4 6 8 10 12 14 15
VOUT (V)
1.750
1.760
1.770
1.780
1.790
1.800
1.810
1.820
1.830
1.840
1.850
4 6 8 10 12 14 16 18 20 22
VIN (V)
VOUT (V)
Figure 19. tON vs. RON Figure 20. tON vs. VIN, RON = 5.9kΩ
RON (kΩ)
tON (ns)
0
100
200
300
400
500
600
700
800
900
1,000
0510 15 20 25 3530
Calculated
Typical
100
150
200
250
300
350
400
450
4 6 8 10 12 14 16 18 20 22
VIN (V)
tON (ns)
Calculated
Typical
Figure 21. Frequency vs. IOUT Figure 22. Frequency vs. VIN
IOUT (A)
f (kHz)
0 2 4 6 8 10 12 14 15
0
100
200
300
400
500
600
700
800
900
VIN (V)
f (kHz)
0
100
200
300
400
500
600
700
800
900
4 6 8 10 12 14 16 18 20 22
XR76117
10/18
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Typical Performance Characteristics (Continued)
All data taken at VIN = 12V, VOUT = 1.8V, f = 800kHz, TA = 25°C, no airflow, forced CCM. (Unless otherwise specified).
Schematic from the Applications Information section of this datasheet.
Figure 23. IOCP vs. RLIM
0
5
10
15
20
25
1.5 2.0 2.5 3.0 3.5
RLIM (kΩ)
IOCP (A)
Calculated worst case
Typical
Figure 24. VREF vs. Temperature
Figure 25. tON vs. Temperature, RON = 5.9k
590
595
600
605
610
-40 -20 0 20 40 60 80 100 120
TJ (°C)
VREF (mV)
TJ (˚C)
tON (ns)
100
150
200
250
300
-40 -20 0 20 40 60 80 100 120
XR76117
11/18
REV1D
VCCVIN PGOOD
SS
VSNS
FCCM
EN ILIMTON AGND
PGND
SW
PVIN
BST
FB
XR76117
POWER GOOD
LDO
COT CONTROL LOOP
DELAY
PGND
SW
OVP ZC
4.25V
VCC UVLO
VCC
0.555V
0.6V
VH = 1.2 x VREF
VL = 1.15 x VREF
FB
0.36V
VCC
SCCOMP
1.9V EN
LEVEL
SHIFT
AND
NON
OVERLAP
CONTROL
HICCUP
THERMAL
SHUTDOWN
PGND
10µA
ILIM
HS
DRV
LS
DRV
VCC
VCC
ENABLING SWITCHING
Figure 26. Functional Block Diagram
Functional Block Diagram
XR76117
12/18
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Applications Information
Detailed Operation
The XR76117 uses a synchronous step-down proprietary
emulated current-mode Constant On-Time (COT) control
scheme. The on-time, which is programmed via RON,
is inversely proportional to VIN and maintains a nearly
constant frequency. The emulated current-mode control
allows the use of ceramic output capacitors.
Each switching cycle begins with the high-side (switching)
FET turning on for a preprogrammed time. At the end
of the on-time, the high-side FET is turned off and the
low-side (synchronous) FET is turned on for a preset
minimum time (250ns nominal). This parameter is termed
the minimum off-time. After the minimum off-time the voltage
at the feedback pin FB is compared to an internal voltage
ramp at the feedback comparator. When VFB drops below
the ramp voltage, the high-side FET is turned on and the
cycle repeats. This voltage ramp constitutes an emulated
current ramp and allows for the use of ceramic capacitors,
in addition to other capacitor types, for output filtering.
Enable
The enable input provides precise control for startup.
Where bus voltage is well regulated, the enable input
can be derived from this voltage with a suitable resistor
divider. This ensures that XR76117 does not turn on
until bus voltage reaches the desired level. Therefore the
enable feature allows implementation of undervoltage
lockout for the bus voltage PVIN. Simple sequencing can
be implemented by using the PGOOD signal as the enable
input of a succeeding XR76117. Sequencing can also
be achieved by using an external signal to control the
enable pin.
Selecting the Forced CCM Mode
A voltage higher than 2.4V at the FCCM pin forces the
XR76117 to operate in continuous conduction mode (CCM).
Note that discontinuous conduction mode (DCM) is always
on during soft-start. DCM will persist following soft-start
until a sufficient load is applied to transition the regulator
to CCM. Magnitude of the load required to transition
to CCM is ΔIL/2, where ΔIL is peak-to-peak inductor
current ripple. Once the regulator transitions to CCM it will
continue operating in CCM regardless of the load magnitude.
Selecting the DCM/CCM Mode
The DCM will always be available if a voltage less
than 0.4V is applied to the FCCM pin. The XR76117
will operate in either DCM or CCM depending on the
load magnitude. At light loads DCM significantly increases
efficiency as seen in Figures 3 and 4. A preload of 10mA
is recommended for DCM operation. This helps improve
voltage regulation when external load is less then 10mA
and may reduce voltage ripple.
Programming the On-Time
The on-time tON is programmed via resistor RON according
to following equation:
VIN × [tON
–
(2.5 × 10-8)]
RON =
3.45 × 10
-10
VOUT
tON = VIN x 1.06 x f x Eff.
RON = (3.45 × 10-10)
–
[(2.5 × 10-8) x VIN]
VOUT
1.06 x f x Eff.
RLIM =
+
0.16kΩ
(IOCP + (0.5 × ∆IL))
ILIM
RDS
R1 = R2 x VOUT
0.6
–
1
CSS = tSS x 10µA
0.6V
CFF = 1
2 x
π
x R1 x 5 x fLC
fLC = 1
2 x
π
x
√
L x COUT
RFF = 1
2 x
π
x f x CFF
A graph of tON versus RON, using the above equation,
is compared to typical test data in Figure 19. The graph
shows that calculated data matches typical test data
within 3%.
The tON corresponding to a particular set of operating
conditions can be calculated based on empirical data from:
VIN × [tON
–
(2.5 × 10-8)]
RON = 3.45 × 10-10
V
OUT
tON = V
IN
x 1.06 x f x Eff.
RON = (3.45 × 10-10)
–
[(2.5 × 10-8) x VIN]
VOUT
1.06 x f x Eff.
RLIM =
+
0.16kΩ
(IOCP + (0.5 × ∆IL))
ILIM
RDS
R1 = R2 x VOUT
0.6
–
1
CSS = tSS x 10µA
0.6V
CFF = 1
2 x
π
x R1 x 5 x fLC
fLC = 1
2 x
π
x
√
L x COUT
RFF = 1
2 x
π
x f x CFF
Where:
f is the desired switching frequency at
nominal IOUT.
Eff. is the converter efficiency corresponding to
nominal IOUT.
Substituting for tON in the first equation we get:
VIN × [tON
–
(2.5 × 10-8)]
RON = 3.45 × 10-10
VOUT
tON = VIN x 1.06 x f x Eff.
RON = (3.45 × 10-10)
–
[(2.5 × 10-8) x VIN]
VOUT
1.06 x f x Eff.
RLIM =
+
0.16kΩ
(IOCP + (0.5 × ∆IL))
ILIM
RDS
R1 = R2 x VOUT
0.6
–
1
CSS = tSS x 10µA
0.6V
CFF = 1
2 x
π
x R1 x 5 x fLC
fLC = 1
2 x
π
x
√
L x COUT
RFF = 1
2 x
π
x f x CFF
Now RON can be calculated in terms of operating
conditions VIN, VOUT, f and efficiency using the
above equation.
At VIN = 12V, f = 800kHz, IOUT = 15A and using the
efficiency numbers from Figure 3 we get the following RON:
VOUT (V) Eff. (%) f (kHz) RON (kΩ)
5.0 94 600 23.37
3.3 92 600 15.48
2.5 89 800 8.73
1.8 86 800 6.28
1.5 84 800 5.23
1.2 82 800 4.13
1.0 80 800 3.40
RON for common output voltages,
VIN = 12V, IOUT = 15A
XR76117
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Applications Information (Continued)
Overcurrent Protection (OCP)
If the load current exceeds the programmed overcurrent
threshold IOCP for four consecutive switching cycles,
the regulator enters the hiccup mode of operation.
In hiccup mode the MOSFET gates are turned off for 110ms
(hiccup timeout). Following the hiccup timeout a soft-start
is attempted. If OCP persists, hiccup timeout will repeat.
The regulator will remain in hiccup mode until load current
is reduced below the programmed IOCP. In order to program
overcurrent protection use the following equation:
VIN × [tON
–
(2.5 × 10-8)]
RON = 3.45 × 10-10
VOUT
tON = VIN x 1.06 x f x Eff.
RON = (3.45 × 10-10)
–
[(2.5 × 10-8) x VIN]
VOUT
1.06 x f x Eff.
RLIM =
+
0.16kΩ
(IOCP + (0.5 × ∆IL))
ILIM
RDS
R1 = R2 x VOUT
0.6
–
1
CSS = tSS x 10µA
0.6V
CFF = 1
2 x
π
x R1 x 5 x fLC
fLC = 1
2 x
π
x
√
L x COUT
RFF = 1
2 x
π
x f x CFF
Where:
RLIM is resistor value in kΩ for programming IOCP
IOCP is the overcurrent value to be programmed
ΔIL is the peak-to-peak inductor current ripple
ILIM/RDS is the minimum value of the parameter
specified in the tabulated data
ILIM/RDS = 6.3uA/mΩ
0.16kΩ accounts for OCP comparator offset
The above equation is for worst-case analysis and
safeguards against premature OCP. Typical value of IOCP,
for a given RLIM, will be higher than that predicted by
the above equation. Graph of calculated IOCP vs. RLIM is
compared to typical IOCP in Figure 23.
Short-Circuit Protection (SCP)
If the output voltage drops below 60% of its programmed
value (i.e., FB drops below 0.36V), the regulator will enter
hiccup mode. Hiccup mode will persist until short-circuit
is removed. The SCP circuit becomes active at the end
of soft-start. Hiccup mode and short-circuit recovery
waveform is shown in Figure 16.
Over Temperature Protection (OTP)
OTP triggers at a nominal controller temperature of 138°C.
The gates of the switching FET and the synchronous FET
are turned off. When controller temperature cools down to
123°C, soft-start is initiated and regular operation resumes.
Overvoltage Protection (OVP)
The output OVP function detects an overvoltage condition
on VOUT of the regulator. OVP is achieved by comparing
the voltage at VSNS pin to an OVP threshold voltage set
at 1.2 x VREF. When VSNS voltage exceeds the OVP
threshold, an internal overvoltage signal asserts after
1us (typical). This OVP signal latches off the high-side FET,
turns on the low-side FET and also asserts PGOOD low.
The low-side FET remains on to discharge the output
capacitor until VSNS voltage drops below 1.15 x VREF.
Then low-side FET turns off to prevent complete discharge
of VOUT. The high-side and low-side FETs remain latched
off until VIN or EN is recycled. In order to use this feature,
connect VSNS to VOUT with a resistor divider as shown in
the application circuit. Use the same resistor divider value
that was used for programming VOUT.
Programming the Output Voltage
Use a voltage divider as shown in Figure 1 to program the
output voltage VOUT.
VIN × [tON
–
(2.5 × 10-8)]
RON = 3.45 × 10-10
VOUT
tON = VIN x 1.06 x f x Eff.
RON = (3.45 × 10-10)
–
[(2.5 × 10-8) x VIN]
VOUT
1.06 x f x Eff.
RLIM =
+
0.16kΩ
(IOCP + (0.5 × ∆IL))
ILIM
RDS
R1 = R2 x VOUT
0.6
–
1
CSS = tSS x 10µA
0.6V
CFF = 1
2 x
π
x R1 x 5 x fLC
fLC = 1
2 x
π
x
√
L x COUT
RFF = 1
2 x
π
x f x CFF
The recommended value for R2 is 2kΩ.
Programming the Soft-Start
Place a capacitor CSS between the SS and AGND pins to
program the soft-start. In order to program a soft-start time
of tSS, calculate the required capacitance CSS from the
following equation:
VIN × [tON
–
(2.5 × 10-8)]
RON = 3.45 × 10-10
VOUT
tON = VIN x 1.06 x f x Eff.
RON = (3.45 × 10-10)
–
[(2.5 × 10-8) x VIN]
VOUT
1.06 x f x Eff.
RLIM =
+
0.16kΩ
(IOCP + (0.5 × ∆IL))
ILIM
RDS
R1 = R2 x VOUT
0.6
–
1
CSS = tSS x 10µA
0.6V
CFF = 1
2 x
π
x R1 x 5 x fLC
fLC = 1
2 x
π
x
√
L x COUT
RFF = 1
2 x
π
x f x CFF
Pre-Bias Startup
XR76117 has the capability to startup into a pre-charged
output. Typical pre-bias startup waveforms are shown in
Figure 15.
Maximum Allowable Voltage Ripple at FB Pin
The steady-state voltage ripple at feedback pin FB
(VFB,RIPPLE) must not exceed 50mV in order for the
Regulator to function correctly. If VFB,RIPPLE is larger than
50mV then COUT and/or L should be increased as necessary
in order to keep the VFB,RIPPLE below 50mV.
XR76117
14/18
REV1D
Applications Information (Continued)
Feed-Forward Capacitor (CFF)
The feed-forward capacitor CFF is used to set the necessary
phase margin when using ceramic output capacitors.
Calculate CFF from the following equation:
VIN × [tON
–
(2.5 × 10-8)]
RON = 3.45 × 10-10
VOUT
tON = VIN x 1.06 x f x Eff.
RON = (3.45 × 10-10)
–
[(2.5 × 10-8) x VIN]
VOUT
1.06 x f x Eff.
RLIM =
+
0.16kΩ
(IOCP + (0.5 × ∆IL))
ILIM
RDS
R1 = R2 x VOUT
0.6
–
1
CSS = tSS x 10µA
0.6V
CFF = 1
2 x
π
x R1 x 5 x fLC
fLC = 1
2 x
π
x
√
L x COUT
RFF = 1
2 x
π
x f x CFF
Where fLC, the output filter double-pole frequency is
calculated from:
VIN × [tON
–
(2.5 × 10-8)]
RON = 3.45 × 10-10
VOUT
tON = VIN x 1.06 x f x Eff.
RON = (3.45 × 10-10)
–
[(2.5 × 10-8) x VIN]
VOUT
1.06 x f x Eff.
RLIM =
+
0.16kΩ
(IOCP + (0.5 × ∆IL))
ILIM
RDS
R1 = R2 x VOUT
0.6
–
1
CSS = tSS x 10µA
0.6V
CFF = 1
2 x
π
x R1 x 5 x fLC
fLC = 1
2 x
π
x
√
L x COUT
RFF = 1
2 x
π
x f x CFF
You must use manufacturer’s DC derating curves to
determine the effective capacitance corresponding to VOUT.
A load step test (and/or a loop frequency response test)
should be performed and if necessary CFF can be adjusted
in order to get a critically damped transient load response.
In applications where output voltage ripple is less than
about 3mV, such as when a large number of ceramic
COUT are paralleled, it is necessary to use ripple injection
from across the inductor. The circuit and corresponding
calculations are explained in the MaxLinear design note.
Feed-Forward Resistor (RFF)
RFF is required when CFF is used. RFF, in conjunction with
CFF, functions similar to a high frequency pole and adds
gain margin to the frequency response. Calculate RFF from:
VIN × [tON
–
(2.5 × 10-8)]
RON = 3.45 × 10-10
VOUT
tON = VIN x 1.06 x f x Eff.
RON = (3.45 × 10-10)
–
[(2.5 × 10-8) x VIN]
VOUT
1.06 x f x Eff.
RLIM =
+
0.16kΩ
(IOCP + (0.5 × ∆IL))
ILIM
RDS
R1 = R2 x VOUT
0.6
–
1
CSS = tSS x 10µA
0.6V
CFF = 1
2 x
π
x R1 x 5 x fLC
fLC = 1
2 x
π
x
√
L x COUT
RFF = 1
2 x
π
x f x CFF
Where f is the switching frequency.
If RFF is greater than 0.1xR1, then instead of CFF/RFF, use
ripple injection circuit as described in MaxLinear’s design
note.
Thermal Design
Proper thermal design is critical in controlling device
temperatures and in achieving robust designs. There are
a number of factors that affect the thermal performance.
One key factor is the temperature rise of the devices in
the package, which is a function of the thermal resistances
of the devices inside the package and the power
being dissipated.
The thermal resistance of the XR76117 is specified in
the Operating Ratings section of this datasheet. The θJA
thermal resistance specification is based on the XR76117
evaluation board operating without forced airflow. Since the
actual board design in the final application will be different,
the thermal resistances in the final design may be different
from those specified.
The package thermal derating curves are shown in Figures
5 and 6. These correspond to input voltage of 12V and 5V,
respectively.
XR76117
15/18
REV1D
Applications Information
Figure 27. Application Circuit Schematic
FB
R2
2k
R1
4.04k
RFF
0.4k
CFF
470pF
CBST
REN2 3.83k REN1 10k VIN
0.1µF
FB
FCCM
AGND
AGND
TON
ILIM
PGOOD
1
2
3
4
5
6
7
17
16
15
14
13
8
9
10
11
VSENSE
VIN
VCC
PGND
EPAD_AGND
SS
EN
BST
PVIN
FB
VCC
RON 6.19k
RPGOOD 10k
RLIM 3.16k
SW
VCC
CSS
47nF
12 SW
SW VOUT
L1, IHLP-4040DZ-01
0.36µH at 31.5A, 1.3m Ohm
2 x 0.1µF
4 x 0.1µF 3 x 100µF/6.3V/X6T/1206
4 x 22µF/25V/X6T/1206
800kHz, 1.8V, 0-15A
VIN
CIN
0.1µF
CVCC
4.7µF
VCC
VOUT
RSENS1
4.04k
RSENS2
2k
VIN = 12V
XR76117
XR76117
16/18
REV1D
Mechanical Dimensions
Revision: D
Drawing No.: POD-00000071
TOP VIEW BOTTOM VIEW
TERMINAL DETAILS
SIDE VIEW
Figure 28. Mechanical Dimensions
XR76117
17/18
REV1D
Recommended Land Pattern and Stencil
Revision: D
Drawing No.: POD-00000071
TYPICAL RECOMMENDED STENCIL
TYPICAL RECOMMENDED LAND PATTERN
Figure 29. Recommended Land Pattern and Stencil
XR76117
The content of this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by MaxLinear, Inc.. MaxLinear, Inc. assumes
no responsibility or liability for any errors or inaccuracies that may appear in the informational content contained in this guide. Complying with all applicable copyright laws is the responsibility of the
user. Without limiting the rights under copyright, no part of this document may be reproduced into, stored in, or introduced into a retrieval system, or transmitted in any form or by any means (electronic,
mechanical, photocopying, recording, or otherwise), or for any purpose, without the express written permission of MaxLinear, Inc.
Maxlinear, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support
system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless MaxLinear, Inc. receives, in writing, assurances to its satisfaction that: (a) the
risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of MaxLinear, Inc. is adequately protected under the circumstances.
MaxLinear, Inc. may have patents, patent applications, trademarks, copyrights, or other intellectual property rights covering subject matter in this document. Except as expressly provided in any written
license agreement from MaxLinear, Inc., the furnishing of this document does not give you any license to these patents, trademarks, copyrights, or other intellectual property.
MaxLinear, the MaxLinear logo, and any MaxLinear trademarks, MxL, Full-Spectrum Capture, FSC, G.now, AirPHY and the MaxLinear logo are all on the products sold, are all trademarks of MaxLinear,
Inc. or one of MaxLinear’s subsidiaries in the U.S.A. and other countries. All rights reserved. Other company trademarks and product names appearing herein are the property of their respective owners.
© 2016 - 2019 MaxLinear, Inc. All rights reserved
XR76117_DS_020819 18/18
REV1D
Corporate Headquarters:
5966 La Place Court
Suite 100
Carlsbad, CA 92008
Tel.:+1 (760) 692-0711
Fax: +1 (760) 444-8598
www.maxlinear.com
Ordering Information(1)
Part Number Operating Temperature Range Lead-Free Package Packaging
Method
XR76117EL-F
-40°C ≤ TJ ≤ 125°C Yes(2) 5mm x 6mm QFN
Bulk
XR76117ELTR-F Tape and Reel
XR76117EVB XR76117 evaluation board
NOTES:
1. Refer to www.exar.com/XR76117 for most up-to-date Ordering Information.
2. Visit www.exar.com for additional information on Environmental Rating.
Revision History
Revision Date Description
1A July 2016 Initial Release
1B November 2017
Added MaxLinear logo. Updated format and Ordering Information table. Changed name of
Package Description section to Mechanical Dimensions and Recommended Land Pattern and
Stencil per updated format. Corrected typo in Package Description / Mechanical Dimensions.
1C May 2018 Updated Land Pattern and Stencil.
1D February 2019 Package dimension A updated to align with JEDEC. Update Ordering Information.
