QS52807BTSOX - Integrated Device Technology, Inc.

QS52807/A

GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE

SEPTEMBER 2000

1999 Integrated Device Technology, Inc. DSC-5233/-c

QS52807/A

INDUSTRIAL TEMPERATURE RANGE

GUARANTEED LOW SKEW

CMOS CLOCK

DRIVER/BUFFER

FUNCTIONAL BLOCK DIAGRAM

O10

FEATURES:

− 10 outputs

− Rail-to-rail output voltage swing

− 25Ω on-chip resistors available for low noise

− Input hysteresis for better noise margin

− Guaranteed low skew:

• 0.3ns output skew (same bank)

• 0.6ns output skew (diffe rent bank)

• 1ns part-to-part skew

− Std. and A speed grades

− Available in QSOP and SOIC packages

DESCRIPTION

The QS52807 clock driver/buffer circuits can be used for clock

buffering schemes where low skew is a key parameter. The QS52807

offers ten non-inverting outputs. Designed in IDT's proprietary QCMOS

process, these devices provide low propagation delay buffering with on-

chip skew of 0.3ns for same-transition signals. The QS52807 has on-chip

series termination resistors for lower noise clock signals. The QS52807

series resistor version is recommended for driving unterminated lines

with capacitive loading and other noise sensitive clock distribution

circuits. These clock buffer products are designed for use in high-

performance workstations, embedded and personal computing systems.

Several devices can be used in parallel or scattered throughout a system

for guaranteed low skew, system-wide clock distribution networks. Rail-

to-rail output swing improves noise margin and allows easy interface with

CMOS inputs.

The QS52807 is characterized for operation at -40°C to +85°C.

INDUSTRIAL TEMPERATURE RANGE

QS52807/A

GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER

PIN CONFIGURATION

QSOP/ SOIC

TOP VIEW

GND

VCC

GND

O10

VCC

SO20-2

SO20-8

ABSOLUTE MAXIMUM RATINGS (1)

Symbol Description Max. Unit

TERM(2) Supply Voltage to Ground – 0.5 to +7 V

DC Output Voltage VOUT – 0.5 to +7 V

TERM(3) DC Input Voltage VIN – 0.5 to +7 V

VAC AC Input Voltage (pulse width ≤20ns) -3 V

IOUT DC Output Current VIN < 0 -20 mA

DC Output Current Max. Sink Current/Pin 120 mA

TSTG Storage Temperature – 65 to +150 °C

TJJunction Temperature 150 °C

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM

RATINGS may cause permanent damage to the device. This is a

stress rating only and functional operation of the device at these or

any other c onditions above thos e indicated i n the operational secti ons

of this specification is not implied. Exposure to absolute maximum

rating condit i ons for extended periods may affect reliability .

2. Vc c Terminals .

3. All terminals except Vc c.

CAPACITANCE (TA = +25OC, f = 1.0MHz, VIN = 0V)

QSOP SOIC

Pins Typ. Max. (1) Typ. Max. (1) Unit

CIN 3657pF

NOTE:

1. This paramet er is guaranteed but not produc tion tested.

PIN DESCRIPTION

Pin Names I/O Description

IN I Clock Input

Ox O Clock Outputs

QS52807/A

GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:

Industrial: TA = -40°C to +85°C, VCC = 5.0V ± 10%, VHC = VCC - 0.2V, VLC = 0.2V

Symbol Parameter Test Conditions Min. Typ.(1) Max. Unit

VIH Input HIGH Voltage Guaranteed Logic HIGH for All Inputs 2 — — V

VIL Input LOW Voltage Guaranteed Logic LOW for All Inputs — — 0.8 V

VIC Clamp Diode Voltage (3) Vcc = Min., IIN = -18mA — –0.7 –1.2 V

VOH Output HIGH Voltage Vcc = Min., VIN = VIH or VIL, IOH = -12mA 3.6 4.3 — V

Vcc = Min., VIN = VIH or VIL, IOH = -24mA 2.4 — —

VOL Output LOW Voltage Vcc = Min., VIN = VIH or VIL, IOL = 12mA — — 0.5 V

IIN Input Leakage Current Vcc = Max., VIN = VCC or GND — — ±1 µA

IOFF Input Power Off Leakage Vcc = 0V, VIN = VCC or GND — — ±1 µA

IOS Short Circuit Current (2,3) Vcc = Max., VOUT = GND –60 ——mA

∆VTInput Hysteresis VTLH - VTHL for All Inputs — 0.2 — V

ROUT Output Resistance (4) Vcc = Min., IOL = 12mA — 28 — Ω

NOTES:

1. Typical values are at VCC = 5. 0V, TA = 25° C.

2. Not m ore than one output should be used t o test this high power cond i t i on. Duratio n i s less t han one second.

3. Guaranteed by design but no t test ed.

4. Output resi s tance represents t he total output i m pedance of the logic devic e and i ncludes added series termination resistance.

POWER SUPPLY CHARACTERISTICS

Symbol Parameter Test Conditions Typ. Max. Unit

ICC Quiescent Power Supply Current VCC = Max., VIN = GND or Vcc 0.005 0.5 mA

∆ICC Supply Current per Input HIGH VCC = Max., VIN = 3.4V

Input toggling at 50% duty cycle 0.5 2.5 mA

ICCD Dynamic Power Supply Current per Output (1) VCC = Max., outputs Enabled 0.12 0.2 mA/MHz

ICTotal Power Supply Current Examples (2) VCC = Max.,

Input at 50% duty cycle VIN = GND or Vcc 12 21 mA

fI = 10MHz VIN = GND or 3V 12 2.2

VCC = Max.,

Input at 50% duty cycle VIN = GND or Vcc 3 6

fI = 2.5MHz VIN = GND or 3V 3.5 7

NOTES:

1. Guaranteed by design but not tested. CL = 0pF.

2. IC = ICC + (∆ICC)(DH)(NT) + ICCD (fO)(NO)

where:

DH = Input Duty Cycle

NT = Number of TTL HIGH inputs at DH

fO = Output Frequency

NO = Number of out puts at fO

INDUSTRIAL TEMPERATURE RANGE

QS52807/A

GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

TA = -40°C to +85°C, VCC = 5.0V ± 10%

CLOAD = 50pF (no resistor) QS52807 QS52807A

Symbol

Parameter (1) Min. Max. Min. Max. Unit

tSK(01) Skew between all outputs, same transition — 0.5 — 0.35 ns

tSK(P) Pulse Skew; skew between opposite transitions of the same

output (tPHL - tPLH)—1—1ns

tSK(T) Part-to-part skew (2) —1.5 — 1.5 ns

tPLH

tPHL Propagation Delay (2)

IN to Ox 1.5 5.6 1.5 5.3 ns

tROutput Rise Time, 0.8V to 2V (3) — 1.5 — 1.5 ns

tFOutput Fall Time, 0.2Vcc to 0.8Vcc (3) —3—3ns

NOTES:

1. Sk ew parameters are guaranteed across temperature range, but not tested. Skew parameters are measured at 0.5Vc c.

2. tSK(T) only applies t o devi c es of the sam e transition, part t ype, temperature, power supply voltage, loading, package, and speed grade.

3. The propagation delay range indicat ed by M i n. and Max . specific ations result s from process and environmental variables . These propagation delays

do not imply li mit skew.

QS52807/A

GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE

50pF 500Ω

VIN

Pulse

Generator DUT

50Ω

VCC

VOUT

Pulse ge n era tor fo r a ll pu ls e s : f ≤ 1.0MH z; tF ≤ 2.5ns; tR ≤ 2.5ns

INPUT

PART 1 OU TPUT

PART 2 OU TPUT

tPLH1 tPHL1

tPLH2 tPHL2

tSK(t)

1.5V

VOH

0.5VCC

VOH

VOL

tSK(p) = tPLH2 - tPLH1 or tPHL2 - tPHL1

INPUT

OUTPUT 2.0V

0.8V

1.5V

VOH

0.5VCC

VOL

tPLH tPHL

tRtF

INPUT

OUTPUT

tPLH tPHL

1.5V

VOH

0.5VCC

VOL

tSK(p) = tPHL - tPLHL

INPUT

OUTPUT 1

tPLH1

1.5V

VOH

0.5VCC

VOH

VOL

OUTPUT 2

tPHL1

tSK(O1) tSK(O1)

tPLH2 tPHL2

tSK(01) = tPLH2 - tPLH1 or tPHL2 - tPHL1

TEST CIRCUITS AND WAVEFORMS

PROPAGATION DELAY PULSE SKEW — tSK(P)

OUTPUT SKEW — tSK(O1) PART-TO-PART SKEW — tSK(T)

INDUSTRIAL TEMPERATURE RANGE

QS52807/A

GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER

ORDERING INFORMATION

CORPORATE HEADQUARTERS for SALES:

2975 Stender Way 800-345-7015 or 408-727-6116

Santa Clara, CA 95054 fax: 408-492-8674

www.idt.com*

*To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2.

The IDT logo, QuickSwitch, and SynchroSwitch are registered trademarks of Integrated Device Technology, Inc.

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D evice Typ e X

Package

52807

52807A Guaranteed Low Skew C M OS C lock Driver/Buffer

Sm all Outline IC (300 m il) (SO 20-2)

Quarter-size Sm all Outline Package (SO20-8)