BSC050N04LS G OptiMOSTM3 Power-Transistor Product Summary Features VDS 40 V * Fast switching MOSFET for SMPS RDS(on),max 5.0 mW * Optimized technology for DC/DC converters ID 85 A * Qualified according to JEDEC1) for target applications PG-TDSON-8 * N-channel; Logic level * Excellent gate charge x R DS(on) product (FOM) * Very low on-resistance R DS(on) * Superior thermal resistance * 100% Avalanche tested * Pb-free plating; RoHS compliant * Halogen-free according to IEC61249-2-21 Type Package Marking BSC050N04LS G PG-TDSON-8 050N04LS Maximum ratings, at T j=25 C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value V GS=10 V, T C=25 C 85 V GS=10 V, T C=100 C 54 V GS=4.5 V, T C=25 C 71 V GS=4.5 V, T C=100 C 45 V GS=10 V, T A=25 C, R thJA=50 K/W 2) 18 Unit A Pulsed drain current3) I D,pulse T C=25 C 340 Avalanche current, single pulse4) I AS T C=25 C 50 Avalanche energy, single pulse E AS I D=50 A, R GS=25 W 35 mJ Gate source voltage V GS 20 V 1) J-STD20 and JESD22 Rev. 2.1 page 1 2013-05-17 BSC050N04LS G Maximum ratings, at T j=25 C, unless otherwise specified Parameter Symbol Conditions Power dissipation P tot Value T C=25 C 57 T A=25 C, T j, T stg -55 ... 150 IEC climatic category; DIN IEC 68-1 Parameter W 2.5 R thJA=50 K/W 2) Operating and storage temperature Unit C 55/150/56 Values Symbol Conditions Unit min. typ. max. - - 2.2 Thermal characteristics Thermal resistance, junction - case R thJC bottom top Device on PCB R thJA 6 cm2 cooling area2) K/W 20 - - 50 Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA 40 - - Gate threshold voltage V GS(th) V DS=V GS, I D=27 A 1.2 - 2 Zero gate voltage drain current I DSS V DS=40 V, V GS=0 V, T j=25 C - 0.1 1 V DS=40 V, V GS=0 V, T j=125 C - 10 100 V A Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=50 A - 5.8 7.2 mW V GS=10 V, I D=50 A - 4.2 5 - 1.5 - W 50 100 - S Gate resistance RG Transconductance g fs |V DS|>2|I D|R DS(on)max, I D=50 A 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. 3) See figure 3 for more detailed information 4) See figure 13 for more detailed information Rev. 2.1 page 2 2013-05-17 BSC050N04LS G Parameter Values Symbol Conditions Unit min. typ. max. - 2800 3700 - 630 840 Dynamic characteristics Input capacitance C iss V GS=0 V, V DS=20 V, f =1 MHz Output capacitance C oss Reverse transfer capacitance Crss - 33 - Turn-on delay time t d(on) - 6.4 - Rise time tr - 3.8 - Turn-off delay time t d(off) - 26 - Fall time tf - 4.2 - Gate to source charge Q gs - 9.0 - Gate charge at threshold Q g(th) - 4.5 - Gate to drain charge Q gd - 3.8 - Switching charge Q sw - 8.2 - Gate charge total Qg - 36 47 Gate plateau voltage V plateau - 3.2 - Gate charge total Qg V DD=20 V, I D=30 A, V GS=0 to 4.5 V - 17 23 Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 10 V - 34 - Output charge Q oss V DD=20 V, V GS=0 V - 24 - - - 47 - - 340 V DD=20 V, V GS=10 V, I D=30 A, R G=1.6 W pF ns Gate Charge Characteristics5) V DD=20 V, I D=30 A, V GS=0 to 10 V nC V nC Reverse Diode Diode continuous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=50 A, T j=25 C - 0.87 1.2 Reverse recovery charge Q rr V R=20 V, I F=I S, di F/dt =400 A/s - 27 - 5) A T C=25 C V nC See figure 16 for gate charge parameter definition Rev. 2.1 page 3 2013-05-17 BSC050N04LS G 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS10 V 60 100 50 80 40 ID [A] Ptot [W] 60 30 40 20 20 10 0 0 0 40 80 120 160 0 40 80 TC [C] 120 160 TC [C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 10 limited by on-state resistance 1 s 10 s 102 100 s 0.5 1 ZthJC [K/W] ID [A] DC 101 1 ms 10 ms 0.2 0.1 0.05 0.1 0.02 100 0.01 single pulse 10-1 0.01 10-1 100 101 102 VDS [V] Rev. 2.1 0 0 0 0 0 0 1 10-6 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2013-05-17 BSC050N04LS G 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 C R DS(on)=f(I D); T j=25 C parameter: V GS parameter: V GS 200 16 5V 4.5 V 10 V 3.2 V 160 12 3.5 V RDS(on) [mW] 4V ID [A] 120 80 8 4V 4.5 V 5V 10 V 3.5 V 4 40 3.2 V 3V 2.8 V 0 0 0 1 2 3 0 10 20 VDS [V] 30 40 50 ID [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 C parameter: T j 120 200 100 160 80 gfs [S] ID [A] 120 60 80 40 40 20 150 C 25 C 0 0 0 1 2 3 4 5 VGS [V] Rev. 2.1 0 40 80 120 160 ID [A] page 5 2013-05-17 BSC050N04LS G 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=50 A; V GS=10 V V GS(th)=f(T j); V GS=V DS; I D=27 A 8 2.5 2 6 1.5 VGS(th) [V] RDS(on) [mW] 98 % typ 4 1 2 0.5 0 0 -60 -20 20 60 100 140 180 -60 -20 20 Tj [C] 60 100 140 180 Tj [C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 1000 25 C 150 C, 98% Ciss 103 Coss 150 C IF [A] C [pF] 100 102 25 C, 98% Crss 10 101 100 1 0 10 20 30 40 VDS [V] Rev. 2.1 0.0 0.5 1.0 1.5 2.0 VSD [V] page 6 2013-05-17 BSC050N04LS G 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 W V GS=f(Q gate); I D=30 A pulsed parameter: T j(start) parameter: V DD 100 12 20 V 10 8V 32 V 8 100 C 10 VGS [V] IAV [A] 25 C 125 C 6 4 2 1 0 1 10 100 1000 0 10 tAV [s] 20 30 40 Qgate [nC] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 45 V GS Qg VBR(DSS) [V] 40 35 V gs(th) 30 25 Q g(th) Q sw Q gs 20 -60 -20 20 60 100 140 Q gate Q gd 180 Tj [C] Rev. 2.1 page 7 2013-05-17 BSC050N04LS G Package Outline PG-TDSON-8-5 PG-TDSON-8-5: Outline Footprint Dimensions in mm Rev. 2.1 page 8 2013-05-17 BSC050N04LS G Package Outline PG-TDSON-8: Tape Dimensions in mm Rev. 2.1 page 9 2013-05-17 BSC050N04LS G Published by Infineon Technologies AG 81726 Munich, Germany (c) 2008 Infineon Technologies AG All Rights Reserved. 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Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.1 page 10 2013-05-17