©2001 Fairchild Semiconductor Corporation
October 2001
Rev. A, October 2001
FQA34N25
FQA34N25
250V N-Ch anne l MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters and
switch mode power supplies.
Features
34A, 250V, RDS(on) = 0.085 @VGS = 10 V
Low gate charge ( typical 60 nC)
Low Crss ( typical 60 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Thermal Characteristics
Symbol Parameter FQA34N25 Units
VDSS Drain-Source Voltage 250 V
IDDrain Current - Continuous (TC = 25°C) 34 A
- Continuous (TC = 100°C) 21.3 A
IDM Drain Current - Pulsed (Note 1) 136 A
VGSS Gate-Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 700 mJ
IAR Avalanche Current (Note 1) 34 A
EAR Repetitive Avalanche Energy (Note 1) 24.5 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.8 V/ns
PDPower Dissipation (TC = 25°C) 245 W
- Derate above 25°C 1.96 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TLMaximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter Typ Max Units
RθJC Thermal Resistance, Junction-to-Case -- 0.51 °C/W
RθCS Thermal Resistance, Case-to-Sink 0.24 -- °C/W
RθJA Thermal Resistance, Junction-to-Ambient -- 40 °C/W
TO-3P
FQA Series
GSD
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Rev. A, October 2001
FQA34N25
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
©2001 Fairchild Semiconductor Corporation
Electrical Characteristics TC = 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 0.97mH, IAS = 34A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 14A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
Symbol Parame ter Test Condit i ons Min Typ Max Units
Off Characteristics
BVDSS Drain-S ource Breakdown Voltage VGS = 0 V, I D = 250 µA250 -- -- V
BVDSS
/ TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C -- 0.27 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 250 V, VGS = 0 V -- -- 10 µA
VDS = 200 V, TC = 125°C -- -- 100 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteri st ics
VGS(th) Gate Threshold Volt age VDS = VGS, ID = 250 µA3.0 -- 5.0 V
RDS(on) Static Drain-Source
On-Resistance VGS = 10 V , ID = 17 A -- 0.067 0.085
gFS Forward Transconductance VDS = 40 V, ID = 17 A -- 24 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 2110 2750 pF
Coss Output Capacitance -- 465 610 pF
Crss Reverse Transfer Capacitance -- 60 8 0 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 125 V, ID = 34 A,
RG = 25
-- 45 100 ns
trTurn-On Rise Time -- 335 680 ns
td(off) Turn-Off De l a y Time -- 110 230 n s
tfTurn -Off Fall Time -- 1 5 0 310 ns
QgTotal Gate Ch arge VDS = 200 V, ID = 34 A,
VGS = 10 V
-- 60 80 nC
Qgs Gate-Source Charge -- 14 -- nC
Qgd Gate-Drain Charge -- 36 -- nC
Drain-Sour ce Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- 34 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 136 A
VSD Drain-Source Diode Forward V olt age VGS = 0 V, IS = 34 A -- -- 1.5 V
trr Reverse Recovery Time VGS = 0 V, I S = 34 A,
dIF / dt = 100 A/µs
-- 220 -- ns
Qrr Reverse Recovery Charge -- 1.9 - - µC
Rev. A, October 2001©2001 Fairchild Semiconductor Corporation
FQA34N25
0 20406080
0
2
4
6
8
10
12
VDS = 125V
VDS = 50V
VDS = 200V
$ Note : ID = 34 A
VGS, G ate-Source Voltage [V]
QG, T otal Ga te Char g e [n C]
10-1 100101
0
1000
2000
3000
4000
5000 Ciss = C gs + Cgd (C ds = shorted)
Coss = Cds + Cgd
Crss = Cgd
$ N o tes :
1. V GS = 0 V
2. f = 1 MHz
Crss
Coss
Ciss
Capacitance [pF]
VDS, Drain-Source Voltage [V]
0.2 0.4 0.6 0.8 1.0 1.2 1.4
10-1
100
101
102
150%
$ N o te s :
1. VGS = 0V
2. 250&s Pulse T est
25%
IDR, Reverse Drain Current [A]
VSD, So u rc e- D ra in v o ltag e [V ]
0 30 60 90 120 150 180
0.0
0.1
0.2
0.3
0.4
VGS = 20V
VGS = 10V
$ Note : TJ = 25%
RDS(ON) ['],
Drain-Source On-Resistance
ID, Drain Current [A]
246810
10-1
100
101
102
150%
25%
-55%
$ N o te s :
1. V DS = 50V
2. 250&s Pulse T est
ID, Drain C u rre n t [A ]
VGS, Gate-Source Voltage [V]
10-1 100101
100
101
102 VGS
T o p : 1 5 .0 V
1 0 .0 V
8 .0 V
7 .0 V
6 .5 V
6 .0 V
B o tto m : 5 .5 V
$
N o te s :
1 . 2 5 0 &s P u lse Te st
2 . T C = 25%
ID, D ra in Curr en t [A ]
VDS, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. Capacitance Characteristics. Figure 6. Gate -Charge Characteristics.
Figure 3. On-Resistanc e Variation vs
Drain Current and Gate Voltage. Figure 4. Body Diode Fo rwa rd Voltage
Variation with Source Current
and Temperature.
Figure 2. Transfer Characteristics.Figure 1. On - Region Ch ar acterist ics.
©2001 Fairchild Semiconductor Corporation Rev. A, October 2001
FQA34N25
10-5 10-4 10-3 10-2 10-1 100101
10-2
10-1
100
$ No te s :
1 . Z(JC(t) = 0.51 %/W M a x .
2 . D u ty Fa c to r , D= t1/t2
3 . TJM - T C = PDM * Z (JC(t)
single pu lse
D=0.5
0.02
0.2
0.05
0.1
0.01
Z(JC
(t), T h erma l R e sp on se
t1, S q u a re W a ve P u lse Du ra tion [s ec ]
25 50 75 100 125 150
0
10
20
30
40
ID, D rain C urrent [A]
TC, Case Temperature [%
]
100101102
10-1
100
101
102
103
10 µs
DC 10 ms1 ms 100 µs
Operation in This Area
is Limited by R DS(on)
$ No tes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
ID, Drain Cu rrent [A]
VDS, Drain-Source Voltage [V]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
$ Notes :
1. V GS = 10 V
2. ID = 17 A
RDS(ON) , (Norm alized)
Drain-Source On -Resistance
TJ, Junction Tem perature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
$
Notes :
1. V GS = 0 V
2. ID = 250 &A
BV DSS , (Norm alized)
Drain-Source Breakdown Voltage
TJ, Junction Temperature [oC]
Typical Characteristics (Continued)
Figure 9. Maxi m u m Sa fe Operating Area. Figur e 10. M ax imu m Dr ai n C ur re nt
vs Case Temperat ure.
Figu re 7. Brea kdown Voltage Variati on
vs Temperature. Figure 8. On-Resistance Variation
vs Temperature.
Figure 11. Transient The rm al Response C ur ve.
t1
PDM
t2
Rev. A, October 2001©2001 Fairchild Semiconductor Corporation
FQA34N25
Charge
VGS
10V Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50K)
200nF
12V
Same Type
as DUT
Charge
VGS
10V Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50K)
200nF
12V
Same Type
as DUT
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS RL
DUT
RG
VGS
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
ID
ID
t p
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
©2001 Fairchild Semiconductor Corporation Rev. A, October 2001
FQA34N25
Peak Diode Recover y dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD con troll ed by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD con troll ed by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
Rev. A, October 2001©2001 Fairchild Semiconductor Corporation
FQA34N25
Package Dimensions
15.60 ±0.20 4.80 ±0.20
13.60 ±0.20
9.60 ±0.20
2.00 ±0.20
3.00 ±0.20
1.00 ±0.20 1.40 ±0.20
ø3.20 ±0.10
3.80 ±0.20
13.90 ±0.20
3.50 ±0.20
16.50 ±0.30
12.76 ±0.20
19.90 ±0.20
23.40 ±0.20
18.70 ±0.20
1.50 +0.15
–0.05
0.60 +0.15
–0.05
5.45TYP
[5.45 ±0.30]5.45TYP
[5.45 ±0.30]
TO-3P
©2001 Fairchild Semiconductor Corporation
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devic es or syst em s
which, (a) ar e intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Form ative or In
Design This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary First Production This dat asheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconduct or reserv es the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor .
The datasheet is printed for reference information only.
Rev. H4
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STAR*POWE R is used under license
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