February 2011 Doc ID 10896 Rev 3 1/27
1
VN920SP-E
High-side driver
Features
■ECOPACK®: lead free and RoHS compliant
■Automotive Grade: compliance with AEC
guidelines
■Very low standby current
■CMOS compatible input
■Proportional load current sense
■Current sense disable
■Thermal shutdown protection and diagnosis
■Undervoltage shutdown
■Overvoltage clamp
■Load current limitation
Description
The VN920SP-E is a monolithic device designed
in STMicroelectronics™ VIPower™ M0-3
technology. The VN920SP-E is intended for
driving any type of load with one side connected
to ground. The active VCC pin voltage clamp
protects the device against low energy spikes
(see ISO7637 transient compatibility table).
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload.
The device integrates an analog current sense
output which delivers a current proportional to the
load current. The device automatically turns-off in
the case where the ground pin becomes
disconnected.
Type RDS(on) IOUT VCC
VN920SP-E 15 mΩ30 A 36 V
Table 1. Device summary
Package
Order codes
Tube Tape and reel
PowerSO-10™ VN920SP-E VN920SPTR-E
www.st.com
Contents VN920SP-E
2/27 Doc ID 10896 Rev 3
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 17
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 18
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4 PowerSO-10 maximum demagnetization energy (VCC = 13.5 V) . . . . . . . 19
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.2 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
VN920SP-E List of tables
Doc ID 10896 Rev 3 3/27
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 12. Electrical transient requirements on VCC pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 13. Electrical transient requirements on VCC pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 14. Electrical transient requirements on VCC pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 16. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
List of figures VN920SP-E
4/27 Doc ID 10896 Rev 3
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Switching characteristics (resistive load RL=1.3Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. IOUT/ISENSE versus IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 15. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 16. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 17. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 18. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 19. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 20. PowerSO-10 maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 21. PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. PowerSO-10 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . 21
Figure 24. Thermal fitting model of a single channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . . 21
Figure 25. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 26. PowerSO-10 suggested pad layout and tube shipment (no suffix) . . . . . . . . . . . . . . . . . . 25
Figure 27. PowerSO-10 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
VN920SP-E Block diagram and pin description
Doc ID 10896 Rev 3 5/27
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection / pin Current sense N.C. Output Input
Floating X X X
To ground Through 1 KΩ
resistor XThrough 10KΩ
resistor
UNDERVOLTAGE
OVERTEMPERATURE
VCC
GND
INPUT
OUTPUT
OVERVOLTAGE
CURRENT LIMITER
LOGIC
DRIVER
Power CLAMP
VCC
CLAMP
VDS LIMITER
DETECTION
DETECTION
DETECTION
K
IOUT CURRENT
SENSE
1
2
3
4
5
6
7
8
9
10
11
OUTPUT
OUTPUT
OUTPUT
OUTPUT
GROUND
INPUT
C.SENSE
N.C.
N.C.
V
CC
N.C.
PowerSO-10
Electrical specifications VN920SP-E
6/27 Doc ID 10896 Rev 3
2 Electrical specifications
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
Stressing the device above the rating listed in Ta b l e 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics sure program and other relevant quality
document.
I
S
I
GND
V
CC
V
CC
V
SENSE
OUTPUT
I
OUT
CURRENT SENSE
I
SENSE
INPUT
I
IN
V
IN
V
OUT
GND
V
F
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
VCC DC supply voltage 41 V
- VCC Reverse DC supply voltage -0.3 V
- IGND DC reverse ground pin current -200 mA
IOUT DC output current Internally limited A
- IOUT Reverse DC output current -40 A
IIN DC input current +/-10 mA
VCSENSE Current sense maximum voltage -3
+15
V
V
VESD
Electrostatic discharge
(Human Body Model: R = 1.5 KΩ; C = 100 pF)
– INPUT
– CURRENT SENSE
–OUTPUT
–V
CC
4000
2000
5000
5000
V
V
V
V
VN920SP-E Electrical specifications
Doc ID 10896 Rev 3 7/27
2.2 Thermal data
EMAX
Maximum switching energy
(L = 0.25 mH; RL= 0 Ω; Vbat = 13.5 V;
Tjstart = 150 °C; IL = 45 A)
362 mJ
Ptot Power dissipation TC ≤ 25 °C 96.1 W
TjJunction operating temperature Internally limited °C
TcCase operating temperature -40 to 150 °C
TSTG Storage temperature -55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Table 4. Thermal data
Symbol Parameter Max. value Unit
Rthj-case Thermal resistance junction-case (max) 1.3 °C/W
Rthj-amb Thermal resistance junction-ambient (max) 51.3(1)
1. When mounted on FR4 printed circuit board with 0.5 cm2 of Cu (at least 35 µm thick).
37(2)
2. When mounted on FR4 printed circuit board with 6 cm2 of Cu (at least 35 µm thick).
°C/W
°C/W
Electrical specifications VN920SP-E
8/27 Doc ID 10896 Rev 3
2.3 Electrical characteristics
Values specified in this section are for 8 V < VCC < 36 V; -40 °C < Tj < 150 °C, unless
otherwise stated.
Table 5. Power
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCC Operating supply voltage 5.5 13 36 V
VUSD Undervoltage shutdown 3 4 5.5 V
VOV Overvoltage shutdown 36 V
RON On-state resistance
IOUT = 10 A; Tj = 25 °C;
IOUT = 10 A;
IOUT = 3 A; VCC = 6 V
15
30
50
mΩ
mΩ
mΩ
VCLAMP Clamp voltage ICC = 20 mA(1)
1. VCLAMP and VOV are correlated. Typical difference is 5 V.
41 48 55 V
ISSupply current
Off-state; VCC = 13 V;
VIN = VOUT = 0 V
Off-state; VCC = 13 V;
VIN = VOUT = 0 V; Tj = 25 °C
On-state; VCC = 13 V; VIN = 5 V;
IOUT = 0 A; RSENSE = 3.9 kΩ
10
10
25
20
5
µA
µA
mA
IL(off1) Off-state output current VIN = VOUT = 0 V 0 50 µA
IL(off2) Off-state output current VIN = 0 V; VOUT = 3.5 V -75 0 µA
IL(off3) Off-state output current VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125 °C 5µA
IL(off4) Off-state output current VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25 °C 3µA
Table 6. Switching (VCC =13V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time RL = 1.3 Ω (see Figure 4)50µs
td(off) Turn-off delay time RL = 1.3 Ω (see Figure 4)50µs
dVOUT/dt(on) Turn-on voltage slope RL = 1.3 Ω (see Figure 4) See Figure 15 V/µs
dVOUT/dt(off) Turn-off voltage slope RL = 1.3 Ω (see Figure 4) See Figure 16 V/µs
VN920SP-E Electrical specifications
Doc ID 10896 Rev 3 9/27
Table 7. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
VIL Input low level voltage 1.25 V
IIL Low level input current VIN = 1.25 V 1 µA
VIH Input high level voltage 3.25 V
IIH High level input current VIN = 3.25 V 10 µA
VI(hyst) Input hysteresis voltage 0.5 V
VICL Input clamp voltage IIN = 1 mA
IIN = - 1 mA
66.8
-0.7
8V
V
Table 8. VCC output diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
VFForward on voltage - IOUT = 5.3 A; Tj = 150 °C - - 0.6 V
Table 9. Protections(1)
1. To ensure long term reliability under heavy over-load or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device operates under
abnormal conditions this software must limit the duration and number of activation cycles.
Symbol Parameter Test conditions Min. Typ. Max. Unit
TTSD Shutdown temperature 150 175 200 °C
TRReset temperature 135 °C
Thyst Thermal hysteresis 7 15 °C
Ilim DC short circuit current VCC = 13 V
5V < V
CC < 36 V
30 45 75
75
A
A
Vdemag
Turn-off output clamp
voltage
IOUT = 2 A;
VIN = 0 V;
L = 6 mH
VCC - 41 VCC - 48 VCC - 55 V
VON
Output voltage drop
limitation
IOUT = 1 A;
Tj = -40 °C...150 °C 50 mV
Electrical specifications VN920SP-E
10/27 Doc ID 10896 Rev 3
Table 10. Current sense(1)
1. 9 V ≤ VCC ≤ 16 V.
Symbol Parameter Test conditions Min. Typ. Max. Unit
K1IOUT/ISENSE
IOUT = 1 A; VSENSE = 0.5 V;
Tj = -40 °C...150 °C 3300 4400 6000
dK1/K1Current sense ratio drift IOUT = 1 A; VSENSE = 0.5 V;
Tj= - 40 °C...150 °C -10 +10 %
K2IOUT/ISENSE
IOUT = 10 A; VSENSE = 4 V;
Tj = - 40 °C
Tj= 25 °C...150 °C
4200
4400
4900
4900
6000
5750
dK2/K2Current sense ratio drift IOUT = 10 A; VSENSE = 4 V;
Tj = -40 °C...150 °C -8 +8 %
K3IOUT/ISENSE
IOUT = 30 A; VSENSE = 4 V;
Tj = -40 °C
Tj = 25 °C...150 °C
4200
4400
4900
4900
5500
5250
dK3/K3Current sense ratio drift IOUT = 30 A; VSENSE = 4 V;
Tj = -40 °C...150 °C -6 +6 %
ISENSE0
Analog sense leakage
current
VCC = 6...16 V; IOUT = 0 A;
VSENSE = 0 V;
Tj = -40 °C...150 °C 0 10 µA
VSENSE
Max analog sense
output voltage
VCC = 5.5 V; IOUT = 5 A;
RSENSE = 10 kΩ
VCC > 8 V, IOUT = 10 A;
RSENSE = 10 kΩ
2
4
V
V
VSENSEH
Sense voltage in
overtemperature
condition
VCC = 13 V; RSENSE = 3.9 kΩ5.5 V
RVSENSEH
Analog sense output
impedance in
overtemperature
condition
VCC = 13 V; Tj > TTSD;
output open 400 Ω
tDSENSE
Current sense delay
response To 9 0 % I SENSE(2)
2. Current sense signal delay after positive input slope.
500 µs
VN920SP-E Electrical specifications
Doc ID 10896 Rev 3 11/27
Table 11. Truth table
Conditions Input Output Sense
Normal operation L
H
L
H
0
Nominal
Overtemperature L
H
L
L
0
VSENSEH
Undervoltage L
H
L
L
0
0
Overvoltage L
H
L
L
0
0
Short circuit to GND
L
H
H
L
L
L
0
(Tj<TTSD) 0
(Tj>TTSD) VSENSEH
Short circuit to VCC
L
H
H
H
0
< Nominal
Negative output voltage clamp L L 0
Electrical specifications VN920SP-E
12/27 Doc ID 10896 Rev 3
Table 12. Electrical transient requirements on VCC pin (part 1)
ISO T/R
7637/1
test pulse
Test levels
I II III IV Delays and impedance
1- 25V- 50V
- 75 V - 100 V 2 ms, 10 Ω
2+ 25V
+ 50 V + 75V + 100V 0.2 ms, 10 Ω
3a - 25 V - 50 V - 100 V - 150 V 0.1 µs, 50 Ω
3b + 25 V + 50 V + 75 V + 100 V 0.1 µs, 50 Ω
4- 4V- 5V
- 6 V - 7 V 100 ms, 0.01 Ω
5 + 26.5 V + 46.5 V + 66.5 V + 86.5 V 400 ms, 2 Ω
Table 13. Electrical transient requirements on VCC pin (part 2)
ISO T/R
7637/1
test pulse
Test levels results
I II III IV
1 CCCC
2 CCCC
3a CCCC
3b CCCC
4 CCCC
5CEEE
Table 14. Electrical transient requirements on VCC pin (part 3)
Class Contents
CAll functions of the device are performed as designed after exposure to
disturbance.
E
One or more functions of the device is not performed as designed after
exposure to disturbance and cannot be returned to proper operation without
replacing the device.
VN920SP-E Electrical specifications
Doc ID 10896 Rev 3 13/27
Figure 4. Switching characteristics (resistive load RL=1.3Ω)
Figure 5. IOUT/ISENSE versus IOUT
VOUT
dVOUT/dt(on)
tr
80%
10% tf
dVOUT/dt(off)
ISENSE
t
t
90%
td(off)
INPUT
t
90%
td(on)
tDSENSE
0 2 4 6 8 1012141618202224262830 32
3000
3500
4000
4500
5000
5500
6000
6500
min.Tj=-40°C
max.Tj=-40°C
min.Tj=25...150°C
max.Tj=25...150°C
typical value
I
OUT
(A)
I
OUT
/I
SENSE
6500
6000
5500
5000
4500
4000
3000
3500
Electrical specifications VN920SP-E
14/27 Doc ID 10896 Rev 3
Figure 6. Waveforms
SENSE
INPUT
NORMAL OPERATION
UNDERVOLTAGE
VCC
VUSD
VUSDhyst
INPUT
OVERVOLTAGE
VCC
SENSE
INPUT
SENSE
LOAD CURRENT
LOAD CURRENT
LOAD CURRENT
VOV
VOVhyst
VCC > VUSD
SHORT TO GROUND
INPUT
LOAD CURRENT
SENSE
LOAD VOLTAGE
INPUT
LOAD VOLTAGE
SENSE
LOAD CURRENT
<Nominal <Nominal
SHORT TO VCC
OVERTEMPERATURE
INPUT
SENSE
TTSD
TR
Tj
LOAD CURRENT
ISENSE=RSENSE
VSENSEH
VN920SP-E Electrical specifications
Doc ID 10896 Rev 3 15/27
2.4 Electrical characteristics curves
Figure 7. Off-state output current Figure 8. High level input current
Figure 9. Input clamp voltage Figure 10. On-state resistance vs VCC
Figure 11. On-state resistance vs Tcase Figure 12. Input high level
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
1
2
3
4
5
6
7
8
9
IL(off1) (uA)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Iih (uA)
Vin=3.25V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vicl (V)
Iin=1mA
5 10152025303540
Vcc (V)
0
2.5
5
7.5
10
12.5
15
17.5
20
22.5
25
27.5
30
Ron (mOhm)
IOUT=10A
Tc= - 40ºC
Tc= 25ºC
Tc= 150ºC
-25 0 25 50 75 100 125 150 175
Tc (ºC)
5
7.5
10
12.5
15
17.5
20
22.5
25
27.5
30
Ron (mOhm)
Iout=10A
Vcc=8V; 36V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
Vih (V)
Electrical specifications VN920SP-E
16/27 Doc ID 10896 Rev 3
Figure 13. Input low level Figure 14. Input hysteresis voltage
Figure 15. Turn-on voltage slope Figure 16. Turn-off voltage slope
Figure 17. Overvoltage shutdown Figure 18. ILIM vs Tcase
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
Vil (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
Vhyst (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
250
300
350
400
450
500
550
600
650
700
dVout/dt(on) (V/ms)
Vcc=13V
Rl=1.3Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
50
100
150
200
250
300
350
400
450
500
550
dVout/dt(off) (V/ms)
Vcc=13V
Rl=1.3Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
30
32
34
36
38
40
42
44
46
48
50
Vov (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
10
20
30
40
50
60
70
80
90
100
Ilim (A)
Vcc=13V
VN920SP-E Application information
Doc ID 10896 Rev 3 17/27
3 Application information
Figure 19. Application schematic
3.1 GND protection network against reverse battery
3.1.1 Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1. RGND ≤ 600 mV / (IS(on)max)
2. RGND ≥ (-VCC) / (-IGND)
where - IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device’s datasheet.
Power dissipation in RGND (when VCC < 0: during reverse battery situations) is:
PD= (-VCC)2/ RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift varies depending on how many devices are ON in the case of several
high-side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize solution 2 (see Section 3.1.2).
V
CC
GND
OUTPUT
D
GND
R
GND
D
ld
μ
C
+5V
R
prot
V
GND
INPUT
CURRENT SENSE
R
SENSE
R
prot
Application information VN920SP-E
18/27 Doc ID 10896 Rev 3
3.1.2 Solution 2: diode (DGND) in the ground line
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (∼600mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift does not vary if more than one HSD shares the same diode/resistor
network.
Series resistor in INPUT and STATUS lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.
Safest configuration for unused INPUT and STATUS pin is to leave them unconnected, while
unused SENSE pin has to be connected to ground pin.
3.2 Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in Ta bl e 1 2 .
3.3 MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins is pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the microcontroller I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak = -100 V and Ilatchup ≥ 20 mA; VOHµC ≥ 4.5 V
5kΩ ≤ Rprot ≤ 65 kΩ.
Recommended values:
Rprot =10kΩ.
VN920SP-E Application information
Doc ID 10896 Rev 3 19/27
3.4 PowerSO-10 maximum demagnetization energy
(VCC =13.5V)
Figure 20. PowerSO-10 maximum turn-off current versus inductance
Note: Values are generated with RL =0Ω.In case of repetitive pulses, Tjstart (at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves B and C.
C: Tjstart = 125 °C repetitive pulse
A: Tjstart = 150 °C single pulse
B: Tjstart = 100 °C repetitive pulse
Demagnetization Demagnetization Demagnetization
t
VIN, IL
1
10
100
0,01 0,1 1 10 100
L( mH)
ILM AX (A)
A
B
C
Package and PCB thermal data VN920SP-E
20/27 Doc ID 10896 Rev 3
4 Package and PCB thermal data
4.1 PowerSO-10 thermal data
Figure 21. PowerSO-10 PC board
Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB
thickness = 2 mm, Cu thickness = 35 µm, Copper areas: from minimum pad layout to
8cm
2).
Figure 22. Rthj-amb vs PCB copper area in open box free air condition
VN920SP-E Package and PCB thermal data
Doc ID 10896 Rev 3 21/27
Figure 23. PowerSO-10 thermal impedance junction ambient single pulse
Equation 1: pulse calculation formula
Figure 24. Thermal fitting model of a single channel HSD in PowerSO-10
ZTHδRTH δZTHtp 1δ–()+⋅=
where
δtpT⁄=
T_amb
C1
R1 R2
C2
R3
C3
R4
C4
R5
C5
R6
C6
Pd
Tj
Package and PCB thermal data VN920SP-E
22/27 Doc ID 10896 Rev 3
Table 15. Thermal parameters
Area / island (cm2) Footprint 6
R1 (°C/W) 0.02
R2 (°C/W) 0.1
R3 (°C/W) 0.2
R4 (°C/W) 0.8
R5 (°C/W) 12
R6 (°C/W) 37 22
C1 (W.s/°C) 0.0015
C2 (W.s/°C) 7.00E-03
C3 (W.s/°C) 0.015
C4 (W.s/°C) 0.3
C5 (W.s/°C) 0.75
C6 (W.s/°C) 3 5
VN920SP-E Package and packing information
Doc ID 10896 Rev 3 23/27
5 Package and packing information
5.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2 PowerSO-10 mechanical data
Figure 25. PowerSO-10 package dimensions
Package and packing information VN920SP-E
24/27 Doc ID 10896 Rev 3
Table 16. PowerSO-10 mechanical data
Dim.
Millimeters
Min. Typ. Max.
A 3.35 3.65
A(1)
1. Muar only POA P013P.
3.4 3.6
A1 0.00 0.10
B 0.40 0.60
B(1) 0.37 0.53
C 0.35 0.55
C(1) 0.23 0.32
D 9.40 9.60
D1 7.40 7.60
E 9.30 9.50
E2 7.20 7.60
E2(1) 7.30 7.50
E4 5.90 6.10
E4(1) 5.90 6.30
e1.27
F 1.25 1.35
F(1) 1.20 1.40
H 13.80 14.40
H(1) 13.85 14.35
h0.50
L 1.20 1.80
L(1) 0.80 1.10
a0° 8°
α(1) 2° 8°
VN920SP-E Package and packing information
Doc ID 10896 Rev 3 25/27
5.3 PowerSO-10 packing information
Figure 26. PowerSO-10 suggested pad layout and tube shipment (no suffix)
Figure 27. PowerSO-10 tape and reel shipment (suffix “TR”)
Base Q.ty 600
Bulk Q.ty 600
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 24
Tape hole spacing P0 (± 0.1) 4
Component spacing P 24
Hole diameter D (± 0.1/-0) 1.5
Hole diameter D1 (min) 1.5
Hole position F (± 0.05) 11.5
Compartment depth K (max) 6.5
Hole spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Reel dimensions
VN920SP-E
Doc ID 10896 Rev 3 27/27
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