Standard Products June 1997 S63B1001 BATTERY VOLTAGE 1 Megabit (128K x8) CMOS Mask-Programmable ROM Features Block Diagram * Fast Read Access Time - 70ns * Low Power CMOS Operation - 20A max. Standby - 15mA max. Active at 5MHz * Wide Selection of JEDEC Standard Packages - 40-Lead 600-mil PDIP - 44-Pad PLCC - 40-Lead TSOP - 48-Lead TSOP * 2.7V-3.6V Supply * High Reliability CMOS Technology - 2000V ESD Protection - 200mA Latchup Immunity * Two-line Control * CMOS and TTL Compatible Inputs and Outputs * Full Commercial and Industrial Temperature Ranges * Designed for Battery Supply Operation VCC GND DATA OUTPUTS O0 - O7 OE CE OUTPUT BUFFERS OE, CE A0-A16 ADDRESS INPUTS Y-GATING Y DECODER CELL MATRIX X DECODER Absolute Maximum Ratings1 Temperature Under Bias -55C to +125C Storage Temperature -65C to +150C Voltage on Any Pin with Respect to Ground -2.0V to +6V2 NOTE: 1. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent danger to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses less than 20ns. Maximum pin voltage is VCC+0.6V DC which may overshoot to +6.0V for pulses of less than 20ns. Description Pin Configurations The S63B1001 is a low-power, high performance 1,048,576 bit Mask Programmable Read Only Memory (ROM) organized 128K x 8 bits. It requires only one power supply in normal operation. Any word can be accessed in less than 70ns, eliminating the need for speed reducing WAIT states on high-performance microprocessor systems. The S63B1001 typically consumes 9mA. Standby mode supply current is typically less than 10A. The S63B1001 comes in a choice of industry standard JEDEC-approved packages including: plastic PDIP, PLCC, and TSOP. The device features two-line control (CE, OE) to give designers the flexibility to prevent bus contention. With high density 128K byte storage capability, the S63B1001 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. AMI's S63B1001 has additional features to ensure high quality and efficient production use. PIN NAME FUNCTION A0-A16 Addresses O0-O7 Outputs CE Chip Enable OE Output Enable NC No Connect Pin Capacitance (f = 1 MHz T = 25C) TYPICAL MAXIMUM UNITS CONDITIONS CIN 4 8 pF VIN = 0V COUT 8 12 pF VOUT = 0V NOTE: Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. 1 S63B1001 Standard Products 1 Megabit (128K x8) CMOS Mask-Programmable ROM June 1997 Operating Modes MODE/PIN Read CE OE Ai VCC OUTPUTS VIL VIL Ai VCC DOUT X VIH X VCC High Z VIH X X VCC High Z -70 -90 -120 0C - 70C 0C - 70C 0C - 70C -40C - 85C -40C - 85C -40C - 85C 2.7V - 3.6V 2.7V - 3.6V 2.7V - 3.6V Output Disable Standby DC and AC Operating Conditions S63B1001 Operating Temperature Commercial Industrial Vdd Power Supply DC and Operating Characteristics 2.7V to 3.6V SYMBOL PARAMETER CONDITION MAX UNITS Com., Ind. 1 A Com., Ind. 5 A 20 A Com. 15 mA Ind. 20 mA VCC = 3.0V to 3.6V 0.8 V VCC = 2.7V to 3.6V 0.2 x VCC V ILI Input Load Current ILO Output Leakage Current VOUT = 0V to VCC ISB VCC Standby Current CE = VCC 0.3V ICC VCC Active Current f = 5MHz, IOUT = 0mA, CE = VIL ,VCC = 3.6V VIL Input Low Voltage VIH Input High Voltage VOL Output Low Voltage VIN = 0V to VCC Output High Voltage MIN VCC = 3.0V to 3.6V 2.2 V VCC = 2.7V to 3.6V 0.7 x VCC V 2mA 0.4 V 100A 0.2 V 20A 0.1 V -1mA VOH APP. 2.2 V -100A VCC - 0.2 V -20A VCC - 0.1 V 2 S63B1001 Standard Products 1 Megabit (128K x8) CMOS Mask-Programmable ROM June 1997 AC Characteristics for Read Operations 2.7V - 3.6V S63B1001 SYMBOL 3 tACC PARAMETER CONDITION -70 Min. -90 Max. Min. -120 Max. Min. Max. Address to Output Delay CE=OE=VIL 70ns 90ns 120ns 2 CE to Output Delay OE=VIL 70ns 90ns 120ns 2,3 OE to Output Delay CE=VIL 30ns 35ns 35ns 4,5 tDF OE or CE High to Output Float 25ns 25ns 30ns tOH Output Hold from Addresses, CE or OE whichever occurred first tCE tOE 0ns 0ns 0ns AC Waveforms1 ADDRESS ADDRESS VALID CE tCE tOE OE tDF tACC tOH OUTPUT Notes:1. 2. 3. 4. 5. HIGH Z OUTPUT VALID Timing measurement references are 1.5V. Input AC driving levels are 0V and 2.7V. OE may be delayed up to tCE-tOE after the falling edge of CE without impact on tCE. OE may be delayed up to tACC-tOE after the address is valid without impact on t ACC. This parameter is only sampled and is not 100% tested. Output float is defined as the point when data is no longer driven. Input Test Waveforms and Measurement Levels 2.7V AC DRIVING LEVELS AC MEASUREMENT LEVEL 1.5V 0.0V tR, tF < 5 ns (10% to 90%) Output Test Load TEST COMPARATOR OUT VL = 1.92V RL = 476 CL = 30pF 3 S63B1001 Standard Products 1 Megabit (128K x8) CMOS Mask-Programmable ROM June 1997 32-Pin PDIP Specifications Pin Configuration NC A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND Description The Plastic Dual-In-Line Package (PDIP) meets widely accepted industry standard for MOS/VLSI applications. The package consists of a plastic body, transfer-molded around the leadframe and die. The leadframe is copper alloy, with external pins solder plated. Internally, there is 125 inch silver spot plating on the die attach pad and on each bonding fingertip. These fingers are electrically connected to the die by thermosonic gold ball bonding techniques. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC NC NC A14 A13 A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3 Package Description and Outline Dimensions LOW STRESS MOLDING COMPOUND CONDUCTIVE DIE ATTACH MATERIAL DIE GOLD BONDING WIRE E1 LEAD 1 E 1 LEAD COUNT DIRECTION eA C eB A D A1 SPOT SILVER PLATING L COPPER ALLOY LEAD FRAME B1 B e SOLDER PLATING PDIP Specifications SYMBOL A A1 MAX 0.180 - MIN - B B1 C D E E1 e eA eB L 0.020 0.055 0.012 1.655 0.625 0.550 0.100 0.686 0.135 TYP 0.015 0.016 0.045 0.008 1.645 0.600 0.530 0.580 0.125 NOTE: 1. All measurements in inches. 2. Data is subject to change. Contact the factory for most current specifications. 4 B2 S - - - - S63B1001 Standard Products 1 Megabit (128K x8) CMOS Mask-Programmable ROM June 1997 32-Pin PLCC Specifications Pin Configuration A12 A15 A16 NC VCC NC NC Description 4 The PLCC is transfer molded and thermosonic wire bonded. Die is mounted on a copper alloy leadframe and external leads are solder plated to provide improved solderability. 3 2 1 32 31 30 A7 5 29 A14 A6 6 28 A13 A5 7 27 A8 A4 8 26 A9 A3 9 25 A11 A2 10 24 OE A1 11 23 A10 A0 12 22 CE O0 13 21 O7 14 15 16 17 18 19 20 O1 O2 GND O3 O4 O5 O6 Package Description LOW STRESS MOLDING COMPOUND GOLD WIRE BOND COPPER ALLOY LEADFRAME DIE SILVER PLATING SOLDER PLATING Package Outline Dimensions 1.22/1.07 2 PLCS PIN 1 IDENTIFIER & ZONE D D1 .81/.66 A1 A SEATING PLANE E E1 E3 .10 e .51 MIN. R 1.14/.64 .53/.33 D2/E2 SIDE VIEW D3 TOP VIEW BOTTOM VIEW PDIP Specifications SYMBOL A A1 D1 D2 D3 E1 E2 E3 e D E MAX 3.56 2.41 11.51 10.92 14.05 13.46 1.52 11.35 9.91 13.89 12.45 1.27 BSC 15.11 2.45 10.16 BSC 12.57 MIN 7.62 BSC 12.32 14.86 NOTE: 1. All measurements in millimeters. 2. Data is subject to change. Contact the factory for most current specifications. 5 S63B1001 Standard Products 1 Megabit (128K x8) CMOS Mask-Programmable ROM June 1997 32-Pin TSOP Specifications Pin Configuration A11 A9 A8 A13 A14 NC NC VCC NC A16 A15 A12 A7 A6 A5 A4 Description The Type I Thin Small Outline Package (TSOP) is a thin, ends only package. This package is constructed using the latest low stress molding compounds and bonding technology to provide a package with total body thickness of less than 1.90mm. This package is popular for ROM applications in memory cards and other thin card applications. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE O7 O6 O5 O4 O3 GND O2 O1 O0 A0 A1 A2 A3 Package Description and Outline Dimensions SEATING PLANE A1 H A 0.90 (.035) 0.90 (.035) LOW STRESS MOLDING COMPOUND E 32 1 2 3 1.00 (.039) DIA PIN #1 I.D. (SPHERICAL) DIE GOLD WIRE BOND D e TOP VIEW B L c A2 TSOP Specifications SYMBOL A A1 A2 B D E H e c L MAX 1.20 0.15 1.05 0.25 8.20 18.50 20.20 0.20 0.60 5 MIN - 0.0 0.95 0.15 7.80 18.30 19.80 0.50 BSC 0.10 0.40 0 NOTE: 1. All measurements in millimeters. 2. Data is subject to change. Contact the factory for most current specifications. Copyright(R)1997, American Microsystems, Inc. Devices sold by AMI are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMI makes no warranty, express, statutory implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. AMI makes no warranty of merchantability or fitness for any purposes. AMI reserves the right to discontinue production and change specifications and prices at any time and without notice. AMI's products are intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recommended without additional processing by AMI for such applications. American Microsystems, Inc., 2300 Buckskin Rd., Pocatello, ID 83201, (208) 233-4690, FAX (208) 234-6796 6