General Description
The MAX5741 quad, 10-bit, low-power, buffered volt-
age-output, digital-to-analog converter (DAC) is pack-
aged in a space-saving 10-pin µMAX®package (5mm
✕3mm). The wide supply voltage range of +2.7V to
+5.5V and 229µA supply current accommodates low-
power and low-voltage applications. DAC outputs
employ on-chip precision output amplifiers that swing
rail-to-rail. The MAX5741’s reference input accepts a
voltage range from 0 to VDD. In power-down the refer-
ence input is high impedance, further reducing the sys-
tem’s total power consumption.
The 20MHz, 3-wire SPI™, QSPI™, MICROWIRE™ and
DSP-compatible serial interface saves board space and
reduces the complexity of opto- and transformer-isolated
applications. The MAX5741 on-chip power-on reset
(POR) circuit resets the DAC outputs to zero and loads
the output with a 100kΩresistor to ground. This provides
additional safety for applications that drive valves or other
transducers that need to be off on power-up. The
MAX5741’s software controlled power-down reduces
supply current to less than 1µA and provides software-
selectable output loads (1kΩ, 100kΩ, or high impedance)
while in power-down. The MAX5741 is specified over the
-40°C to +125°C extended temperature range and avail-
able in a 10-pin µMAX package
Applications
Automatic Tuning
Gain and Offset Adjustment
Power Amplifier Control
Process Control I/O Boards
Battery-Powered Instruments
VCO Control
Features
♦Ultra-Low Power Consumption
229µA at VDD = +3.6V
271µA at VDD = +5.5V
♦Wide +2.7V to +5.5V Single-Supply Range
♦10-Pin µMAX Package
♦0.3µA Power-Down Current
♦Guaranteed 10-Bit Monotonicity (±1LSB DNL)
♦Safe Power-Up Reset to Zero Volts at DAC Output
♦Three Software-Selectable Power-Down
Impedances (100kΩ, 1kΩ, Hi-Z)
♦Fast 20MHz, 3-Wire SPI, QSPI, and MICROWIRE-
Compatible Serial Interface
♦Rail-to-Rail Output Buffer Amplifiers
♦Schmitt-Triggered Logic Inputs for Direct
Interfacing to Optocouplers
♦Wide -40°C to +125°C Operating Temperature
Range
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
________________________________________________________________
Maxim Integrated Products
1
1
2
3
4
5
10
9
8
7
6
OUTD
OUTC
OUTB
OUTAGND
VDD
SCLK
CS
MAX5741
µMAX
TOP VIEW
REFDIN
Pin Configuration
19-2123; Rev 4; 5/08
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
µMAX is a registered trademark of Maxim Integrated Products,
Inc.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor, Corp.
Ordering Information
PART TEMP RANGE PIN-PACKAGE
MAX5741EUB -40°C to +85°C 10 µMAX
MAX5741AUB -40°C to +125°C 10 µMAX
Functional Diagram appears at end of data sheet.
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +5.5V, GND = 0, VREF = VDD, RL= 5kΩ, CL= 200pF, TA= TMIN to TMAX, unless otherwise noted. Typical values are
VDD = +5V, TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD to GND..............................................................-0.3V to +6V
OUT_, SCLK, DIN, CS, REF to GND...............-0.3 to (VDD+0.3V)
Maximum Continuous Current Into Any Pin......................±50mA
Continuous Power Dissipation (TA= +70°C)
10-Pin µMAX (derate 6.9 mW/°C above +70°C) ..........555mW
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature........................................-65°C to +150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
STATIC ACCURACY (Note 1)
Resolution N 10 Bits
Integral Nonlinearity Error INL (Note 2) ±0.5 ±4 LSB
Differential Nonlinearity Error DNL Guaranteed monotonic (Note 2) ±1 LSB
Zero-Code Error OE Code = 000 0.4 1.5 % of FS
Zero-Code Error Tempco 2.3 ppm/°C
Gain Error GE Code = 3FF hex ±3 % of FS
Gain-Error Tempco 0.26 ppm/°C
Power-Supply Rejection Ratio PSRR Code = 3FF hex, ∆VDD = ±10% 58.8 dB
REFERENCE INPUT
Reference Input Voltage Range VREF 0V
DD V
In operation 32 45 63 kΩ
Reference Input Impedance RREF In power-down mode 2 MΩ
Power-Down Reference Current In power-down mode (Note 3) 1 10 µA
DAC OUTPUT
Output Voltage Range No load (Note 4) 0 VDD V
DC Output Impedance Code = 200 hex 0.8 Ω
VDD = +3V 15
Short-Circuit Current VDD = +5V 48 mA
VDD = +3V 8
Wake-Up Time VDD = +5V 8 µs
Output Leakage Current Power-down mode = output high impedance ±18 nA
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.5V, GND = 0, VREF = VDD, RL= 5kΩ, CL= 200pF, TA= TMIN to TMAX, unless otherwise noted. Typical values are
VDD = +5V, TA= +25°C.)
TIMING CHARACTERISTICS
(VDD = 2.7V to 5.5V, GND = 0, TA= TMIN to TMAX, unless otherwise noted.)
Note 1: DC specifications are tested without output loads.
Note 2: Linearity guaranteed from code 29 to code 995.
Note 3: Limited with test conditions.
Note 4: Offset and gain error limit the FSR.
Note 5: Guaranteed by design.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DIGITAL INPUTS (SCLK, DIN, CS)
Input High Voltage VIH VDD = +3V, +5V 0.7 ✕
VDD V
Input Low Voltage VIL VDD = +3V, +5V 0.3 ✕
VDD V
Input Leakage Current IIN Digital inputs = 0 or VDD ±0.1 ±1 µA
Input Capacitance CIN 5pF
DYNAMIC PERFORMANCE
Voltage Output Slew Rate SR 0.5 V/µs
Voltage Output Settling Time 100 hex to 300 hex (Note 3) 4 10 µs
Digital Feedthrough Any digital inputs from 0 to VDD 0.15 nV-s
Digital-Analog Glitch Impulse Major carry transition (Code 1FF hex to
Code 200 hex) 12 nV-s
DAC-to-DAC Crosstalk 2.4 nV-s
POWER REQUIREMENTS
Supply Voltage Range VDD 2.7 5.5 V
All digital inputs at 0 or VDD = 3.6V 230 395
Supply Current with No Load IDD All digital inputs at 0 or VDD = 5.5V 270 420 µA
Power-Down Supply Current IDDPD All digital inputs at 0 or VDD = 5.5V 0.29 1 µA
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SCLK Clock Frequency f SCLK 020MHz
SCLK Pulse Width High tCH 25 ns
SCLK Pulse Width Low tCL 25 ns
CS Fall to SCLK Rise Setup Time tCSS 10 ns
SCLK Fall to CS Rise Setup Time tCSH 10 ns
DIN to SCLK Fall Setup Time tDS 15 ns
DIN to SCLK Fall Hold Time tDH 0ns
CS Pulse Width High tCSW 80 ns
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
4 _______________________________________________________________________________________
-4
-3
-2
-1
0
1
2
3
4
0 1024
MAX5741 toc01
CODE
INL (LSB)
INTEGRAL NONLINEARITY
vs. CODE, TA = +25°C
256 512 768
VDD = +5V
VDD = +3V
-0.25
-0.10
-0.15
-0.20
-0.05
0
0.05
0.10
0.15
0.20
0.25
0 256 512 768 1024
MAX5741 toc02
CODE
DNL (LSB)
DIFFERENTIAL NONLINEARITY
vs. CODE, TA = +25°C
-24
-19
-9
-14
-4
1
MAX5741 toc03
CODE
TOTAL UNADJUSTED ERROR (%)
0 512256 768 1024
TOTAL UNADJUSTED ERROR
vs. CODE, TA = +25°C
VDD = +3V AND +5V
-4
-3
-2
-1
0
1
2
3
4
0 1024
MAX5741 toc04
CODE
INL (LSB)
INTEGRAL NONLINEARITY
vs. CODE, TA = +40°C
256 512 768
VDD = +3V
VDD = +5V
-4
-3
-2
-1
0
1
2
3
4
0 1024
MAX5741 toc07
CODE
INL (LSB)
INTEGRAL NONLINEARITY
vs. CODE, TA = +125°C
256 512 768
VDD = +5V
VDD = +3V
-0.25
-0.10
-0.15
-0.20
-0.05
0
0.05
0.10
0.15
0.20
0.25
0 256 512 768 1024
MAX5741 toc05
CODE
DNL (LSB)
DIFFERENTIAL NONLINEARITY
vs. CODE, TA = -40°C
-24
-19
-9
-14
-4
1
MAX5741 toc06
CODE
TOTAL UNADJUSTED ERROR (%)
0 512256 768 1024
TOTAL UNADJUSTED ERROR
vs. CODE, TA = -40°C
VDD = +3V AND +5V
-0.25
-0.10
-0.15
-0.20
-0.05
0
0.05
0.10
0.15
0.20
0.25
0 256 512 768 1024
MAX5741 toc08
CODE
DNL (LSB)
DIFFERENTIAL NONLINEARITY
vs. CODE, TA = +125°C
-24
-19
-9
-14
-4
1
MAX5741 toc09
CODE
TOTAL UNADJUSTED ERROR (%)
0512256 768 1024
TOTAL UNADJUSTED ERROR
vs. CODE, TA = +125°C
VDD = +3V AND +5V
__________________________________________Typical Operating Characteristics
(VREF = VDD, TA= +25°C, unless otherwise noted.)
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
_______________________________________________________________________________________
5
-4
-2
-3
1
0
-1
3
2
4
-40 20 40-20 0 60 80 100 120
MAX5741 toc10
TEMPERATURE (°C)
INL AND DNL (LSB)
WORST-CASE INL AND DNL
vs. TEMPERATURE
MAXIMUM INL
MINIMUM INL
MAXIMUM DNL
MINIMUM DNL
0
0.5
1.0
1.5
2.0
2.5
3.0
042 6 8 10121416
MAX5741 toc11
ISOURCE/SINK (mA)
VOUT (V)
CODE = 3FF
HEX, SOURCING
CURRENT
FROM OUT_
CODE = 300
HEX, SOURCING
CURRENT
FROM OUT_
CODE = 100 HEX,
SINKING CURRENT
INTO OUT_
SOURCE-AND-SINK CURRENT CAPABILITY
(VDD = +3V)
CODE = 000 HEX,
SINKING CURRENT INTO OUT_
042 6 8 10121416
MAX5742 toc12
ISOURCE/SINK (mA)
VOUT (V)
0
1.5
1.0
0.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VDD = 5V
CODE = 3FF HEX, SOURCING
CURRENT FROM OUT_
CODE = 300 HEX,
SOURCING CURRENT
FROM OUT_
CODE = 100 HEX,
SINKING CURRENT
INTO OUT_
SOURCE-AND-SINK CURRENT CAPABILITY
(VDD = +5V)
CODE = 000 HEX,
SINKING CURRENT INTO OUT_
150
290
2.7 3.73.2 4.2 4.7 5.2
MAX5741 toc13
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
190
170
230
210
270
250
CODE = 3FF HEX
200
220
210
250
240
230
270
260
280
290
-40 20 40-20 0 60 80 100 120
MAX5721 toc16
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
SUPPLY CURRENT
vs. TEMPERATURE
VDD = +3.6V
VDD = +5.5V
2.7 3.73.2 4.2 4.7 5.2
MAX5741 toc14
SUPPLY VOLTAGE (V)
POWER-DOWN SUPPLY CURRENT (nA)
POWER-DOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
0
100
50
200
150
250
300
0
200
100
500
400
300
800
700
600
900
021 345
SUPPLY CURRENT vs. CS INPUT VOLTAGE
MAX5741 toc15
SUPPLY CURRENT (µA)
VDD = +3V
CS INPUT VOLTAGE (V)
VDD = +5V
Typical Operating Characteristics (continued)
(VREF = VDD, TA= +25°C, unless otherwise noted.)
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
6 _______________________________________________________________________________________
FULL-SCALE SETTLING TIME (VDD = +5V)
MAX5741 toc17
VOUT_
1V/div
1µs/div
CODE 000 TO 3FF HEX
RL = 5kΩ
CL = 200pF
VSCLK
5V/div
FULL-SCALE SETTLING TIME (VDD = +5V)
MAX5741 toc18
VOUT_
1V/div
1µs/div
VSCLK
5V/div
CODE 3FF HEX TO 000
RL = 5kΩ
CL = 200pF
Typical Operating Characteristics (continued)
(VREF = VDD, TA= +25°C, unless otherwise noted.)
HALF-SCALE SETTLING TIME (VDD = +3V)
MAX5741 toc19
VOUT_
1V/div
1µs/div
VSCLK
5V/div
CODE 100 HEX TO 300 HEX
RL = 5kΩ
CL = 200pF
HALF-SCALE SETTLING TIME (VDD = +3V)
MAX5721 toc20
VOUT_
1V/div
1µs/div
VSCLK
5V/div
CODE 300 HEX TO 100 HEX
RL = 5kΩ
CL = 200pF
EXITING POWER-DOWN (VDD = +5V)
MAX5741 toc21
VOUT_
1V/div
5µs/div
VSCLK
5V/div
CODE 200 HEX
DIGITAL-TO-ANALOG GLITCH IMPULSE
(VDD = +5V)
MAX5741 toc22
VOUT_
AC-COUPLED,
20mV/div
1µs/div
CODE 1FF HEX
TO 200 HEX
SCLK,
fSCLK = 500kHz
2V/div
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
_______________________________________________________________________________________
7
DIGITAL-TO-ANALOG GLITCH IMPULSE
(VDD = +3V)
MAX5741 toc23
VOUT_
AC-COUPLED,
50mV/div
1µs/div
SCLK,
fSCLK = 500kHz,
2V/div
CODE 1FF HEX
TO 200 HEX
DIGITAL-TO-ANALOG GLITCH IMPULSE
(VDD = +5V)
MAX5741 toc24
VOUT_
AC-COUPLED,
50mV/div
1µs/div
CODE 200 HEX
TO 1FF HEX
SCLK,
fSCLK = 500kHz
,
2V/div
Typical Operating Characteristics (continued)
(VREF = VDD, TA= +25°C, unless otherwise noted.)
DIGITAL-TO-ANALOG GLITCH IMPULSE
(VDD = +3V)
MAX5741 toc25
VOUT_
AC-COUPLED,
20mV/div
1µs/div
SCLK,
fSCLK = 500kHz,
1V/div
CODE 200 HEX
TO 1FF HEX
POWER-ON RESET, FAST RISE TIME
(VDD = +5V)
MAX5741 toc26
VOUT_
AC-COUPLED,
10mV/div
20µs/div
VDD RISE
TIME = 20µs
VDD
2V/div
MAX5741 toc28
VOUT_
AC-COUPLED,
10mV/div
20µs/div
POWER-ON RESET, FAST RISE TIME
(VDD = +3V)
VDD
2V/div
VDD RISE
TIME = 20µs
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
8 _______________________________________________________________________________________
MAX5741 toc29
VOUT_
AC-COUPLED
2mV/div
40µs/div
VDD RISE
TIME = 72µs
VDD
2V/div
POWER-ON RESET, SLOW RISE-TIME
(VDD = +3V)
2µs/div
MAX5741 toc30
CODE 200 HEX, fSCLK = 50kHz
SCLK,
2V/div
VOUT_,
AC-COUPLED
1mV/div
CLOCK FEEDTHROUGH (VDD = +5V)
Typical Operating Characteristics (continued)
(VDD = +3V, VREF = VDD, TA= +25°C, unless otherwise noted.)
2µs/div
CODE 200 HEX, fSCLK = 50kHz
MAX5741 toc31
SCLK,
2V/div
VOUT_,
AC-COUPLED
1mV/div
CLOCK FEEDTHROUGH (VDD = +3V)
MAX5741 toc32
VOUT_
AC-COUPLED,
10mV/div
20µs/div
VDD,
AC-COUPLED,
100mV/div
LINE TRANSIENT RESPONSE
(VDD = +5V)
MAX5741 toc33
VOUT_
AC-COUPLED,
10mV/div
20µs/div
VDD,
AC-COUPLED,
100mV/div
LINE TRANSIENT RESPONSE
(VDD = +3V)
MAX5741 toc34
2µs/div
VOUTA,
2V/div
CODE 3FF HEX
TO 008 HEX
VOUTB,
AC-COUPLED
1mV/div
CROSSTALK (VDD = +5V)
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
_______________________________________________________________________________________ 9
Detailed Description
The MAX5741 contains four 10-bit, voltage-output, low-
power digital-to-analog converters (DACs). Each DAC
employs a resistor word string architecture that con-
verts a 10-bit digital input word to an equivalent analog
output voltage proportional to the applied reference
voltage. The MAX5741 shares one reference input
(REF) between all four DACs. The MAX5741 includes
rail-to-rail output buffer amplifiers for each DAC, and
input logic for simple microprocessor (µP), and CMOS
interfaces. The power-supply range is from +2.7V to
+5.5V (
Functional Diagram
). The MAX5741’s reference
input accepts a voltage range from 0 to VDD. In power-
down mode the reference input is high impedance. The
MAX5741 is compatible with the 3-wire SPI, QSPI,
MICROWIRE, and DSP serial interface with Schmitt-trig-
gered logic inputs.
Reference Input and DAC Output Range
The reference input accepts positive DC and AC sig-
nals. The voltage at REF sets the full-scale output volt-
age of the four DACs. The reference input voltage
range is 0 to VDD. The impedance at REF is 45kΩ. The
voltage at REF can vary from GND to VDD. The output
voltages (VOUT_) are represented by a digitally pro-
grammable voltage source as:
VOUT_ = (VREF ✕ D) / 210
where D is the decimal equivalent of binary DAC input
code ranging from 0 to 1023. VREF is the voltage at
REF.
Output Buffer Amplifiers
All DACs are internally buffered at the output. The
buffer amplifiers have both rail-to-rail common mode
and (GND to VREF) output voltage range. The buffers
are unity-gain stable with CL = 200pF and RL = 5kΩ.
Buffer amplifiers are disabled during power-up and
individual DAC outputs are shorted to GND through a
100kΩresistor. Buffer amplifiers can individually or alto-
gether be powered-down by programming the input
register control bits. During power down, contents of
the input and DAC registers remain the same. On
wake-up all DAC outputs are restored to their pre-
power down voltage values.
Power-Down Mode
In power-down mode, the DAC outputs are pro-
grammed to one of three output states, 1kΩ, 100kΩ, or
floating (Table 1). The REF input is high impedance
(2MΩtyp) to conserve current drain from the system
reference; therefore, the system reference does not
have to be powered-down. The DAC outputs return to
the values contained in the registers when brought out
of power-down. The recovery time, from total power-
down to power-up, is 8µs. This extra time is needed to
allow the internal bias to wake-up. Power-down mode
reduces current consumption to 0.3µA.
3-Wire Serial Interface
The MAX5741 digital interface is a standard 3-wire con-
nection compatible with SPI/QSPI/MICROWIRE/DSP
interfaces. The chip-select input (CS) frames the serial
data loading at DIN. Immediately following CS high-to-
low transition, the data is shifted synchronously and
latched into the input register on the falling edge of the
serial clock input (SCLK). After 16 bits have been
loaded into the serial input register, it transfers its con-
Pin Description
PIN NAME FUNCTION
1CS Chip-Select Input
2 SCLK Serial Clock Input
3V
DD Power-Supply Input
4 GND Ground
5 DIN Serial Data Input
6 REF External Reference Voltage Input
7, 8, 9, 10 OUTA–OUTD DAC Voltage Outputs. Power-on reset sets DAC registers to zero, and internally connects
OUT to GND with 100kΩ resistor.
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
10 ______________________________________________________________________________________
tents to the DAC latch. CS may then either be held low
or brought high. CS must be brought high for a mini-
mum of 80ns before the next write sequence, since a
write sequence is initiated on a falling edge of CS. Not
keeping CS low during the first 15 SCLK cycles dis-
cards input data. The serial clock (SCLK) can idle
either high or low between transitions.
The MAX5741 has two internal registers per DAC, the
input register and the DAC register. The input register
holds the data that is waiting to be shifted to the DAC
register. All four input registers can be loaded without
updating the output. This function is useful when all out-
puts need to be updated at the same time. The input
register can be made transparent. When the input reg-
ister is transparent, the data written into DIN loads
directly to the DAC register and the output is updated.
The DAC output is not updated until data is written to
the DAC register. See Table 2 for a list of serial-inter-
face programming commands.
Power-On Reset (POR)
The MAX5741 has an internal POR circuit. At power-up all
DACs are powered-down and OUT_ is terminated to
GND through 100kΩresistors. Contents of input and DAC
registers are cleared to all zero. 8µs recovery time after
issuing a wake-up command is needed before writing to
the DAC registers. Power-down mode control commands
can be applied immediately with no recovery time.
C3–C0 are control bits. The data bits D9 to D0 are in
straight binary format. Set bits S1 and S0 to zero. All
zeros correspond to zero scale and all ones corre-
spond to full scale.
EXTENDED
CONTROL DATA BITS
C3 C2 C1 C0 D9–D3 D2 D1 D0 S1 S0
DESCRIPTION FUNCTION
1111 X 00000 DAC A DAC O/P, wake-up
1111 X 00001 DAC A Floating output
1111 X 00010 DAC A Output is terminated with 1kΩ
1111 X 00011 DAC A Output is terminated with 100kΩ
1111 X 00100 DAC B DAC O/P, wake-up
1111 X 00101 DAC B Floating output
1111 X 00110 DAC B Output is terminated with 1kΩ
1111 X 00111 DAC B Output is terminated with 100kΩ
1111 X 01000 DAC C DAC O/P, wake-up
1111 X 01001 DAC C Floating output
1111 X 01010 DAC C Output is terminated with 1kΩ
1111 X 01011 DAC C Output is terminated with 100kΩ
1111 X 01100 DAC D DAC O/P, wake-up
1111 X 01101 DAC D Floating output
1111 X 01110 DAC D Output is terminated with 1kΩ
1111 X 01111 DAC D Output is terminated with 100kΩ
1111 X 10000 DAC A-D DAC O/P, wake-up
1111 X 10001 DAC A-D Floating output
1111 X 10010 DAC A-D Output is terminated with 1kΩ
1111 X 10011 DAC A-D Output is terminated with 100kΩ
Table 1. Power-Down Mode Control
X = Don’t Care
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
______________________________________________________________________________________ 11
Digital Inputs
The digital inputs are compatible with CMOS logic. In
order to save power and reduce input to output cou-
pling, SCLK and DIN input buffers are powered down
immediately after completion of shifting 16 bits into the
input shift register. A high to low transition at CS pow-
ers up SCLK and DIN input buffers.
Applications Information
Unipolar Output
The typical application circuit (Figure 3) shows the
MAX5741 configured for a unipolar output, where the
output voltages and the reference inputs have the
same polarity. Table 3 lists the unipolar output codes.
Bipolar Output
The MAX5741 can be configured for bipolar operation
using a dual supply op amp (Figure 4). The transfer
function for bipolar operation is:
VV 2D
1024
OUT REF
=⎛
⎝
⎜⎞
⎠
⎟−
⎡
⎣
⎢⎤
⎦
⎥
1
CONTENTS OF INPUT SHIFT
D9 (MSB) D0 (LSB)
C3 C2 C1 C0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 S1 S0
Figure 1. 16-Bit Input Word
tCH
SOC3
tCL
tDS
tCSW tCSS
tCSH
tDH
SCLK
CS
DIN
Figure 2. Timing Diagram
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
12 ______________________________________________________________________________________
X = Don’t Care
Table 2. Serial-Interface Programming Commands
DAC_
REF VDD
+2.7V TO +5.5V
OUT_
GND
IN OUT
GND
MAX6050
MAX5741
Figure 3. Typical Operating Circuit, Unipolar Output
DAC_
MAX5741
REF
V-
V+
VOUT
R1 R2
OUT_
R1 = R2
VDD
+2.7V TO +5.5V
Figure 4. Bipolar Output Circuit
CONTROL DATA BITS
C3 C2 C1 C0 D9–D0 S1–S0 DAC FUNCTION
0000 X X AInp ut r eg i ster tr ansp ar ent, d ata shi fted d i r ectl y to D AC r eg i ster , O U TA up d ated
0001 X X BInp ut r eg i ster tr ansp ar ent, d ata shi fted d i r ectl y to D AC r eg i ster , O U TB up d ated
0010 X X CInp ut r eg i ster tr ansp ar ent, d ata shi fted d i r ectl y to D AC r eg i ster , O U TC up d ated
0011 X X DInp ut r eg i ster tr ansp ar ent, d ata shi fted d i r ectl y to D AC r eg i ster , O U TD up d ated
0 1 0 0 X X A Data shifted to input register, OUTA unchanged
0 1 0 1 X X B Data shifted to input register, OUTB unchanged
0 1 1 0 X X C Data shifted to input register, OUTC unchanged
0 1 1 1 X X D Data shifted to input register, OUTD unchanged
1 0 0 0 X X A Shift data from input register to DAC register, OUTA updated
1 0 0 1 X X B Shift data from input register to DAC register, OUTB updated
1 0 1 0 X X C Shift data from input register to DAC register, OUTC updated
1 0 1 1 X X D Shift data from input register to DAC register, OUTD updated
1100 X XA–D
Input registers transparent, data shifted directly to DAC registers,
OUTA–OUTD updated
1 1 0 1 X X A–D Data shifted to input registers, OUTA–OUTD unchanged
1 1 1 0 X X A–D Shift data from input registers to DAC registers, OUTA–OUTD updated
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
______________________________________________________________________________________ 13
DAC CONTENTS ANALOG OUTPUT
1111 1111 1100
1000 0000 0100
1000 0000 0000
0111 1111 1100
0000 0000 0100
0000 0000 0000 0
VREF
1023
1024
⎛
⎝
⎜⎞
⎠
⎟
VREF
513
1024
⎛
⎝
⎜⎞
⎠
⎟
VREF
511
1024
⎛
⎝
⎜⎞
⎠
⎟
VREF
2
DAC CONTENTS ANALOG OUTPUT
1111 1111 1100
1000 0000 0100
1000 0000 0000 0
0111 1111 1100
0000 0000 0100
0000 0000 0000
+⎛
⎝
⎜⎞
⎠
⎟
VREF
511
512
+⎛
⎝
⎜⎞
⎠
⎟
VREF
1
512
⎛
⎝
⎜⎞
⎠
⎟
−VREF
511
512
⎛
⎝
⎜⎞
⎠
⎟
−VREF
1
512
VREF
1
1024
⎛
⎝
⎜⎞
⎠
⎟
−VREF
Table 3. Unipolar Code Table Table 4. Bipolar Code Table
Chip Information
TRANSISTOR COUNT: 14458
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
10 µMAX U10CN-1 21-0061
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
14 ______________________________________________________________________________________
DAC
REGISTER A
DAC
REGISTER B
DAC
REGISTER C
DAC
REGISTER D
10-BIT DAC OUTPUT
BUFFER
OUTPUT
BUFFER
OUTPUT
BUFFER
OUTPUT
BUFFER
INPUT CONTROL
LOGIC AND SHIFT
REGISTER
POWER-DOWN
CONTROL LOGIC
CS SCLK DIN GND
OUTB
OUTA
VDD REF
OUTD
OUTC
RESISTOR
NETWORK
RESISTOR
NETWORK
RESISTOR
NETWORK
RESISTOR
NETWORK
10-BIT DAC
10-BIT DAC
10-BIT DAC
MAX5741
INPUT
REGISTER A
INPUT
REGISTER B
INPUT
REGISTER C
INPUT
REGISTER D
Functional Diagram
MAX5741
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________
15
© 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
4 5/08 Corrected labeling in two TOCs 5